Abstract:
An integrated circuit chip with reduced IR drop and improved chip performance is disclosed. The integrated circuit chip includes a semiconductor substrate having thereon a plurality of inter-metal dielectric (IMD) layers and a plurality of copper metal layers embedded in respective the plurality of IMD layers; a first passivation layer overlying the plurality of IMD layers and the plurality of copper metal layers; a first power/ground ring of a circuit block of the integrated circuit chip formed in a topmost layer of the plurality of copper metal layers; a second power/ground ring of the circuit block of the integrated circuit chip formed in an aluminum layer over the first passivation layer; and a second passivation layer covering the second power/ground ring and the first passivation layer.
Abstract:
Compounds and methods are provided for the treatment of, inter alia, Type II diabetes and other diseases associated with poor glycemic control.
Abstract:
The present invention is directed to certain novel triazole compounds represented by Formula I and pharmaceutically acceptable salts, solvates, hydrates, and prodrugs thereof. The present invention is also directed to methods of making and using such compounds and pharmaceutical compositions containing such compounds to treat or control a number of diseases mediated by PPAR such as glucose metabolism, lipid metabolism and insulin secretion, specifically Type 2 diabetes, hyperinsulemia, hyperlipidemia, hyperuricemia, hypercholesteremia, atherosclerosis, one or more risk factors for cardiovascular disease, Syndrome X, hypertriglyceridemia, hyperglycemia, obesity, and eating disorders.
Abstract:
A method comprising over an area of a substrate, forming a plurality of three dimensional first structures; following forming the first structures, conformally introducing a sacrificial material over the area of the substrate; introducing a second structural material over the sacrificial material; and removing the sacrificial material. An apparatus comprising a first structure on a substrate; and a second structure on the substrate and separated from the first structure by an unfilled gap defined by the thickness of a removed film.
Abstract:
The present invention relates to a chip package that includes a semiconductor device and at least one micro electromechanical structure (MEMS) such that the semiconductor device and the MEMS form an integrated package. One embodiment of the present invention includes a semiconductor device, a first MEMS device disposed in a conveyance such as a film, and a second MEMS device disposed upon the semiconductor device through a via in the conveyance.The present invention also relates to a process of forming a chip package that includes providing a conveyance such as a tape automated bonding (TAB) structure, that may hold at least one MEMS device. The method is further carried out by disposing the conveyance over the active surface of the device in a manner that causes the at least one MEMS to communicate electrically to the active surface. Where appropriate, a sealing structure such as a solder ring may be used to protect the MEMS.
Abstract:
The present invention discloses an automatic linear-motion and tilt-angle control apparatus for an image-capture device inside a photography light box, which includes: a photography light box, a linear-motion module, a rotation module, and a fixing seat. The linear-motion module further includes: servo motors, ball screws, linear sliding rails and a sliding table to implement the horizontal and vertical motions of an image-capture device inside the photography light box. The rotation module includes: stepping motors, worm gears, and worm wheels to rotate the image-capture device when the linear-motion module moves the image-capture device horizontally, and tilts the image-capture device when the linear-motion module moves the image-capture device vertically to an appropriate height so that the image-capture device can be aimed at the object. The fixing seat is used to fix the image-capture device and disposed on a rotation table in an emptied hole.
Abstract:
A method of remote capture with user interface providing separate inside- and outside-light-box modes is provided, wherein when the user selects the inside-light-box mode together with an automatic mode to take a photograph, it is the photographic parameters, which are obtained experimentally for various cameras under given light sources, but not the photographic parameters, which are automatically generated by the light sensor of the camera, that are utilized to control the camera. Via the inside-light-box mode together with the automatic mode, an image in good qualities is acquired.
Abstract:
A microelectromechanical (MEMS) resonator with a vacuum-cavity is fabricated using polysilicon-enabled release methods. A vacuum-cavity surrounding the MEMS beam is formed by removing release material that surrounds the beam and sealing the resulting cavity under vacuum by depositing a layer of nitride over the structure. The vacuum-cavity MEMS resonators have cantilever beams, bridge beams or breathing-bar beams.
Abstract:
The invention relates to a process of forming an on-chip package inductor. The process includes providing a substrate with at least one microelectronic device packaged therewith. As part of the inventive process, electrical communication is formed for the microelectronic device. The electrical communication includes at least two electrically conductive layers. As part of the inventive technology, the inductor is patterned on the substrate before, during, or after formation of the electrical communication. The inductor is connected to the at least one microelectronic device.
Abstract:
A method of forming a dielectric layer suitable for use as the gate dielectric layer of a metal-oxide-semiconductor field effect transistor (MOSFET) includes oxidizing the surface of a silicon substrate, forming a metal layer over the oxidized surface, and reacting the metal with the oxidized surface to form a substantially intrinsic layer of silicon superjacent the substrate, wherein at least a portion of the silicon layer may be an epitaxial silicon layer, and a metal oxide layer superjacent the silicon layer. In a further aspect of the present invention, an integrated circuit includes a plurality of MOSFETs, wherein various ones of the plurality of transistors have metal oxide gate dielectric layers and substantially intrinsic silicon layers subjacent the metal oxide dielectric layers.