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110 条记录 (耗时 0.023 秒)

    Modified electroplating solution components in a low-acid electrolyte solution
    31.
    发明授权
    Modified electroplating solution components in a low-acid electrolyte solution 有权
    改性电镀溶液成分在低酸电解液中

    公开(公告)号：US07371311B2

    公开(公告)日：2008-05-13

    申请号：US10682276

    申请日：2003-10-08

    申请人： Daniel J Zierath ,  Vinay Chikarmane ,  Valery M Dubin

    发明人： Daniel J Zierath ,  Vinay Chikarmane ,  Valery M Dubin

    IPC分类号： C25D3/38 ,  C25D21/18

    CPC分类号： C25D21/12

    摘要： An embodiment of the invention provides a method for reducing within die thickness variations by modifying the concentration of components of a low-acid electroplating solution. For one embodiment, the leveler concentration is increased sufficiently to reduce within die thickness variations to a specified value. For one embodiment of the invention, the leveler and suppressor are increased to reduce within die thickness variations and substantially reduce a plurality of electroplating defects. In such an embodiment the combined concentration of leveler and suppressor is determined to maintain adequate gap fill.

    摘要翻译： 本发明的一个实施方案提供了一种通过改变低酸性电镀溶液的组分浓度来减小模内厚度变化的方法。 对于一个实施例，调平器浓度被充分增加以将模具厚度变化减小到指定值。 对于本发明的一个实施例，矫直机和抑制器增加以减小模内厚度变化并且基本上减少多个电镀缺陷。 在这样的实施例中，确定矫直机和抑制器的组合浓度以保持足够的间隙填充。

    Method and apparatus for an improved air gap interconnect structure
    33.
    发明授权
    Method and apparatus for an improved air gap interconnect structure 有权
    用于改进气隙互连结构的方法和装置

    公开(公告)号：US07304388B2

    公开(公告)日：2007-12-04

    申请号：US10608948

    申请日：2003-06-26

    申请人： Valery M. Dubin ,  Peter K. Moon

    发明人： Valery M. Dubin ,  Peter K. Moon

    IPC分类号： H01L23/48

    CPC分类号： H01L21/76843 ,  H01L21/7682 ,  H01L21/76849 ,  H01L21/7685 ,  H01L21/76879 ,  H01L23/5222 ,  H01L23/5226 ,  H01L23/53223 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

    摘要： In one embodiment, an apparatus comprises a first layer having at least one interconnect formed in an interlayer dielectric (ILD), a second layer formed over the first layer having a second at least one interconnect, a third layer formed over the second layer, the third layer defining at least one air gap between the second at least one interconnect and the third layer, and at least one shunt selectively covering the first and second at least one interconnects. In another embodiment, a method comprises forming a first layer comprising an ILD and a first at least one interconnect, forming a second layer over the first layer, the second layer having a second at least one interconnect, depositing at least one shunt over the first and second at least one interconnects, forming a third layer over the second layer, and evaporating a portion of the second layer to create at least one air gap between the second at least one interconnect and the third layer.

    摘要翻译： 在一个实施例中，一种装置包括具有在层间电介质（ILD）中形成的至少一个互连的第一层，在第一层上形成的具有第二至少一个互连的第二层，在第二层上形成的第三层， 第三层限定第二至少一个互连和第三层之间的至少一个空气间隙，以及至少一个分流器，其选择性地覆盖第一和第二至少一个互连。 在另一个实施例中，一种方法包括形成包括ILD和第一至少一个互连的第一层，在第一层上形成第二层，第二层具有第二至少一个互连，在第一层上沉积至少一个分流 以及第二至少一个互连，在所述第二层上形成第三层，以及蒸发所述第二层的一部分以在所述第二至少一个互连和所述第三层之间产生至少一个空气间隙。

    Method of copper electroplating
    40.
    发明授权
    Method of copper electroplating 有权
    铜电镀方法

    公开(公告)号：US06432821B1

    公开(公告)日：2002-08-13

    申请号：US09739930

    申请日：2000-12-18

    申请人： Valery M. Dubin ,  Dave W. Jentz ,  Christopher Collazo-Davila

    发明人： Valery M. Dubin ,  Dave W. Jentz ,  Christopher Collazo-Davila

    IPC分类号： H01L2144

    CPC分类号： H01L21/2885 ,  C25D5/18 ,  C25D7/123 ,  H01L21/7684 ,  H01L21/76877

    摘要： An electroplating process for filling damascene structures on substrates, such as wafers having partially fabricated integrated circuits thereon, includes immersing a substrate, under bias, into a copper plating solution to eliminate thin seed layer dissolution and reduce copper oxide, an initiation step to repair discontinuities in a copper seed layer, superfill plating to fill the smallest features, reverse plating to remove the adsorbed plating additives and their by-products from the substrate, a second superfill plating to fill intermediate size features, a second reverse plating to remove adsorbed plating additives and their by-products from the substrate, and a bulk fill plating with high current density to fill large features. The superfill and reverse plating operations may be repeated more than twice prior to bulk filling in order to provide the desired surface morphology.

    摘要翻译： 用于在基板上填充镶嵌结构的电镀工艺，例如其上具有部分制造的集成电路的晶片，包括将偏压下的基板浸入镀铜溶液中以消除薄的种子层溶解并减少氧化铜，修复不连续性的起始步骤 在铜种子层中，填充电镀以填补最小的特征，反向电镀以从基底去除吸附的电镀添加剂及其副产物，第二填充电镀以填充中间尺寸特征，第二反向电镀以除去吸附的电镀添加剂 及其从基材的副产物，以及具有高电流密度的填充电镀填充大的特征。 为了提供所需的表面形态，超填充和反向电镀操作可以在批量填充之前重复两次以上。