摘要:
In a fuel cell comprising a stack having superposed a plurality of electromotive parts composed of a fuel electrode, an oxidizing electrode, and an electrolyte layer nipped by the two electrodes and using a liquid fuel as the fuel for the fuel cell, this invention contemplates forming a liquid fuel introducing path destined to be directly exposed to the liquid fuel on terminal surfaces of the component parts of the electromotive parts in a direction perpendicular to the flow of an oxidizing gas along at least one of the outer peripheral surfaces of the stack including the terminal surface of the fuel electrode and lying parallelly to the flow of the oxidizing gas and enabling the liquid fuel in the liquid fuel introducing path to be supplied to the fuel electrodes by a capillary attraction. A fuel cell provided with means for recovery of the water produced by the cell reaction in the oxidizing electrodes is also disclosed, which fuel cell effects the removal of the water produced in the oxidizing electrodes during the operation of the fuel cell by a capillary attraction generated by two porous members.
摘要:
Disclosed in an N-type MISFET having the LDD structure in which the short-channel effect is reduced by employing arsenic, which has a smaller diffusion coefficient value than that of phosphorus, to form low- and high-impurity concentration regions which constitute in combination source and drain regions of the MISFET.
摘要:
Disclosed are memory cells of a vertical-type read only memory (ROM) having a plurality of MISFETs connected in series. The MISFETs include gate electrodes formed with multiple conductive layers, in which some of the MISFETs are set to the depletion type and at least some of the remaining MISFETs are set to the enhancement type, so as to write information in the memory cells. The information write operation is conducted through at least two steps. Namely, in the first information write step, gate electrodes are used as a mask to implant an impurity; and in the second step, an impurity is implanted through the gate electrodes into the surface of the semiconductor substrate. These steps enable a semiconductor memory device, such as a vertical-type mask ROM having memory cells with a reduced series resistance and being suitable for a high degree of integration, to be produced.Furthermore, there is disclosed a memory structure of a semiconductor memory device suitable for a higher degree of integration through an arrangement of gate electrodes of multiple layers.
摘要:
The pressurized water reactor according an embodiment comprises: a cylindrical reactor pressure vessel (1) to which inlet nozzles are connected; fuel assemblies which are contained within the reactor pressure vessel (1); a cylindrical reactor core barrel (3) which surrounds the fuel assemblies and forms an annular downcomer (6) between the reactor core barrel (3) and the inner surface of the reactor pressure vessel (1); and radial supports. The radial supports are supports which are arranged below the downcomer (6) at intervals in the circumferential direction, each has vertical flow path formed therein, and position the reactor core barrel (3) and the reactor pressure vessel (1). The radial supports each has, for example, a flow path-equipped radial keys (21) and a key groove member (40).
摘要:
A FinFET and nanowire transistor with strain direction optimized in accordance with the sideface orientation and carrier polarity and an SMT-introduced manufacturing method for achieving the same are provided. A semiconductor device includes a pMISFET having a semiconductor substrate, a rectangular solid-shaped semiconductor layer formed at upper part of the substrate to have a top surface parallel to a principal plane of the substrate and a sideface with a (100) plane perpendicular to the substrate's principal plane, a channel region formed in the rectangular semiconductor layer, a gate insulating film formed at least on the sideface of the rectangular layer, a gate electrode on the gate insulator film, and source/drain regions formed in the rectangular semiconductor layer to interpose the channel region therebetween. The channel region is applied a compressive strain in the perpendicular direction to the substrate principal plane. A manufacturing method of the device is also disclosed.
摘要:
A random number generation device includes: a first source region; a first drain region; a first channel region provided between the first source region and the first drain region; a first insulating film provided on the first channel region; and a first gate electrode provided on the first insulating film. The first insulating film has a trap capturing and releasing a charge, and a tensile or compressive stress is applied in a direction of a gate length to at least one of the first channel region and the first insulating film.
摘要:
A semiconductor device capable of realizing low-voltage drivability and large storage capacity (miniaturization) by achieving large threshold voltage shifts and long retention time while at the same time suppressing variations in characteristics among memory cells is disclosed. The device includes a semiconductor memory cell having a channel region formed in a semiconductor substrate, a tunnel insulator film on the channel region, a charge storage insulator film on the tunnel insulator film, a control dielectric film on the charge storage film, a control electrode on the control dielectric film, and source/drain regions at opposite ends of the channel region. The memory cell's channel region has a cross-section at right angles to a direction along the channel length, the width W and height H of which are each less than or equal to 10 nm.
摘要:
A logic apparatus comprises a first single-electron device formed of a first conductive island, two first tunnel barriers with the first conductive island interposed, first and second electrodes, and a first charge storage region, and a second single-electron device formed of a second conductive island, second tunnel barriers with the second island interposed, third and fourth electrodes, and a second charge storage region, the first electrode of the first single-electron device being connected to the third electrode of the second single-electron device being connected to each other.
摘要:
A static random access memory has first and second complementary field-effect transistors. The first complementary field-effect transistor includes a semiconductor substrate, a first field-effect transistor of electron conduction type which has a first drain region constituting a Schottky junction and a gate electrode, and a first field-effect transistor of positive hole conduction type which shares the first drain region and has a shared gate electrode. The second complementary field-effect transistor includes a second field-effect transistor of electron conduction type which has a second drain region and a gate electrode, a second field-effect transistor of positive hole conduction type which shares the second drain region and has a shared gate electrode. The gate electrode shared by the first and second complementary field-effect transistors is connected to the common drain region of the mutually opposing complementary field-effect transistors, and the static random access memory has superior resistance to software errors.
摘要:
Disclosed are an organic silicon compound having a repeating unit represented by general formula (I) shown below, a resist, a thermal polymerization composition and a photopolymerization composition containing the organic silicon compound, ##STR1## wherein R.sup.1 is a t-butyl group or a pyranyl group, R.sup.2 is an hydrogen atom, a substituted or unsubstituted alkyl group having 1 to 24 carbon atoms, a substituted or unsubstituted aryl group having 1 to 24 carbon atoms, or a substituted or unsubstituted aralkyl having 7 to 24 carbon atoms, R.sup.3 is a substituted or unsubstituted alkyl group having 1 to 24 carbon atoms, a substituted or unsubstituted aryl group having 6 to 24 carbon atoms, a substituted or unsubstituted aralkyl group having 7 to 24 carbon atoms or an alkoxyl group, and k represents an integer from 0 to 4.