Array substrate and its manufacturing method
    32.
    发明授权
    Array substrate and its manufacturing method 有权
    阵列基板及其制造方法

    公开(公告)号:US09059293B2

    公开(公告)日:2015-06-16

    申请号:US13967536

    申请日:2013-08-15

    CPC classification number: H01L29/78642 H01L27/1214 H01L29/786 H01L29/78663

    Abstract: An array substrate comprises a substrate, a gate electrode, a source electrode and a drain electrode, the source electrode and the drain electrode being provided in different areas on the substrate and the vertical projections of the source electrode and the drain electrode on the substrate having an overlapping area; a semiconductor layer formed between the source electrode and the drain electrode, a vertical projection of the semiconductor layer on the substrate having overlapping areas with the vertical projections of the source electrode and the drain electrode on the substrate; a first insulating layer formed on the substrate while below the gate electrode and covering the source electrode or the drain electrode; a pixel electrode, a gate line, and a data line. A manufacturing method for the array substrate is also disclosed.

    Abstract translation: 阵列基板包括基板,栅电极,源电极和漏电极,源电极和漏电极设置在基板上的不同区域中,并且源电极和漏电极的垂直突起在基板上具有 重叠区域; 形成在源电极和漏电极之间的半导体层,衬底上的半导体层的垂直投影,其具有与源电极和漏电极的垂直突起重叠的区域; 第一绝缘层,形成在所述基板上,同时在所述栅电极下方并覆盖所述源电极或所述漏极; 像素电极,栅极线和数据线。 还公开了阵列基板的制造方法。

    Display substrate and preparation method thereof, and display apparatus

    公开(公告)号:US12284903B2

    公开(公告)日:2025-04-22

    申请号:US17795547

    申请日:2021-09-27

    Abstract: Provided is a display substrate including a flexible base substrate, a first filling layer, and an encapsulation layer. The flexible base substrate includes at least one stretch display region. The stretch display region includes multiple pixel island regions spaced apart from each other, multiple hole regions, and a connection bridge region located between a pixel island region and a hole region. At least one hole region is provided with one or more first through holes penetrating the flexible base substrate. The first filling layer is located in the hole region and is filled in a first through hole. The encapsulation layer is located on a side of the first filling layer away from the flexible base substrate, and an orthographic projection of the encapsulation layer on the flexible base substrate is partially overlapped with or is not overlapped with the first filling layer.

    Display panel and method for manufacturing the same, display device

    公开(公告)号:US11513647B2

    公开(公告)日:2022-11-29

    申请号:US17245134

    申请日:2021-04-30

    Abstract: A display panel, a method for manufacturing the same and a display device are provided. The display panel includes a substrate and a packaging layer. An edge of a first side of the packaging layer has a first slope. Touch lines are disposed on a side of the packaging layer away from the substrate, an extending direction of at least a portion of the touch lines is crossed with an extending direction of the edge of the packaging layer with the first slope. The touch lines include first lines, second lines and a first insulating layer. The second lines are electrically coupled to the first lines through vias in the first insulating layer. An orthographic projection of at least a portion of the first lines on the substrate is not overlapped with an orthographic projection of a portion of the packaging layer with the first slope on the substrate.

    DISPLAY SUBSTRATE, DISPLAY PANEL AND METHOD FOR PREPARING DISPLAY SUBSTRATE

    公开(公告)号:US20220093654A1

    公开(公告)日:2022-03-24

    申请号:US17333098

    申请日:2021-05-28

    Abstract: Disclosed in embodiments of the present disclosure are a display substrate, a display panel, and a method for preparing the display substrate. The display substrate includes: a base substrate; a first source-drain layer, including first source-drain electrodes in the first area, and a first gate located in the second area; a first active layer, including a poly-silicon active layer located in the first area; a first gate layer, including a second gate and a connecting electrode located in the first area; a second active layer, including an oxide active layer located in the second area; a second gate layer, including a third gate located in the second area; and a second source-drain layer, including a second source-drain electrodes in the second area, and a lapping electrode located in the first area.

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