公开(公告)号：US07863970B2

公开(公告)日：2011-01-04

申请号：US12180740

申请日：2008-07-28

申请人： Hirofumi Uchida ,  Takashi Honda

发明人： Hirofumi Uchida ,  Takashi Honda

IPC分类号： G05F1/10 ,  G05F3/02

CPC分类号： G09G3/3216 ,  G09G3/3283 ,  G09G2310/0272 ,  G09G2310/0275 ,  G09G2310/0291 ,  G09G2320/0223

摘要： A current source device having a plurality of current output circuits each including a current output FET, first and second switch FETs respectively series-connected to source and drain sides of the current output FET to form a series circuit, a source voltage supply which applies a positive-side potential of a source voltage to the first switch FET and applies a negative-side potential of the source voltage to the second switch FET to supply the source voltage to the series circuit, and an output terminal connected between the current output FET and the second switch FET; and a gate voltage supply circuit which supplies a common gate voltage to the gates of the current output FETs, wherein each of the current output circuits further includes a third switch FET provided between the current output FET and the second switch FET.

摘要翻译： 一种电流源装置，具有多个电流输出电路，每个电流输出电路各自包括电流输出FET，分别串联连接到电流输出FET的源极和漏极侧的第一和第二开关FET，以形成串联电路;源极电压源， 将源电压的正侧电位施加到第一开关FET，并将源极电压的负侧电位施加到第二开关FET，以向串联电路提供源极电压，以及连接在电流输出FET和 第二开关FET; 以及栅极电压提供电路，其向所述电流输出FET的栅极提供公共栅极电压，其中每个所述电流输出电路还包括设置在所述电流输出FET和所述第二开关FET之间的第三开关FET。

公开(公告)号：US20090052568A1

公开(公告)日：2009-02-26

申请号：US12147618

申请日：2008-06-27

申请人： Hirofumi Uchida ,  Takashi Honda

发明人： Hirofumi Uchida ,  Takashi Honda

IPC分类号： H04L5/12 ,  H04L27/06

CPC分类号： H04L27/0008 ,  H04L1/0003 ,  H04L27/36 ,  H04L27/38

摘要： In a quadrature amplitude modulation (QAM) communication system and corresponding method, and a QAM receiving apparatus and corresponding method, a sending apparatus that generates a sending signal adds CRC bits thereto. In a receiving apparatus, data rate is determined without a 16QAM demapping circuit and/or notification of the data rate, by 64QAM demapping a symbol string based on the received signal using a demapping circuit, independently of whether 16QAM or 64QAM was used on the sent signal. A bit string is thus obtained, and by thinning the bit string responsive to a CRC detection result of a CRC detection circuit, an output signal is provided using a thinning circuit.

摘要翻译： 在正交幅度调制（QAM）通信系统及相应方法中，以及QAM接收装置及相应的方法，产生发送信号的发送装置向其添加CRC比特。 在接收装置中，无需16QAM解映射电路和/或数据速率的通知来确定数据速率，并通过64QAM使用解映射电路基于接收信号对符号串进行解映射，而与发送的16QAM或64QAM是否一致 信号。 由此获得位串，并且通过根据CRC检测电路的CRC检测结果对位串进行稀疏化，使用稀疏电路提供输出信号。

公开(公告)号：US07385233B2

公开(公告)日：2008-06-10

申请号：US11220657

申请日：2005-09-08

申请人： Hirofumi Uchida

发明人： Hirofumi Uchida

IPC分类号： H01L27/10

CPC分类号： H01L27/11807 ,  H01L27/0207 ,  H01L27/092

摘要： A gate array integrated circuit forming part of a semiconductor integrated circuit includes a basic layer of a unit cell in which a PMOS and an NMOS transistor are connected with a poly-silicon strip. The poly-silicon strip has gate terminal regions formed to laterally extend to allow two or more contact pads or through-holes to be disposed in each gate terminal region. It is thus possible to improve wiring efficiency and also micro-miniaturization and yield of the gate array integrated circuit. A layout method for a gate array integrated circuit is also provided.

摘要翻译： 形成半导体集成电路的一部分的门阵列集成电路包括其中PMOS和NMOS晶体管与多晶硅条连接的单元电池的基本层。 多晶硅带具有形成为横向延伸的栅极端子区域，以允许在每个栅极端子区域中设置两个或更多个接触焊盘或通孔。 因此，可以提高栅极阵列集成电路的布线效率以及微小型化和成品率。 还提供了用于门阵列集成电路的布局方法。

公开(公告)号：US06192579B1

公开(公告)日：2001-02-27

申请号：US09211797

申请日：1998-12-15

申请人： Mamoru Hayashi ,  Kiyokazu Sato ,  Hirofumi Uchida ,  Yoshinori Miyajima

发明人： Mamoru Hayashi ,  Kiyokazu Sato ,  Hirofumi Uchida ,  Yoshinori Miyajima

IPC分类号： H05K302

CPC分类号： H01L23/4985 ,  H01L23/49816 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/16237 ,  H01L2224/451 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K1/0393 ,  H05K1/112 ,  H05K2201/0355 ,  H05K2201/0394 ,  H05K2201/09472 ,  H05K2201/09827 ,  H05K2203/0195 ,  H05K2203/041 ,  H05K2203/063 ,  Y10T29/49117 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2924/00015 ,  H01L2224/05599 ,  H01L2924/00 ,  H01L2924/00012

摘要： There is provided a tape carrier in which the degree of freedom of a fine wiring pattern is enhanced by reducing the diameter of a via pad so that the pitch of the wiring pattern can be made fine, and a metallic ball can be positively joined to the via pad even if the diameter of the metallic ball is extended to as large as possible. A tape carrier comprises: a metallic wiring 3 formed on one side of a tape base material 1 through an adhesive layer 2; and a plurality of via holes 4 formed on the other side of the tape base material 1, via pads 3b of the metallic wiring 3 being exposed to the plurality of via holes 4, wherein internal wall surfaces of the via holes, which have been formed by punching the tape material 5, on one side of which the adhesive layer 2 is formed, are subjected to coining-press from the other side of the tape base material 1, so that the via holes 4 are formed into tapered holes 7, the diameters of the opening portions 6 of which are extended.

摘要翻译： 提供了一种带载体，其中通过减小通孔焊盘的直径来增强精细布线图案的自由度，使得布线图案的间距可以做得很细，并且金属球可以被正确地接合到 通过垫，即使金属球的直径尽可能地扩大。 带状载体包括：通过粘合剂层2形成在带基材1的一侧上的金属布线3; 以及形成在带基材1的另一侧上的多个通孔4，通过金属布线3的焊盘3b暴露于多个通孔4，其中形成有通孔的内壁表面 通过冲压形成粘合剂层2的一侧的带材5从带基材1的另一侧进行压印加压，使得通孔4形成为锥形孔7， 其开口部分6的直径延伸。

公开(公告)号：US5365107A

公开(公告)日：1994-11-15

申请号：US70968

申请日：1993-06-04

申请人： Fumio Kuraishi ,  Norio Wada ,  Hirofumi Uchida

发明人： Fumio Kuraishi ,  Norio Wada ,  Hirofumi Uchida

IPC分类号： H01L21/56 ,  H01L23/28 ,  H01L23/29 ,  H01L23/433 ,  H01L23/495 ,  H01L23/552 ,  H01L23/02

CPC分类号： H01L23/4334 ,  H01L23/49572 ,  H01L23/552 ,  H01L2224/16 ,  H01L2224/16245 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2924/3025

摘要： A semiconductor device has a semiconductor element mounted on inner leads of a TAB tape and first and second heat radiator elements having respective first and second peripheral flanges which cooperatively engage and thereby support the TAB tape in a sandwich manner therebetween, at least one heat radiator member having a central portion protruding toward and providing a support for the semiconductor element. A sealing resin fills the space between the heat radiator members and thereby integrally interconnects and hermetically seals interior surfaces of the leads of the TAB tape. A central portion of at least one of the heat radiator members protrudes toward and provides a support for the semiconductor element.

摘要翻译： 半导体器件具有安装在TAB带的内引线上的半导体元件，以及第一和第二散热器元件，第一和第二散热器元件具有相应的第一和第二外围法兰，第一和第二外围法兰协同地接合，从而以夹层的方式支撑TAB带，至少一个散热器构件 具有向半导体元件突出并提供用于半导体元件的支撑的中心部分。 密封树脂填充散热器构件之间的空间，从而整体地互连并气密地密封TAB带的引线的内表面。 至少一个散热器构件的中心部分向半导体元件突出并提供用于半导体元件的支撑。

公开(公告)号：US5087530A

公开(公告)日：1992-02-11

申请号：US450067

申请日：1989-12-13

申请人： Norio Wada ,  Katsuya Fukase ,  Hirofumi Uchida

发明人： Norio Wada ,  Katsuya Fukase ,  Hirofumi Uchida

IPC分类号： H01L21/60 ,  H01L21/027 ,  H01L21/30 ,  H01L23/495 ,  H05K1/02

CPC分类号： H01L23/49572 ,  H01L2924/0002 ,  H05K1/0218 ,  Y10T428/12361 ,  Y10T428/12542 ,  Y10T428/12889 ,  Y10T428/12903

摘要： A TAB tape or tape-like carrier used for an automatic bonding process when manufacturing high-frequency semiconductor devices has a plurality of electrically conductive circuit patterns on a flexible insulative film having a plurality of holes located in gaps between adjacent circuit pattterns. A ground layer is formed on a back surface of the insulative film, and electrically conductive layers or material are formed on inner peripherals walls of the holes or filled in the holes, so that the ground layer is electrically connected to the respective conductive layers or material.

摘要翻译： 在制造高频半导体器件时用于自动接合工艺的TAB带或带状载体在柔性绝缘膜上具有多个导电电路图案，该柔性绝缘膜具有位于相邻电路模块之间的间隙中的多个孔。 在绝缘膜的后表面上形成接地层，并且在孔的内周壁上形成导电层或材料，或者填充在孔中，使得接地层电连接到相应的导电层或材料 。

公开(公告)号：US4969257A

公开(公告)日：1990-11-13

申请号：US240216

申请日：1988-09-06

申请人： Takeshi Sato ,  Katsuya Fukase ,  Hirofumi Uchida ,  Kiyotaka Shimada

发明人： Takeshi Sato ,  Katsuya Fukase ,  Hirofumi Uchida ,  Kiyotaka Shimada

IPC分类号： H05K3/20 ,  H05K3/38

CPC分类号： H05K3/20 ,  H05K2201/09118 ,  H05K2203/0156 ,  H05K3/382 ,  Y10T29/49147 ,  Y10T29/49158

摘要： A transfer sheet includes an electrodeposited metal foil having a smooth surface and a rough surface attached to a heatproof flexible base sheet. Using such a transfer sheet, a circuit substrate is formed by etching the electrodeposited metal foil to form a circuit pattern, placing the transfer sheet into a cavity of a mold in such a manner that the rough surface of the circuit pattern faces an inside of the mold cavity, pouring a melting resin into the mold cavity to form a molded article, and peeling the transfer sheet from the molded article so that the circuit pattern remains on the resin base.

摘要翻译： 转印片包括具有光滑表面的电沉积金属箔和附着在耐热柔性基片上的粗糙表面。 使用这样的转印片，通过蚀刻电沉积金属箔形成电路图案形成电路基板，将转印片放置在模具的空腔中，使得电路图案的粗糙表面朝向 模具腔，将熔融树脂倒入模腔中以形成模制品，并将转印片从模制品上剥离，使得电路图案残留在树脂基底上。