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    Automatic bonding tape used in semiconductor device
    1.
    发明授权
    Automatic bonding tape used in semiconductor device 失效
    半导体器件中使用的自动粘合胶带

    公开(公告)号：US5183711A

    公开(公告)日：1993-02-02

    申请号：US706155

    申请日：1991-05-28

    申请人： Norio Wada ,  Katsuya Fukase ,  Hirofumi Uchida

    发明人： Norio Wada ,  Katsuya Fukase ,  Hirofumi Uchida

    IPC分类号： H01L23/495 ,  H05K1/02

    CPC分类号： H01L23/49572 ,  H01L2924/0002 ,  H05K1/0218 ,  Y10T428/12361 ,  Y10T428/12569

    摘要： A TAB tape or tape-like carrier used for an automatic bonding process when manufacturing high-frequency semiconductor devices has a plurality of electrically conductive circuit patterns on a flexible insulative film having a plurality of holes located in gaps between adjacent circuit patterns. A ground layer is formed on a back surface of the insulative film, and electrically conductive layers or material are formed on inner peripherals walls of the holes or filled in the holes, so that the ground layer is electrically connected to the respective condcutive layers or material.

    摘要翻译： 在制造高频半导体器件时用于自动接合工艺的TAB带或带状载体在柔性绝缘膜上具有多个导电电路图案，该柔性绝缘膜具有位于相邻电路图案之间的间隙中的多个孔。 在绝缘膜的后表面上形成接地层，并且在孔的内周壁上形成导电层或材料，或填充在孔中，使得接地层与相应的固化层或材料电连接 。

    Automatic bonding tape used in semiconductor device
    2.
    发明授权
    Automatic bonding tape used in semiconductor device 失效
    半导体器件中使用的自动粘合胶带

    公开(公告)号：US5087530A

    公开(公告)日：1992-02-11

    申请号：US450067

    申请日：1989-12-13

    申请人： Norio Wada ,  Katsuya Fukase ,  Hirofumi Uchida

    发明人： Norio Wada ,  Katsuya Fukase ,  Hirofumi Uchida

    IPC分类号： H01L21/60 ,  H01L21/027 ,  H01L21/30 ,  H01L23/495 ,  H05K1/02

    CPC分类号： H01L23/49572 ,  H01L2924/0002 ,  H05K1/0218 ,  Y10T428/12361 ,  Y10T428/12542 ,  Y10T428/12889 ,  Y10T428/12903

    摘要： A TAB tape or tape-like carrier used for an automatic bonding process when manufacturing high-frequency semiconductor devices has a plurality of electrically conductive circuit patterns on a flexible insulative film having a plurality of holes located in gaps between adjacent circuit pattterns. A ground layer is formed on a back surface of the insulative film, and electrically conductive layers or material are formed on inner peripherals walls of the holes or filled in the holes, so that the ground layer is electrically connected to the respective conductive layers or material.

    摘要翻译： 在制造高频半导体器件时用于自动接合工艺的TAB带或带状载体在柔性绝缘膜上具有多个导电电路图案，该柔性绝缘膜具有位于相邻电路模块之间的间隙中的多个孔。 在绝缘膜的后表面上形成接地层，并且在孔的内周壁上形成导电层或材料，或者填充在孔中，使得接地层电连接到相应的导电层或材料 。

    Transfer sheet and process for making a circuit substrate
    3.
    发明授权
    Transfer sheet and process for making a circuit substrate 失效
    转印纸和制作电路基板的工艺

    公开(公告)号：US4969257A

    公开(公告)日：1990-11-13

    申请号：US240216

    申请日：1988-09-06

    申请人： Takeshi Sato ,  Katsuya Fukase ,  Hirofumi Uchida ,  Kiyotaka Shimada

    发明人： Takeshi Sato ,  Katsuya Fukase ,  Hirofumi Uchida ,  Kiyotaka Shimada

    IPC分类号： H05K3/20 ,  H05K3/38

    CPC分类号： H05K3/20 ,  H05K2201/09118 ,  H05K2203/0156 ,  H05K3/382 ,  Y10T29/49147 ,  Y10T29/49158

    摘要： A transfer sheet includes an electrodeposited metal foil having a smooth surface and a rough surface attached to a heatproof flexible base sheet. Using such a transfer sheet, a circuit substrate is formed by etching the electrodeposited metal foil to form a circuit pattern, placing the transfer sheet into a cavity of a mold in such a manner that the rough surface of the circuit pattern faces an inside of the mold cavity, pouring a melting resin into the mold cavity to form a molded article, and peeling the transfer sheet from the molded article so that the circuit pattern remains on the resin base.

    摘要翻译： 转印片包括具有光滑表面的电沉积金属箔和附着在耐热柔性基片上的粗糙表面。 使用这样的转印片，通过蚀刻电沉积金属箔形成电路图案形成电路基板，将转印片放置在模具的空腔中，使得电路图案的粗糙表面朝向 模具腔，将熔融树脂倒入模腔中以形成模制品，并将转印片从模制品上剥离，使得电路图案残留在树脂基底上。

    Process for forming a circuit substrate
    4.
    发明授权
    Process for forming a circuit substrate 失效
    用于形成电路基板的工艺

    公开(公告)号：US4867839A

    公开(公告)日：1989-09-19

    申请号：US240213

    申请日：1988-09-06

    申请人： Takeshi Sato ,  Katsuya Fukase ,  Kiyotaka Shimada ,  Hirofumi Uchida

    发明人： Takeshi Sato ,  Katsuya Fukase ,  Kiyotaka Shimada ,  Hirofumi Uchida

    IPC分类号： B29C45/37 ,  H01L21/56 ,  H05K3/18 ,  H05K3/38

    CPC分类号： H01L21/565 ,  B29C45/372 ,  H05K3/381 ,  H01L2924/0002 ,  H01L2924/15312 ,  H05K2203/1152 ,  H05K3/181 ,  Y10T29/49158

    摘要： A process for forming a circuit substrate comprising placing an electrodeposited metal foil having a rough surface provided with a large number of fine projections in a cavity of a mold in such a manner that the rough surface faces an inside of the mold cavity; pouring a melting resin into the mold cavity to form a molded article; peeling the metal foil from the molded article to form a large number of fine concavities corresponding to the projections; electroless-plating the resin base to form a metal film; and photoetching to form a circuit pattern on the resin base.

    摘要翻译： 一种形成电路基板的方法，包括将具有大量微细突起的粗糙表面的电沉积金属箔放置在模具的空腔中，使粗糙表面面对模腔内; 将熔融树脂浇注到模腔中以形成模制品; 从成形品剥离金属箔，形成与突起对应的大量细小凹部; 对树脂基底进行化学镀以形成金属膜; 并进行光刻以在树脂基底上形成电路图案。

    Circuit board and method of manufacturing the same
    7.
    发明授权
    Circuit board and method of manufacturing the same 有权
    电路板及其制造方法

    公开(公告)号：US08161636B2

    公开(公告)日：2012-04-24

    申请号：US12272048

    申请日：2008-11-17

    申请人： Kishio Yokouchi ,  Hideaki Yoshimura ,  Katsuya Fukase

    发明人： Kishio Yokouchi ,  Hideaki Yoshimura ,  Katsuya Fukase

    IPC分类号： H01K3/10

    CPC分类号： H05K1/0366 ,  H05K3/445 ,  H05K3/4641 ,  H05K2201/0278 ,  H05K2201/029 ,  H05K2201/0323 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165

    摘要： A circuit board has plated through holes which are laid out with a fine pitch and meets requirements relating to characteristics such as the thermal expansion coefficient of the circuit board. A method of manufacturing a circuit board includes: a step of forming a core portion by thermal compression bonding prepregs which include first fibers that conduct electricity and second fibers that do not conduct electricity, which have the second fibers disposed at positions where plated through holes will pass through, and which are impregnated with resin; a step of forming through holes at positions in the core portion where the second fibers are disposed; and a step of forming a conductive layer on inner surfaces of the through holes to form plated through holes at positions that do not interfere with the first fibers and thereby produce a core substrate.

    摘要翻译： 电路板具有以细间距布置的电镀通孔，并满足与电路板的热膨胀系数等特性相关的要求。 一种制造电路板的方法包括：通过热压接预浸料形成芯部的步骤，该预浸料包括导电的第一纤维和不导电的第二纤维，其中第二纤维布置在镀通孔的位置 通过，并用树脂浸渍; 在设置有第二纤维的芯部中的位置形成通孔的工序; 以及在通孔的内表面上形成导电层的步骤，在不干扰第一纤维的位置处形成电镀通孔，从而制造芯基板。

    WIRING SUBSTRATE AND METHOD OF MANUFACTURING THE SAME
    8.
    发明申请
    WIRING SUBSTRATE AND METHOD OF MANUFACTURING THE SAME 有权
    接线基板及其制造方法

    公开(公告)号：US20090095520A1

    公开(公告)日：2009-04-16

    申请号：US12247471

    申请日：2008-10-08

    申请人： Katsuya Fukase ,  Kishio Yokouchi ,  Hideaki Yoshimura

    发明人： Katsuya Fukase ,  Kishio Yokouchi ,  Hideaki Yoshimura

    IPC分类号： H05K1/11 ,  H05K3/00

    CPC分类号： H05K3/445 ,  H05K1/056 ,  H05K3/4046 ,  H05K3/4602 ,  H05K3/4608 ,  H05K2201/0323 ,  H05K2201/09827 ,  H05K2201/10234 ,  H05K2201/10416 ,  Y10T29/49124

    摘要： There is provided a wiring substrate. The wiring substrate includes: a core substrate formed of a conductive material and having a through hole therein; an insulating layer formed on first and second surfaces of the core substrate; wiring patterns formed on the first and second surfaces via the insulating layer; and a via formed in the through hole and electrically connected to the wiring patterns. The via includes: a conductor ball and a conductor portion. The conductor ball has a conductive surface and an insulating member covering the conductive surface. A portion of the conductive surface is exposed from the insulating member. The conductor portion is electrically connected to the exposed conductive surface and the wiring patterns. At least one of the insulating member and the insulating layer is interposed between the via and the core substrate.

    摘要翻译： 提供了布线基板。 布线基板包括：由导电材料形成并在其中具有通孔的芯基板; 绝缘层，形成在所述芯基板的第一和第二表面上; 通过绝缘层在第一和第二表面上形成的布线图案; 以及形成在通孔中并且电连接到布线图案的通孔。 通孔包括：导体球和导体部分。 导体球具有导电表面和覆盖导电表面的绝缘构件。 导电表面的一部分从绝缘构件露出。 导体部分电连接到暴露的导电表面和布线图案。 绝缘构件和绝缘层中的至少一个介于通路和芯基板之间。

    Circuit board manufacturing method and circuit board
    10.
    发明申请
    Circuit board manufacturing method and circuit board 有权
    电路板制造方法和电路板

    公开(公告)号：US20070181994A1

    公开(公告)日：2007-08-09

    申请号：US10598524

    申请日：2005-03-02

    申请人： Katsuya Fukase ,  Toyoaki Sakai ,  Munetoshi Irisawa ,  Toyokazu Komuro ,  Yasuo Kaneda ,  Masanori Natsuka ,  Wakana Aizawa

    发明人： Katsuya Fukase ,  Toyoaki Sakai ,  Munetoshi Irisawa ,  Toyokazu Komuro ,  Yasuo Kaneda ,  Masanori Natsuka ,  Wakana Aizawa

    IPC分类号： H01L23/12 ,  H01L21/00

    CPC分类号： H05K3/064 ,  H05K1/116 ,  H05K3/0094 ,  H05K3/061 ,  H05K3/065 ,  H05K3/108 ,  H05K3/421 ,  H05K3/427 ,  H05K2201/09381 ,  H05K2201/09563 ,  H05K2201/09581 ,  H05K2201/098 ,  H05K2203/0517 ,  H05K2203/0577 ,  H05K2203/0582 ,  H05K2203/1184 ,  H05K2203/1394

    摘要： As means for solving a problem of a positional shift of a land and a hole which is caused by an alignment in the formation of an etching resist layer and a plated resist layer in a method of manufacturing a circuit board, there are provided a method of manufacturing a circuit board including the steps of forming a first resin layer on a surface of an insulating substrate having a conductive layer on the surface and an internal wall of a through hole or/and a non-through hole, forming a second resin layer which is insoluble or slightly soluble in a developing solution for the first resin layer on the first resin layer provided on the surface conductive layer, and removing the first resin layer provided over the hole with the developing solution for the first resin layer, and a method of manufacturing a circuit board including the step of uniformly charging a surface of the first resin layer to induce a potential difference to the first resin layer provided over the hole and the first resin layer provided on the surface conductive layer before forming the second resin layer. Moreover, there is provided a circuit board having a hole with a small positional shift and high precision.

    摘要翻译： 作为在电路基板的制造方法中解决在形成抗蚀剂层和电镀抗蚀剂层时的取向引起的焊盘和孔的位置偏移的问题的方法，提供了一种方法， 制造电路板，包括以下步骤：在表面上具有导电层的绝缘基板的表面上形成第一树脂层和通孔或/或非通孔的内壁，形成第二树脂层，所述第二树脂层 在设置在表面导电层上的第一树脂层上的第一树脂层的显影液中不溶或微溶，用第一树脂层的显影液除去设在孔上的第一树脂层， 制造电路板，包括对第一树脂层的表面均匀充电以对设置在孔上的第一树脂层引起电位差的步骤， 在形成第二树脂层之前，在表面导电层上设置阴极层。 此外，提供一种电路板，其具有位置偏移小且精度高的孔。