公开(公告)号：US20060138552A1

公开(公告)日：2006-06-29

申请号：US11360269

申请日：2006-02-22

申请人： Justin Brask ,  Brian Doyle ,  Jack Kavalieros ,  Mark Doczy ,  Uday Shah ,  Robert Chau

发明人： Justin Brask ,  Brian Doyle ,  Jack Kavalieros ,  Mark Doczy ,  Uday Shah ,  Robert Chau

IPC分类号： H01L29/94

CPC分类号： H01L29/785 ,  H01L21/845 ,  H01L27/1211 ,  H01L29/0673 ,  H01L29/41791 ,  H01L29/66439 ,  H01L29/66545 ,  H01L29/66795 ,  Y10S438/926 ,  Y10S438/974

摘要： A semiconductor device comprising a semiconductor body having a top surface and a first and second laterally opposite sidewalls as formed on an insulating substrate is claimed. A gate dielectric is formed on the top surface of the semiconductor body and on the first and second laterally opposite sidewalls of the semiconductor body. A gate electrode is then formed on the gate dielectric on the top surface of the semiconductor body and adjacent to the gate dielectric on the first and second laterally opposite sidewalls of the semiconductor body. The gate electrode comprises a metal film formed directly adjacent to the gate dielectric layer. A pair of source and drain regions are then formed in the semiconductor body on opposite sides of the gate electrode.

公开(公告)号：US20060091467A1

公开(公告)日：2006-05-04

申请号：US10977261

申请日：2004-10-29

申请人： Brian Doyle ,  Suman Datta ,  Justin Brask ,  Jack Kavalieros ,  Amlan Majumdar ,  Marko Radosavljevic ,  Robert Chan

发明人： Brian Doyle ,  Suman Datta ,  Justin Brask ,  Jack Kavalieros ,  Amlan Majumdar ,  Marko Radosavljevic ,  Robert Chan

IPC分类号： H01L29/94

CPC分类号： H01L29/0847 ,  B82Y10/00 ,  B82Y30/00 ,  H01L21/76 ,  H01L21/823418 ,  H01L21/823425 ,  H01L21/823481 ,  H01L27/088 ,  H01L29/0895 ,  H01L29/66636 ,  H01L29/78 ,  H01L29/7834

摘要： An embodiment of the present invention is a technique to fabricate a semiconductor device having low off state leakage current. A gate structure of a first device is formed on a substrate layer having a hardmask. A channel is formed underneath the gate structure having a width to support the gate structure. An oxide or a dielectric layer is deposited on the substrate layer. A doped polysilicon layer is deposited on the oxide layer. A recessed junction area is formed on the doped polysilicon layer between the first device and an adjacent device.

摘要翻译： 本发明的实施例是制造具有低截止状态的漏电流的半导体器件的技术。 第一器件的栅极结构形成在具有硬掩模的衬底层上。 在具有宽度的栅极结构下方形成沟道以支撑栅极结构。 氧化物或电介质层沉积在衬底层上。 掺杂的多晶硅层沉积在氧化物层上。 在第一器件和相邻器件之间的掺杂多晶硅层上形成凹入的接合区域。

公开(公告)号：US07170120B2

公开(公告)日：2007-01-30

申请号：US11096984

申请日：2005-03-31

申请人： Suman Datta ,  Marko Radosavljevic ,  Brian Doyle ,  Jack Kavalieros ,  Justin Brask ,  Amlan Majumdar ,  Robert S. Chau

发明人： Suman Datta ,  Marko Radosavljevic ,  Brian Doyle ,  Jack Kavalieros ,  Justin Brask ,  Amlan Majumdar ,  Robert S. Chau

IPC分类号： H01L29/76

CPC分类号： H01L51/0508 ,  B82Y10/00 ,  H01L51/0048 ,  H01L51/0052 ,  Y10S977/762

摘要： A structure to form an energy well within a Carbon nanotube is described. The structure includes a doped semiconductor region and an undoped semiconductor region. The Carbon nanotube is between the doped semiconductor region and the undoped semiconductor region. The structure also includes a delta doped semiconductor region. The undoped semiconductor region is between the Carbon nanotube and the delta doped region. The delta doped semiconductor region is doped opposite that of the doped semiconductor region.

公开(公告)号：US20070148926A1

公开(公告)日：2007-06-28

申请号：US11321128

申请日：2005-12-28

申请人： Suman Datta ,  Jack Kavalieros ,  Justin Brask ,  Brian Doyle ,  Amlan Majumdar

发明人： Suman Datta ,  Jack Kavalieros ,  Justin Brask ,  Brian Doyle ,  Amlan Majumdar

IPC分类号： H01L21/04

CPC分类号： H01L21/26586 ,  H01L29/66795 ,  H01L29/785 ,  H01L29/7851

摘要： A method for providing halo implants in a tri-gate structure is described. Implantation is performed at two different angels to assure a halo for the top transistor and a halo for the side transistors.

摘要翻译： 描述了一种用于在三栅极结构中提供晕轮植入物的方法。 植入在两个不同的天使进行，以确保顶部晶体管的光环和侧面晶体管的光晕。

公开(公告)号：US07427541B2

公开(公告)日：2008-09-23

申请号：US11638333

申请日：2006-12-12

申请人： Suman Datta ,  Marko Radosavljevic ,  Brian Doyle ,  Jack Kavalieros ,  Justin Brask ,  Amlan Majumdar ,  Robert S. Chau

发明人： Suman Datta ,  Marko Radosavljevic ,  Brian Doyle ,  Jack Kavalieros ,  Justin Brask ,  Amlan Majumdar ,  Robert S. Chau

IPC分类号： H01L29/76

CPC分类号： H01L51/0508 ,  B82Y10/00 ,  H01L51/0048 ,  H01L51/0052 ,  Y10S977/762

摘要： A structure to form an energy well within a Carbon nanotube is described. The structure includes a doped semiconductor region and an undoped semiconductor region. The Carbon nanotube is between the doped semiconductor region and the undoped semiconductor region. The structure also includes a delta doped semiconductor region. The undoped semiconductor region is between the Carbon nanotube and the delta doped region. The delta doped semiconductor region is doped opposite that of the doped semiconductor region.

摘要翻译： 描述了在碳纳米管内形成能量阱的结构。 该结构包括掺杂半导体区域和未掺杂的半导体区域。 碳纳米管位于掺杂半导体区域和未掺杂的半导体区域之间。 该结构还包括δ掺杂半导体区域。 未掺杂的半导体区域在碳纳米管和δ掺杂区之间。 该掺杂掺杂的δ掺杂半导体区域与掺杂半导体区域的掺杂相反。

公开(公告)号：US20060030104A1

公开(公告)日：2006-02-09

申请号：US11248737

申请日：2005-10-11

申请人： Mark Doczy ,  Justin Brask ,  Steven Keating ,  Chris Barns ,  Brian Doyle ,  Michael McSwiney ,  Jack Kavalieros ,  John Barnak

发明人： Mark Doczy ,  Justin Brask ,  Steven Keating ,  Chris Barns ,  Brian Doyle ,  Michael McSwiney ,  Jack Kavalieros ,  John Barnak

IPC分类号： H01L21/336

CPC分类号： H01L29/66545 ,  H01L21/32134 ,  H01L21/32137 ,  H01L21/823842 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/7833 ,  Y10S438/926

摘要： At least a p-type and n-type semiconductor device deposited upon a semiconductor wafer containing metal or metal alloy gates. More particularly, a complementary metal-oxide-semiconductor (CMOS) device is formed on a semiconductor wafer having n-type and p-type metal gates.

摘要翻译： 至少p型和n型半导体器件沉积在包含金属或金属合金栅极的半导体晶片上。 更具体地，在具有n型和p型金属栅极的半导体晶片上形成互补金属氧化物半导体（CMOS）器件。

公开(公告)号：US20050040469A1

公开(公告)日：2005-02-24

申请号：US10946502

申请日：2004-09-20

申请人： Mark Doczy ,  Justin Brask ,  Steven Keating ,  Chris Barns ,  Brian Doyle ,  Michael McSwiney ,  Jack Kavalieros ,  John Barnak

发明人： Mark Doczy ,  Justin Brask ,  Steven Keating ,  Chris Barns ,  Brian Doyle ,  Michael McSwiney ,  Jack Kavalieros ,  John Barnak

IPC分类号： H01L21/3213 ,  H01L21/336 ,  H01L21/8238 ,  H01L29/49 ,  H01L29/78

CPC分类号： H01L29/66545 ,  H01L21/32134 ,  H01L21/32137 ,  H01L21/823842 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/7833 ,  Y10S438/926

摘要： At least a p-type and n-type semiconductor device deposited upon a semiconductor wafer containing metal or metal alloy gates. More particularly, a complementary metal-oxide-semiconductor (CMOS) device is formed on a semiconductor wafer having n-type and p-type metal gates.

摘要翻译： 至少p型和n型半导体器件沉积在包含金属或金属合金栅极的半导体晶片上。 更具体地，在具有n型和p型金属栅极的半导体晶片上形成互补金属氧化物半导体（CMOS）器件。

公开(公告)号：US07608883B2

公开(公告)日：2009-10-27

申请号：US12072971

申请日：2008-02-28

申请人： Marko Radosavljevic ,  Amlan Majumdar ,  Suman Datta ,  Justin Brask ,  Brian Doyle ,  Robert Chau

发明人： Marko Radosavljevic ,  Amlan Majumdar ,  Suman Datta ,  Justin Brask ,  Brian Doyle ,  Robert Chau

IPC分类号： H01L29/76

CPC分类号： G11C13/025 ,  B82Y10/00 ,  G11C2213/17 ,  H01L29/78696 ,  H01L51/0048 ,  H01L51/0541

摘要： A transistor is described having a source electrode and a drain electrode. The transistor has at least one semiconducting carbon nanotube that is electrically coupled between the source and drain electrodes. The transistor has a gate electrode and dielectric material containing one or more quantum dots between the carbon nanotube and the gate electrode.

摘要翻译： 描述了具有源电极和漏电极的晶体管。 晶体管具有至少一个电耦合在源极和漏极之间的半导体碳纳米管。 晶体管具有在碳纳米管和栅电极之间含有一个或多个量子点的栅电极和电介质材料。

公开(公告)号：US07342277B2

公开(公告)日：2008-03-11

申请号：US11285763

申请日：2005-11-21

申请人： Marko Radosavljevic ,  Amlan Majumdar ,  Suman Datta ,  Justin Brask ,  Brian Doyle ,  Robert Chau

发明人： Marko Radosavljevic ,  Amlan Majumdar ,  Suman Datta ,  Justin Brask ,  Brian Doyle ,  Robert Chau

IPC分类号： H01L29/76

CPC分类号： G11C13/025 ,  B82Y10/00 ,  G11C2213/17 ,  H01L29/78696 ,  H01L51/0048 ,  H01L51/0541

摘要： A transistor is described having a source electrode and a drain electrode. The transistor has at least one semiconducting carbon nanotube that is electrically coupled between the source and drain electrodes. The transistor has a gate electrode and dielectric material containing one or more quantum dots between the carbon nanotube and the gate electrode.

公开(公告)号：US20070114593A1

公开(公告)日：2007-05-24

申请号：US11285763

申请日：2005-11-21

申请人： Marko Radosavljevic ,  Amlan Majumdar ,  Suman Datta ,  Justin Brask ,  Brian Doyle ,  Robert Chau

发明人： Marko Radosavljevic ,  Amlan Majumdar ,  Suman Datta ,  Justin Brask ,  Brian Doyle ,  Robert Chau

IPC分类号： H01L29/788 ,  H01L21/336

CPC分类号： G11C13/025 ,  B82Y10/00 ,  G11C2213/17 ,  H01L29/78696 ,  H01L51/0048 ,  H01L51/0541

摘要： A transistor is described having a source electrode and a drain electrode. The transistor has at least one semiconducting carbon nanotube that is electrically coupled between the source and drain electrodes. The transistor has a gate electrode and dielectric material containing one or more quantum dots between the carbon nanotube and the gate electrode.

摘要翻译： 描述了具有源电极和漏电极的晶体管。 晶体管具有至少一个电耦合在源极和漏极之间的半导体碳纳米管。 晶体管具有在碳纳米管和栅电极之间含有一个或多个量子点的栅电极和电介质材料。