公开(公告)号：US11362113B2

公开(公告)日：2022-06-14

申请号：US16986462

申请日：2020-08-06

Applicant: Japan Display Inc.

Inventor： Hajime Watakabe ,  Toshihide Jinnai ,  Ryo Onodera ,  Akihiro Hanada

IPC: H01L27/00 ,  H01L29/00 ,  H01L27/12 ,  H01L29/66 ,  H01L29/786

Abstract: There is provided a technique that enables a reduction in the display failure of a display device and the improvement of the yields of the display device in a display device that adopts a semiconductor device including a thin film transistor using an oxide semiconductor. A semiconductor device according to an embodiment includes a thin film transistor having an oxide semiconductor. The oxide semiconductor has a drain region, a source region, and a channel region provided between the drain region and the source region. The thin film transistor includes a gate insulating film provided on the channel region, an aluminum oxide film provided on the gate insulating film, an insulating film provided on the aluminum oxide film, and a gate electrode provided on the insulating film.

公开(公告)号：US20180076239A1

公开(公告)日：2018-03-15

申请号：US15678501

申请日：2017-08-16

Applicant: Japan Display Inc.

Inventor： Isao SUZUMURA ,  Hajime Watakabe ,  Akihiro Hanada ,  Hirokazu Watanabe

IPC: H01L27/12 ,  H01L29/423 ,  H01L29/66 ,  H01L21/02 ,  H01L29/786

CPC classification number: H01L27/1251 ,  G02F1/134363 ,  G02F1/136227 ,  G02F1/1368 ,  G02F2001/13685 ,  G02F2202/104 ,  H01L21/02532 ,  H01L21/02565 ,  H01L21/02592 ,  H01L21/02675 ,  H01L27/1218 ,  H01L27/1225 ,  H01L27/1229 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/127 ,  H01L27/1274 ,  H01L27/3258 ,  H01L27/3262 ,  H01L27/3276 ,  H01L29/42384 ,  H01L29/66757 ,  H01L29/66969 ,  H01L29/78675 ,  H01L29/78693 ,  H01L2227/323

Abstract: The purpose of the present invention is to form both LTPS TFT and Ply-Si TFT on a same substrate. The feature of the display device to realize the above purpose is that: a display device comprising: a substrate including a first TFT having an oxide semiconductor layer and a second TFT having a Poly-Si layer, an undercoat is formed on the substrate, the oxide semiconductor layer is formed on or above the undercoat, a first interlayer insulating film is formed on or above the oxide semiconductor layer, the Poly-Si layer is formed on or above the first interlayer insulating film.

公开(公告)号：US12105388B2

公开(公告)日：2024-10-01

申请号：US18509920

申请日：2023-11-15

Applicant: Japan Display Inc.

Inventor： Akihiro Hanada ,  Takuo Kaitoh ,  Tomoyuki Ito ,  Yoshinori Tanaka

IPC: G02F1/1333 ,  G02F1/13357 ,  G02F1/1343 ,  G02F1/1362 ,  G02F1/1368

CPC classification number: G02F1/136286 ,  G02F1/133345 ,  G02F1/133365 ,  G02F1/133615 ,  G02F1/134309 ,  G02F1/1368

Abstract: A display device includes a wiring region including a gate wiring, a source wiring intersecting the gate wiring, and a first insulating layer between the gate wiring and the source wiring and an opening region including a pixel electrode on the first insulating layer and adjacent to the wiring region. The first insulating layer includes a first oxide insulating layer and a first nitride insulating layer, the first oxide insulating layer is disposed over the wiring region and the opening region, the first nitride insulating layer is disposed in the wiring region and includes a first opening overlapping the opening region, and the pixel electrode overlaps the first opening.

公开(公告)号：US12072595B2

公开(公告)日：2024-08-27

申请号：US18503351

申请日：2023-11-07

Applicant: Japan Display Inc.

Inventor： Akihiro Hanada ,  Toshihide Jinnai ,  Isao Suzumura ,  Hajime Watakabe ,  Ryo Onodera

IPC: G02F1/1368 ,  G02F1/1362 ,  H01L29/786 ,  H10K50/86 ,  H10K59/131

CPC classification number: G02F1/1368 ,  G02F1/136209 ,  G02F1/136277 ,  G02F1/136286 ,  H01L29/78633 ,  H01L29/78672 ,  H10K50/865 ,  H10K59/131

Abstract: A display device including: a substrate; a first thin film transistor of polysilicon semiconductor, a second thin film transistor of oxide semiconductor; a first light shading film opposing to the polysilicon semiconductor, and a second light shading film opposing to the oxide semiconductor; a first insulating film, a second insulating film which is constituted from plural insulating films, and a third insulating film superposed in this order; a first through hole penetrating the second insulating film and not penetrating the first insulating film and the third insulating film; a second through hole penetrating the first insulating film and the third insulating film; the first light shading film connects with a first conductive component, a part of the first conductive component exists on the third insulating film, through the second through hole.

公开(公告)号：US11721765B2

公开(公告)日：2023-08-08

申请号：US17499908

申请日：2021-10-13

Applicant: Japan Display Inc.

Inventor： Hajime Watakabe ,  Tomoyuki Ito ,  Toshihide Jinnai ,  Isao Suzumura ,  Akihiro Hanada ,  Ryo Onodera

IPC: H01L21/00 ,  H01L29/786 ,  H01L27/12 ,  H01L29/24 ,  H01L29/423 ,  H01L29/49 ,  H01L21/02 ,  H01L21/426 ,  H01L21/4757 ,  H01L21/4763 ,  H01L29/66 ,  G02F1/1368

CPC classification number: H01L29/78627 ,  H01L21/02178 ,  H01L21/02565 ,  H01L21/426 ,  H01L21/47573 ,  H01L21/47635 ,  H01L27/124 ,  H01L27/127 ,  H01L27/1225 ,  H01L27/1251 ,  H01L29/24 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/7869 ,  H01L29/78633 ,  H01L29/78675 ,  G02F1/1368 ,  H01L2029/42388

Abstract: A semiconductor device includes thin film transistors each having an oxide semiconductor. The oxide semiconductor has a channel region, a drain region, a source region, and low concentration regions which are lower in impurity concentration than the drain region and the source region. The low concentration regions are located between the channel region and the drain region, and between the channel region and the source region. Each of the thin film transistors has a gate insulating film on the channel region and the low concentration regions, an aluminum oxide film on a first part of the gate insulating film, the first part being located on the channel region, and a gate electrode on the aluminum oxide film and a second part of the gate insulating film, the second part being located on the low concentration regions.

公开(公告)号：US11630361B2

公开(公告)日：2023-04-18

申请号：US17471881

申请日：2021-09-10

Applicant: Japan Display Inc.

Inventor： Akihiro Hanada ,  Toshihide Jinnai ,  Isao Suzumura ,  Hajime Watakabe ,  Ryo Onodera

IPC: G02F1/1368 ,  G02F1/1362 ,  H01L29/786

Abstract: A display device including: a substrate; a first thin film transistor of polysilicon semiconductor, a second thin film transistor of oxide semiconductor; a first light shading film opposing to the polysilicon semiconductor, and a second light shading film opposing to the oxide semiconductor; a first insulating film, a second insulating film which is constituted from plural insulating films, and a third insulating film superposed in this order; a first through hole penetrating the second insulating film and not penetrating the first insulating film and the third insulating film; a second through hole penetrating the first insulating film and the third insulating film; the first light shading film connects with a first conductive component, a part of the first conductive component exists on the third insulating film, through the second through hole.

公开(公告)号：US11609463B2

公开(公告)日：2023-03-21

申请号：US17723468

申请日：2022-04-19

Applicant: Japan Display Inc.

Inventor： Akihiro Hanada

IPC: G02F1/1362 ,  G02F1/1343 ,  G02F1/1334 ,  G02F1/1368

Abstract: According to one embodiment, a display device includes a first substrate including a scanning line, a first inorganic insulating film, an oxide semiconductor, and a first light-shielding wall. The first inorganic insulating film, in planer view, includes a first groove formed between the oxide semiconductor and a light-emitting module. The first light-shielding wall is disposed on the first groove.

公开(公告)号：US11442515B2

公开(公告)日：2022-09-13

申请号：US17034722

申请日：2020-09-28

Applicant: Japan Display Inc.

Inventor： Akihiro Hanada ,  Hajime Watakabe ,  Kazufumi Watabe

IPC: H01L27/12 ,  H01L29/786 ,  H01L29/423 ,  H01L29/51 ,  G06F1/26 ,  H02J13/00 ,  H04L41/069 ,  H04L47/2416 ,  H04L67/12 ,  H04Q9/02

Abstract: According to one embodiment, a semiconductor device includes an insulating substrate, a first semiconductor layer formed of silicon and positioned above the insulating substrate, a second semiconductor layer formed of a metal oxide and positioned above the first semiconductor layer, a first insulating film formed of a silicon nitride and positioned between the first semiconductor layer and the second semiconductor layer, and a block layer positioned between the first semiconductor film and the second semiconductor layer, the block layer hydrogen diffusion of which is lower than that of the first insulating film.

公开(公告)号：US11348948B2

公开(公告)日：2022-05-31

申请号：US16931454

申请日：2020-07-17

Applicant: Japan Display Inc.

Inventor： Akihiro Hanada ,  Yohei Yamaguchi ,  Hirokazu Watanabe ,  Isao Suzumura

IPC: H01L21/00 ,  H01L27/00 ,  H01L29/00 ,  H01L27/12 ,  G02F1/1368 ,  H01L27/32 ,  H01L21/02

Abstract: The purpose of the present invention is to realize the display device having thin film transistors of the oxide semiconductor of stable characteristics. An example of the concrete structure is that: A display device having a substrate including a display area, plural pixels formed in the display area, the pixel includes a first thin film transistor having an oxide semiconductor film, a first insulating film made of a first silicon oxide on a first side of the oxide semiconductor film, a second insulating film made of a second silicon oxide on a second side of the oxide semiconductor film, wherein oxygen desorption amount per unit area from the first insulating film is larger than that from the second insulating film, when measured by TDS (Thermal Desorption Spectrometry) provided M/z=32 and a measuring range in temperature is from 100 centigrade to 500 centigrade.

公开(公告)号：US11181792B2

公开(公告)日：2021-11-23

申请号：US16787054

申请日：2020-02-11

Applicant: Japan Display Inc.

Inventor： Toshihide Jinnai ,  Hajime Watakabe ,  Akihiro Hanada ,  Ryo Onodera ,  Isao Suzumura

IPC: G02F1/1362 ,  G02F1/1368 ,  H01L29/786 ,  H01L27/12 ,  H01L27/32

Abstract: A display device including a substrate having a first TFT of an oxide semiconductor and a second TFT of a polysilicon semiconductor comprising: the oxide semiconductor 109 is covered by a first insulating film, a first drain electrode 110 is connected to the oxide semiconductor 109 via a first through hole 132 formed in the first insulating film, a first source electrode 111 is connected to the oxide semiconductor 109 via second through hole 133 formed in the first insulating film in the first TFT, a second insulating film is formed covering the first drain electrode 110 and the first source electrode 111, a drain wiring connects 12 to the first drain electrode 110 via a third through hole 130 formed in the second insulating film, a source wiring 122 is connected to the first source electrode 111 via a fourth through hole 131 formed in the second insulating film.