公开(公告)号：US07951619B2

公开(公告)日：2011-05-31

申请号：US12875007

申请日：2010-09-02

Applicant: Gurtej S. Sandhu ,  Bhaskar Srinivasan

Inventor： Gurtej S. Sandhu ,  Bhaskar Srinivasan

IPC: H01L21/00

CPC classification number: H01L45/00 ,  Y10S257/91 ,  Y10S438/90 ,  Y10S438/902 ,  Y10S438/983

Abstract: Some embodiments include methods of forming diodes. The methods may include oxidation of an upper surface of a conductive electrode to form an oxide layer over the conductive electrode. In some embodiments, the methods may include formation of an oxidizable material over a conductive electrode, and subsequent oxidation of the oxidizable material to form an oxide layer over the conductive electrode. In some embodiments, the methods may include formation of a metal halide layer over a conductive electrode. Some embodiments include diodes that contain a metal halide layer between a pair of diode electrodes.

Abstract translation: 一些实施例包括形成二极管的方法。 所述方法可以包括氧化导电电极的上表面以在导电电极上形成氧化物层。 在一些实施方案中，所述方法可包括在导电电​​极上形成可氧化材料，以及随后氧化可氧化材料以在导电电极上形成氧化物层。 在一些实施例中，所述方法可包括在导电电​​极上形成金属卤化物层。 一些实施例包括在一对二极管电极之间包含金属卤化物层的二极管。

公开(公告)号：US20110062511A1

公开(公告)日：2011-03-17

申请号：US12949558

申请日：2010-11-18

Applicant: Nirmal Ramaswamy ,  Gurtej Sandhu ,  Bhaskar Srinivasan ,  John Smythe

Inventor： Nirmal Ramaswamy ,  Gurtej Sandhu ,  Bhaskar Srinivasan ,  John Smythe

IPC: H01L29/792 ,  B82Y99/00

CPC classification number: H01L21/31691 ,  H01L21/28273 ,  H01L21/3142 ,  H01L29/42332 ,  H01L29/7881

Abstract: Devices are disclosed, such as those having a memory cell. The memory cell includes an active area formed of a semiconductor material; a first dielectric over the semiconductor material; a second dielectric comprising a material having a perovskite structure over the first dielectric; a third dielectric over the second dielectric; and a gate electrode over the third dielectric.

Abstract translation: 公开了诸如具有存储器单元的器件。 存储单元包括由半导体材料形成的有源区; 半导体材料上的第一电介质; 第二电介质，其包括在所述第一电介质上方具有钙钛矿结构的材料; 在所述第二电介质上的第三电介质; 以及位于第三电介质上的栅电极。

公开(公告)号：US20100062562A1

公开(公告)日：2010-03-11

申请号：US12208886

申请日：2008-09-11

Applicant: John Smythe ,  Bhaskar Srinivasan ,  Ming Zhang

Inventor： John Smythe ,  Bhaskar Srinivasan ,  Ming Zhang

IPC: H01L45/00 ,  H01L21/336 ,  H01L21/20 ,  H01L21/263

CPC classification number: H01L29/66136 ,  H01L21/26513 ,  H01L21/268 ,  H01L21/324 ,  H01L21/823425 ,  H01L21/823814 ,  H01L27/10873 ,  H01L27/24 ,  H01L29/665 ,  H01L29/6659

Abstract: Some embodiments include methods in which microwave radiation is used to activate dopant and/or increase crystallinity of semiconductor material during formation of a semiconductor construction. In some embodiments, the microwave radiation has a frequency of about 5.8 gigahertz, and a temperature of the semiconductor construction does not exceed about 500° C. during the exposure to the microwave radiation.

Abstract translation: 一些实施例包括在形成半导体结构期间使用微波辐射来激活掺杂剂和/或增加半导体材料的结晶度的方法。 在一些实施例中，微波辐射具有约5.8千兆赫的频率，并且在暴露于微波辐射期间半导体构造的温度不超过约500℃。

公开(公告)号：US20090250681A1

公开(公告)日：2009-10-08

申请号：US12099267

申请日：2008-04-08

Applicant: John Smythe ,  Bhaskar Srinivasan ,  Gurtej Sandhu

Inventor： John Smythe ,  Bhaskar Srinivasan ,  Gurtej Sandhu

IPC: H01L45/00

CPC classification number: H01L45/04 ,  G11C11/56 ,  G11C13/00 ,  H01L27/2463 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/147 ,  H01L45/1666

Abstract: A method of forming a non-volatile resistive oxide memory cell includes forming a first conductive electrode of the memory cell as part of a substrate. Insulative material is deposited over the first electrode. An opening is formed into the insulative material over the first electrode. The opening includes sidewalls and a base. The opening sidewalls and base are lined with a multi-resistive state layer comprising multi-resistive state metal oxide-comprising material which less than fills the opening. A second conductive electrode of the memory cell is formed within the opening laterally inward of the multi-resistive state layer lining the sidewalls and elevationally over the multi-resistive state layer lining the base. Other aspects and implementations are contemplated.

Abstract translation: 形成非易失性电阻氧化物存储单元的方法包括：形成存储单元的第一导电电极作为衬底的一部分。 绝缘材料沉积在第一电极上。 在第一电极上形成绝缘材料的开口。 开口包括侧壁和底座。 开口侧壁和基底衬有包含少于填充开口的多电阻态金属氧化物材料的多电阻状态层。 存储单元的第二导电电极形成在多个电阻状态层的横向内侧的开口的内部，该电阻层衬在侧壁上并且在衬底基底上的多电阻状态层上。 考虑了其他方面和实现。

公开(公告)号：US07426190B2

公开(公告)日：2008-09-16

申请号：US11240436

申请日：2005-09-30

Applicant: Arati Manjeshwar ,  Lakshmi Venkatraman ,  Bhaskar Srinivasan ,  Anshul Pandey ,  Jim Berube

Inventor： Arati Manjeshwar ,  Lakshmi Venkatraman ,  Bhaskar Srinivasan ,  Anshul Pandey ,  Jim Berube

IPC: H04L12/28

CPC classification number: H04W8/26 ,  H04W8/005 ,  H04W24/02 ,  H04W52/0229 ,  H04W72/02 ,  Y02D70/00

Abstract: A method for initializing a wireless network is provided which includes discovering at least one node of the wireless network that is within hearing range of a base station of the wireless network, authenticating the at least one discovered node, assigning a node identifier to the at least one discovered node, and selecting a network frequency, at least one backup frequency, and a locally unique network identifier.

Abstract translation: 提供了一种用于初始化无线网络的方法，其包括发现无线网络的在无线网络的基站的听力范围内的至少一个节点，认证所述至少一个已发现的节点，将节点标识符分配给至少 一个发现的节点，以及选择网络频率，至少一个备份频率和本地唯一的网络标识符。

公开(公告)号：US20080118731A1

公开(公告)日：2008-05-22

申请号：US11600695

申请日：2006-11-16

Applicant: Bhaskar Srinivasan ,  John A. Smythe

Inventor： Bhaskar Srinivasan ,  John A. Smythe

IPC: B05D5/12 ,  H01G9/00 ,  H01G4/005

CPC classification number: H01G4/12 ,  H01G4/1218 ,  H01L27/10852

Abstract: A method of forming a dielectric structure, such as a layer, is disclosed. The method comprises forming a high-k structure from a plurality of portions of a high-k material. Each of the plurality of portions of the high-k material is formed by depositing a plurality of monolayers of the high-k material and annealing the high-k material. The high-k material may be a perovskite-type material including, but not limited to, strontium titanate. A dielectric structure, a capacitor incorporating a dielectric structure and a method of forming a capacitor are also disclosed.

Abstract translation: 公开了形成诸如层之类的电介质结构的方法。 该方法包括从高k材料的多个部分形成高k结构。 通过沉积高k材料的多个单层并退火高k材料来形成高k材料的多个部分中的每一个。 高k材料可以是钙钛矿型材料，包括但不限于钛酸锶。 还公开了电介质结构，并入介质结构的电容器和形成电容器的方法。

公开(公告)号：US20070093208A1

公开(公告)日：2007-04-26

申请号：US11240545

申请日：2005-09-30

Applicant: Arati Manjeshwar ,  Lakshmi Venkatraman ,  Anshul Pandey ,  Bhaskar Srinivasan

Inventor： Arati Manjeshwar ,  Lakshmi Venkatraman ,  Anshul Pandey ,  Bhaskar Srinivasan

IPC: H04B1/00 ,  H04B15/00

CPC classification number: H04W72/082

Abstract: A method for providing interference avoidance in a network, the method including sampling each frequency of a communication channel available to the network, collecting samples at a certain location of the network, choosing at least one of a suitable frequency and a unique network identifier based on the collected samples, and distributing the at least one of the suitable frequency and the network identifier to a device of the network.

Abstract translation: 一种用于在网络中提供干扰避免的方法，所述方法包括对网络可用的通信信道的每个频率进行采样，在网络的特定位置收集样本，基于以下方式选择合适的频率和唯一网络标识符中的至少一个： 收集的样本，并将适当频率和网络标识符中的至少一个分发到网络的设备。

公开(公告)号：US20220238516A1

公开(公告)日：2022-07-28

申请号：US17463252

申请日：2021-08-31

Applicant: Yanbiao Pan ,  Robert Martin Higgins ,  Pushpa Mahalingam ,  Bhaskar Srinivasan

Inventor： Yanbiao Pan ,  Robert Martin Higgins ,  Pushpa Mahalingam ,  Bhaskar Srinivasan

IPC: H01L27/08 ,  H01L49/02 ,  H01L21/02

Abstract: Described examples include a resistor having a substrate having a non-conductive surface and a patterned polysilicon layer on the non-conductive surface, the patterned polysilicon layer including polycrystalline silicon wherein at least 90% of the grains in the polycrystalline silicon are 30 nm or smaller. The resistor also has a first terminal in conductive contact with the patterned polysilicon layer and a second terminal in conductive contact with the polysilicon layer and spaced from the first contact.

公开(公告)号：US08637113B2

公开(公告)日：2014-01-28

申请号：US13354163

申请日：2012-01-19

Applicant: Gurtej Sandhu ,  John Smythe ,  Bhaskar Srinivasan

Inventor： Gurtej Sandhu ,  John Smythe ,  Bhaskar Srinivasan

IPC: C23C18/00 ,  C23C20/00 ,  C23C28/00 ,  C23C30/00 ,  H01C17/06

CPC classification number: H01L27/101 ,  H01L21/0271 ,  Y10S438/947

Abstract: A method of forming a non-volatile resistive oxide memory array includes forming a plurality of one of conductive word lines or conductive bit lines over a substrate. Metal oxide-comprising material is formed over the plurality of said one of the word lines or bit lines. A series of elongated trenches is provided over the plurality of said one of the word lines or bit lines. A plurality of self-assembled block copolymer lines is formed within individual of the trenches in registered alignment with and between the trench sidewalls. A plurality of the other of conductive word lines or conductive bit lines is provided from said plurality of self-assembled block copolymer lines to form individually programmable junctions comprising said metal oxide-comprising material where the word lines and bit lines cross one another.

Abstract translation: 形成非易失性电阻氧化物存储器阵列的方法包括在衬底上形成多个导电字线或导电位线。 含金属氧化物的材料形成在多条所述一条字线或位线中。 在多个所述一条字线或位线之间提供一系列细长的沟槽。 多个自组装嵌段共聚物线形成在沟槽中的各个内，与沟槽侧壁之间对准并且在沟槽侧壁之间形成。 从所述多个自组装嵌段共聚物线路提供多个导电字线或导电位线，以形成包含所述金属氧化物的材料的单独可编程的结，其中字线和位线彼此交叉。

公开(公告)号：US08634224B2

公开(公告)日：2014-01-21

申请号：US12855624

申请日：2010-08-12

Applicant: Bhaskar Srinivasan ,  Gurtej S. Sandhu

Inventor： Bhaskar Srinivasan ,  Gurtej S. Sandhu

IPC: G11C11/00

CPC classification number: G11C13/0002 ,  G11C13/0007 ,  G11C13/0011 ,  G11C13/003 ,  G11C13/004 ,  G11C13/0069 ,  G11C2213/12 ,  G11C2213/32 ,  G11C2213/34 ,  G11C2213/52 ,  G11C2213/56 ,  G11C2213/77 ,  H01L27/101 ,  H01L45/08 ,  H01L45/085 ,  H01L45/1206

Abstract: In one aspect, a method of operating a memory cell includes using different electrodes to change a programmed state of the memory cell than are used to read the programmed state of the memory cell. In one aspect, a memory cell includes first and second opposing electrodes having material received there-between. The material has first and second lateral regions of different composition relative one another. One of the first and second lateral regions is received along one of two laterally opposing edges of the material. Another of the first and second lateral regions is received along the other of said two laterally opposing edges of the material. At least one of the first and second lateral regions is capable of being repeatedly programmed to at least two different resistance states. Other aspects and implementations are disclosed.

Abstract translation: 一方面，操作存储单元的方法包括使用不同的电极来改变存储器单元的编程状态，而不是用于读取存储单元的编程状态。 在一个方面，存储单元包括第一和第二相对电极，其间具有接收在其间的材料。 该材料具有彼此不同组成的第一和第二横向区域。 第一和第二横向区域中的一个沿着材料的两个横向相对的边缘中的一个被接收。 第一和第二横向区域中的另一个沿着材料的所述两个横向相对的边缘中的另一个被容纳。 第一和第二横向区域中的至少一个能够被重复编程至至少两个不同的阻力状态。 公开了其他方面和实现。