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31.发明授权公开(公告)号：US07876156B2
公开(公告)日：2011-01-25
申请号：US12412728
申请日：2009-03-27
申请人： Satoshi Tanaka , Tomonori Tanoue
发明人： Satoshi Tanaka , Tomonori Tanoue
IPC分类号： H03G3/30
CPC分类号： H03F3/19 , H03F1/0261 , H03F3/245 , H03F2200/393 , H03F2200/451
摘要： An RF power amplifier has a final-stage amplifier stage which generates an RF transmit output signal, a signal detector which detects an RF transmit output level, a first detector, a second detector and a control circuit. The final-stage amplifier stage includes a transistor and a load element and performs saturation type nonlinear amplification and non-saturation type linear amplification. The first detector and the control circuit maintain the RF transmit output signal approximately constant with respect to a variation in load at an antenna at the saturation type nonlinear amplification. The second detector and the control circuit reduce an increase in the output voltage of the final stage transistor with respect to an overload state of the antenna at the non-saturation type linear amplification.
摘要翻译： RF功率放大器具有产生RF发射输出信号的最终级放大器级，检测RF发射输出电平的信号检测器，第一检测器，第二检测器和控制电路。 最后一级放大器级包括晶体管和负载元件，并执行饱和型非线性放大和非饱和型线性放大。 第一检测器和控制电路保持RF发射输出信号相对于饱和型非线性放大在天线处的负载变化大致恒定。 第二检测器和控制电路在非饱和型线性放大时相对于天线的过载状态减小了最终级晶体管的输出电压的增加。
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公开(公告)号：US07248118B2
公开(公告)日：2007-07-24
申请号：US10830049
申请日：2004-04-23
IPC分类号： H03G3/10
CPC分类号： H03F1/30 , H01L2224/73265 , H03F1/02 , H03F3/195
摘要： A radio frequency power amplifier module that brings sufficient attenuation to a radio frequency signal in a bias supply line connecting a bias control part and a radio frequency power amplifier part without increasing module substrate area is aimed. At least one bonding pad 106 having a capacitance component to a ground and stitch structure inductances 108, 109 composed of a bonding wire 105 provided via the bonding pad are provided in the bias supply line connecting the bias control part and the radio frequency power amplifier part.
摘要翻译： 针对连接偏置控制部分和射频功率放大器部分而不增加模块基板面积的偏置电源线中的射频信号的充分衰减的射频功率放大器模块。 至少一个具有接地电容分量的接合焊盘106和由经由接合焊盘提供的接合线105组成的针脚结构电感108,109设置在偏置电源线中，该偏置电源线连接偏置控制部分和射频功率放大器部分 。
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公开(公告)号：US06949974B2
公开(公告)日：2005-09-27
申请号：US11023414
申请日：2004-12-29
CPC分类号： H03F1/56 , H03F1/0277 , H03F1/565 , H03F3/602 , H03F3/72 , H03F2203/7209
摘要： The present invention provides a radio frequency power amplifier which may not introduce radio frequency loss during switching power amplifier units between high and low output power levels. By connecting a first-stage matching network M12 and first-stage matching network M13 to respective output nodes of a power amplifier unit A11 and power amplifier unit A12 that either one operate by switching, connecting the output nodes of the first-stage matching network M12 and M13 in parallel, connecting a last-stage matching network M11 between the junction of M12 and M13 and the output terminal OUT, the first-stage matching networks M12, M13, and last-stage matching network M11 are formed, for both power amplifier units A11 and A12, so that impedance matching is established between the output terminal OUT and the power amplifier unit in operation when one unit is in operation the other is in stop of operation. The present invention allows switching from one power amplifier unit to the other without the need of a radio frequency switch.
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公开(公告)号：US06943624B2
公开(公告)日：2005-09-13
申请号：US10161737
申请日：2002-06-05
CPC分类号： H03F1/56 , H03F1/0277 , H03F1/565 , H03F3/602 , H03F3/72 , H03F2203/7209
摘要： The present invention provides a radio frequency power amplifier which may not introduce radio frequency loss during switching power amplifier units between high and low output power levels. By connecting a first-stage matching network M12 and first-stage matching network M13 to respective output nodes of a power amplifier unit A11 and power amplifier unit A12 that either one operate by switching, connecting the output nodes of the first-stage matching network M12 and M13 in parallel, connecting a last-stage matching network M11 between the junction of M12 and M13 and the output terminal OUT, the first-stage matching networks M12, M13, and last-stage matching network M11 are formed, for both power amplifier units A11 and A12, so that impedance matching is established between the output terminal OUT and the power amplifier unit in operation when one unit is in operation the other is in stop of operation. The present invention allows switching from one power amplifier unit to the other without the need of a radio frequency switch.
摘要翻译： 本发明提供一种射频功率放大器，其可以在高输出功率级和低输出功率级之间的开关功率放大器单元期间不会引入射频损耗。 通过将第一级匹配网络M 12和第一级匹配网络M 13连接到功率放大器单元A11和功率放大器单元A12的相应输出节点，功率放大器单元A 11和功率放大器单元A 12通过切换操作，连接第一级匹配网络 在M12和M13的连接点与输出端子OUT，第一级匹配网络M 12，M 13以及最后一级匹配网络M12之间连接最后一级匹配网络M 11， 对于功率放大器单元A 11和A 12两者形成级匹配网络M 11，使得当一个单元在操作中另一个处于停止操作时在输出端子OUT和功率放大器单元之间建立阻抗匹配 。 本发明允许从一个功率放大器单元切换到另一个，而不需要射频切换。
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公开(公告)号：US20050088236A1
公开(公告)日：2005-04-28
申请号：US10975431
申请日：2004-10-29
CPC分类号： H03F1/56 , H03F1/0222 , H03F1/0261 , H03F1/0266 , H03F1/301 , H03F1/302 , H03F1/306 , H03F3/19 , H03F3/1935 , H03F2200/318 , H03F2200/453
摘要： A CDMA system is provided which includes a power amplifier module have a DC current amplifier. The DC and current amplifier detects a DC component of an input signal and amplifies this detected DC component. The power amplifier module also includes an amplifier which receives the current amplified by the DC current amplifier as an input current. The input signal supplied to the DC current amplifier changes in response to an input power level.
摘要翻译： 提供了一种CDMA系统，其包括具有DC电流放大器的功率放大器模块。 直流和电流放大器检测输入信号的直流分量，并放大该检测到的直流分量。 功率放大器模块还包括放大器，其接收由直流电流放大器放大的电流作为输入电流。 提供给DC电流放大器的输入信号响应于输入功率电平而改变。
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36.发明授权公开(公告)号：US06853243B2
公开(公告)日：2005-02-08
申请号：US10222830
申请日：2002-08-19
申请人： Kenji Sekine , Tomonori Tanoue , Osamu Kagaya
发明人： Kenji Sekine , Tomonori Tanoue , Osamu Kagaya
CPC分类号： H03F3/72 , H03F2200/429 , H03F2203/7236
摘要： To provide a high frequency amplifying apparatus for reducing a phase change caused in switching to a different output level, a variable phase shifter is provided at at least one location of respective paths rearward from a branching circuit for switching a path on a high output side having an amplifier using a first semiconductor device at an output stage and a path on a low output side having an amplifier using a second semiconductor device with a smaller output than the first semiconductor device on an output stage in accordance with a desired output level. After branching and a phase length of the variable phase shifter is set to a pre-determined value such that passing phase lengths of the respective paths become substantially the same by passing either of the paths.
摘要翻译： 为了提供一种用于减少在切换到不同输出电平时引起的相位变化的高频放大装置，在分路电路后面的相应路径的至少一个位置设置可变移相器，用于切换具有 根据期望的输出电平，在输出级使用第一半导体器件的放大器和低输出侧的路径，具有在输出级上具有比第一半导体器件更小的输出的第二半导体器件的放大器。 在分支之后，将可变移相器的相位长度设置为预定值，使得各个路径的通过相位长度通过通过任一路径变得基本相同。
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公开(公告)号：US5604835A
公开(公告)日：1997-02-18
申请号：US361681
申请日：1994-12-22
申请人： Tohru Nakamura , Tomonori Tanoue , Takeshi Kato , Mitsuo Takeda
发明人： Tohru Nakamura , Tomonori Tanoue , Takeshi Kato , Mitsuo Takeda
CPC分类号： G02B6/125 , G02B6/12004 , G02B6/122 , G02B6/132
摘要： An integrated optical waveguide device includes a substrate, and an optical waveguide which is formed in the form of projection or is formed in a trench formed in the substrate. Each optical waveguide has a first optical area made of a first optical material and a second optical area which is made of a second optical material and is surrounded by the first optical area. The optical waveguides are arranged on both side faces of the projection or trench.
摘要翻译： 集成光波导装置包括基板和形成为突起形状或形成在形成于基板中的沟槽中的光波导。 每个光波导具有由第一光学材料制成的第一光学区域和由第二光学材料制成并被第一光学区域包围的第二光学区域。 光波导布置在突起或沟槽的两个侧面上。
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38.发明授权Electric circuit using multiple differential negative resistance elements, semiconductor device and neuro chip using the same 失效电路使用多个差分负电阻元件，半导体器件和神经芯片使用相同
公开(公告)号：US5229623A
公开(公告)日：1993-07-20
申请号：US746288
申请日：1991-08-13
CPC分类号： B82Y10/00 , G02F3/028 , G06N3/0635 , G06N3/0675 , G11C11/56 , G11C13/04 , G11C2211/5614
摘要： A semiconductor device is disclosed, which includes a multiple negative differential resistance element having negative differential resistance characteristics at at least two places in the current-voltage characteristics, and which is suitable for constructing a neural network having a high density integration and a high reliability.
摘要翻译： 公开了一种半导体器件，其包括在电流 - 电压特性中的至少两个位置具有负的差分电阻特性的多个负的差分电阻元件，并且适用于构建具有高密度集成和高可靠性的神经网络。
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公开(公告)号：US5023687A
公开(公告)日：1991-06-11
申请号：US304210
申请日：1989-01-31
IPC分类号： H01L29/73 , H01L21/331 , H01L21/8226 , H01L21/8228 , H01L21/8252 , H01L27/06 , H01L27/082 , H01L27/12 , H01L29/737
CPC分类号： H01L29/66318 , H01L21/8226 , H01L21/8252 , H01L27/0605
摘要： A complementary semiconductor device is disclosed having a substrate and a four layer structure of pnpn provided on the substrate wherein the first three layers constitute a pnp-type bipolar transistor and the second to the fourth layer constitute an npn-type bipolar transistor. According to the present invention, the pnp- and npn-type transistor which are disposed on different portions of a principal surface of the substrate, respectively, can be produced concurrently by crystal growth and thus production steps are simple and yield is remarkably improved.
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公开(公告)号：US4983532A
公开(公告)日：1991-01-08
申请号：US286710
申请日：1988-12-20
申请人： Katsuhiko Mitani , Tomonori Tanoue , Chushirou Kusano , Susumu Takahashi , Masayoshi Saito , Hiroshi Miyazaki , Fumio Murai
发明人： Katsuhiko Mitani , Tomonori Tanoue , Chushirou Kusano , Susumu Takahashi , Masayoshi Saito , Hiroshi Miyazaki , Fumio Murai
IPC分类号： H01L29/205 , H01L21/331 , H01L29/73 , H01L29/737
CPC分类号： H01L29/66318 , Y10S148/01 , Y10S148/011 , Y10S148/072 , Y10S148/10
摘要： Microfabrication and large scale integration of a device can be realized by using a planar heterojunction bipolar transistor formed by a process comprising successively growing semiconductor layers serving as a subcollector, a collector, a base, and an emitter, respectively, through epitaxial growth on a compound semiconductor substrate in such a manner that at least one of the emitter junction and collector junction is a heterojunction, wherein a collector drawing-out metal layer is formed by the selective CVD method.
摘要翻译： 可以通过使用通过包括通过在化合物上的外延生长分别连续生长用作子集电极，集电极，基极和发射极的半导体层的工艺形成的平面异质结双极晶体管来实现器件的微结构和大规模集成 半导体衬底，其中发射极结和集电极结中的至少一个是异质结，其中通过选择性CVD法形成集电体引出金属层。
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