ADC controller with temporal separation

    公开(公告)号:US10044360B2

    公开(公告)日:2018-08-07

    申请号:US15677909

    申请日:2017-08-15

    Inventor: Bryan Kris

    Abstract: Embodiments of the present disclosure may include an ADC circuit including channel register sets, a conversion request flip-flop, a priority encoder circuit, and a controller circuit. The controller circuit may be configured to receive a conversion request signal, latch the conversion request signal into the conversion request flip-flop, determine by the priority encoder circuit a highest priority pending conversion request, and output an active channel identifier code. The channel identifier code may be configured to select the data channel register sets that are active by identifying received selection bits. The embodiments may include logic to store a converted value from a selected analog input to a data output register based on the channel identifier code.

    System, method and apparatus having improved pulse width modulation frequency resolution

    公开(公告)号:US10003329B2

    公开(公告)日:2018-06-19

    申请号:US14714315

    申请日:2015-05-17

    Inventor: Bryan Kris

    CPC classification number: H03K7/08 H03K3/017 H03M1/68 H03M1/822

    Abstract: Using a combination of frequency dithering of a PWM counter and a variable time delay circuit yields improved PWM frequency resolution with realizable circuit components and clock operating frequencies. A controllable time delay circuit lengthens a PWM signal during the first PWM cycle. During the second PWM cycle, the PWM period is increased beyond the desired amount, but the delay is reduced during this second PWM cycle to achieve the correct (desired) PWM signal period. The dithering of the PWM signal period enables the time delay circuit to be “reset” so that an infinite delay circuit is not required. The time delay circuit provides short term (one cycle) frequency adjustment so that the resulting PWM cycle is not dithered and has a period at the desired frequency resolution.

    Power-Up Based Integrated Circuit Configuration

    公开(公告)号:US20170294909A1

    公开(公告)日:2017-10-12

    申请号:US15485065

    申请日:2017-04-11

    Abstract: An integrated circuit having a plurality of selectable modes, functions and/or characteristics may be configured at the time of product manufacture by providing an appropriate resistance value pull-up resistor at an external connection (pin) of the integrated circuit package. At least one external connection (pin) may be used for such configuration of the integrated circuit. This is done without having to program the integrated circuit before placing on the product printed circuit board. The same integrated circuit may thus be used for a plurality of different products without requiring any pre-programming thereof. The integrated circuit's personality (desired characteristics) will be programmed automatically as soon as power is first applied to the finished product printed circuit board. Once the integrated circuit has been configured at power up, the external at least one connection (pin), initially used for configuration, can be used for either analog or digital input, output or input/output.

    Variable Frequency Ratiometric Multiphase Pulse Width Modulation Generation
    38.
    发明申请
    Variable Frequency Ratiometric Multiphase Pulse Width Modulation Generation 有权
    变频比例多相脉宽调制生成

    公开(公告)号:US20140139278A1

    公开(公告)日:2014-05-22

    申请号:US14165222

    申请日:2014-01-27

    Inventor: Bryan Kris

    CPC classification number: H03K7/08 G06F1/04 G06F1/26

    Abstract: Groups of phase shifted Pulse Width Modulation signals are generated that maintain their duty-cycle and phase relationships as a function of the period of the PWM signal frequency. The multiphase PWM signals are generated in a ratio-metric fashion so as to greatly simplify and reduce the computational workload for a processor used in a PWM system. The groups of phase shifted PWM signals may also be synchronized with and automatically scaled to match external synchronization signals.

    Abstract translation: 产生相移脉冲宽度调制信号组,其维持其占空比和相位关系作为PWM信号频率周期的函数。 以比例度量方式生成多相PWM信号,以便大大简化并减少PWM系统中使用的处理器的计算工作量。 相移PWM信号组也可以与外部同步信号同步并自动缩放。

    Temperature compensated clock frequency monitor

    公开(公告)号:US10936004B2

    公开(公告)日:2021-03-02

    申请号:US16143967

    申请日:2018-09-27

    Abstract: A temperature-compensating clock frequency monitor circuit may be provided to detect a clock pulse frequency in an electronic device that may cause erratic or dangerous operation of the device, as a function of an operating temperature of the device. The temperature-compensating clock frequency monitor circuit include a temperature sensor configured to measure a temperature associated with an electronic device, a clock having an operating frequency, and a frequency monitoring system. The frequency monitoring system may be configured to determine the operating frequency of the clock, and based at least on (a) the operating frequency of the clock and (b) the measured temperature associated with the electronic device, generate a corrective action signal to initiate a corrective action associated with the electronic device or a related device. The temperature sensor, clock, and frequency monitoring system may, for example, be provided on a microcontroller.

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