公开(公告)号：US20140264732A1

公开(公告)日：2014-09-18

申请号：US13801623

申请日：2013-03-13

申请人： Adel A. Elsherbini ,  Kevin P. O'Brien ,  Henning Braunisch ,  Krishna Bharath

发明人： Adel A. Elsherbini ,  Kevin P. O'Brien ,  Henning Braunisch ,  Krishna Bharath

IPC分类号： H01L27/06

CPC分类号： H01L27/06 ,  H01F17/0006 ,  H01F2017/0066 ,  H01L23/64 ,  H01L25/16 ,  H01L27/016 ,  H01L28/10 ,  H01L28/40 ,  H01L2924/0002 ,  H01L2924/00

摘要： Semiconductor packages including magnetic core inductor (MCI) structures for integrated voltage regulators are described. In an example, a semiconductor package includes a package substrate and a semiconductor die coupled to a first surface of the package substrate. The semiconductor die has a first plurality of metal-insulator-metal (MIM) capacitor layers thereon. The semiconductor package also includes a magnetic core inductor (MCI) die coupled to a second surface of the package substrate. The MCI die includes one or more slotted inductors and has a second plurality of MIM capacitor layers thereon.

摘要翻译： 描述了包括集成稳压器的磁芯电感（MCI）结构的半导体封装。 在一个示例中，半导体封装包括封装衬底和耦合到封装衬底的第一表面的半导体管芯。 半导体管芯在其上具有第一多个金属 - 绝缘体 - 金属（MIM）电容器层。 半导体封装还包括耦合到封装衬底的第二表面的磁芯电感器（MCI）裸芯片。 MCI管芯包括一个或多个开槽电感器，并且其上具有第二多个MIM电容器层。

公开(公告)号：US20140177625A1

公开(公告)日：2014-06-26

申请号：US13722951

申请日：2012-12-20

申请人： Peter L.D. Chang ,  Edris M. Mohammed ,  Henning Braunisch ,  Hengju Cheng

发明人： Peter L.D. Chang ,  Edris M. Mohammed ,  Henning Braunisch ,  Hengju Cheng

IPC分类号： H04Q11/00 ,  H05K13/04 ,  H05K13/00

CPC分类号： G02B6/43 ,  H01L2224/73204 ,  Y10T29/49117 ,  Y10T29/4913

摘要： Embodiments of the present disclosure provide techniques and configurations for routing signals of an electro-optical assembly using a glass bridge. In one embodiment, an electro-optical assembly includes a laser die having a laser device and a glass bridge electrically coupled with the laser die by one or more interconnect structures, the glass bridge including electrical routing features configured to route electrical signals to the laser die from a transmitter device. Other embodiments may be described and/or claimed.

摘要翻译： 本公开的实施例提供了使用玻璃桥路由电光学组件路由信号的技术和配置。 在一个实施例中，电光学组件包括具有激光器件的激光器管芯和通过一个或多个互连结构与激光管芯电耦合的玻璃桥，所述玻璃桥接器包括被配置为将电信号路由到激光器管芯 从发射机设备。 可以描述和/或要求保护其他实施例。

公开(公告)号：US08450201B2

公开(公告)日：2013-05-28

申请号：US13167902

申请日：2011-06-24

申请人： Henning Braunisch ,  Kemal Aygun

发明人： Henning Braunisch ,  Kemal Aygun

IPC分类号： H01L21/44 ,  H01L23/498 ,  H01R13/62

CPC分类号： H05K1/0243 ,  H01L23/367 ,  H01L23/66 ,  H01L24/16 ,  H01L25/0657 ,  H01L25/16 ,  H01L2223/6622 ,  H01L2224/16225 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2225/06517 ,  H01L2225/06589 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/14 ,  H05K1/182 ,  H05K3/222 ,  H05K2201/10356 ,  H05K2201/10492 ,  H05K2201/10704 ,  Y10T29/49002 ,  H01L2924/00 ,  H01L2224/0401

摘要： A multimode system with at least two end points may include a multimode signaling path that, in some embodiments, is a multimode cable or a multimode board and is pluggably connectable to packages at each end point. Each end point may include a processor die package coupled to a socket. The socket may also receive a connector that couples the cable to the package. Power supply signals and input/output signals may be decoupled at each end point.

摘要翻译： 具有至少两个端点的多模系统可以包括在一些实施例中是多模电缆或多模板并且可插​​拔地连接到每个端点处的封装的多模信令路径。 每个端点可以包括耦合到插座的处理器管芯封装。 插座还可以接收将电缆耦合到封装的连接器。 电源信号和输入/输出信号可以在每个端点解耦。

公开(公告)号：US20110019386A1

公开(公告)日：2011-01-27

申请号：US12882322

申请日：2010-09-15

申请人： Henning Braunisch ,  Kemal Aygun

发明人： Henning Braunisch ,  Kemal Aygun

IPC分类号： H05K7/00

CPC分类号： H05K1/0243 ,  H01L23/367 ,  H01L23/66 ,  H01L24/16 ,  H01L25/0657 ,  H01L25/16 ,  H01L2223/6622 ,  H01L2224/16225 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2225/06517 ,  H01L2225/06589 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/14 ,  H05K1/182 ,  H05K3/222 ,  H05K2201/10356 ,  H05K2201/10492 ,  H05K2201/10704 ,  Y10T29/49002 ,  H01L2924/00 ,  H01L2224/0401

摘要： A multimode system with at least two end points may include a multimode signaling path that, in some embodiments, is a multimode cable or a multimode board and is pluggably connectable to packages at each end point. Each end point may include a processor die package coupled to a socket. The socket may also receive a connector that couples the cable to the package. Power supply signals and input/output signals may be decoupled at each end point.

公开(公告)号：US07816779B2

公开(公告)日：2010-10-19

申请号：US12217294

申请日：2008-07-02

申请人： Henning Braunisch ,  Kemal Aygun

发明人： Henning Braunisch ,  Kemal Aygun

IPC分类号： H01L23/52

CPC分类号： H05K1/0243 ,  H01L23/367 ,  H01L23/66 ,  H01L24/16 ,  H01L25/0657 ,  H01L25/16 ,  H01L2223/6622 ,  H01L2224/16225 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2225/06517 ,  H01L2225/06589 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/14 ,  H05K1/182 ,  H05K3/222 ,  H05K2201/10356 ,  H05K2201/10492 ,  H05K2201/10704 ,  Y10T29/49002 ,  H01L2924/00 ,  H01L2224/0401

摘要： A multimode system with at least two end points may include a multimode signaling path that, in some embodiments, is a multimode cable or a multimode board and is pluggably connectable to packages at each end point. Each end point may include a processor die package coupled to a socket. The socket may also receive a connector that couples the cable to the package. Power supply signals and input/output signals may be decoupled at each end point.

摘要翻译： 具有至少两个端点的多模系统可以包括在一些实施例中是多模电缆或多模板并且可插​​拔地连接到每个端点处的封装的多模信令路径。 每个端点可以包括耦合到插座的处理器管芯封装。 插座还可以接收将电缆耦合到封装的连接器。 电源信号和输入/输出信号可以在每个端点解耦。

公开(公告)号：US20100096743A1

公开(公告)日：2010-04-22

申请号：US12587175

申请日：2009-10-01

申请人： Sanka Ganesan ,  Kemal Aygun ,  Chandrashekhar Ramaswamy ,  Eric Palmer ,  Henning Braunisch

发明人： Sanka Ganesan ,  Kemal Aygun ,  Chandrashekhar Ramaswamy ,  Eric Palmer ,  Henning Braunisch

IPC分类号： H01L23/36 ,  H01L23/48

CPC分类号： H01L23/34 ,  H01L23/367 ,  H01L23/498 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/50 ,  H01L23/66 ,  H01L2223/6627 ,  H01L2224/16225 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/15192 ,  H01L2924/19032 ,  H01L2224/0401

摘要： A high-speed I/O trace is part of an I/O package architecture for an integrated circuit package substrate. The integrated circuit package substrate includes an integrated heat spreader footprint on a die-side and the I/O trace to couple with an IC device to be disposed inside the IHS footprint. The I/O trace includes a pin-out terminal outside the IHS footprint to couple to an IC device to be disposed outside the IHS footprint. The high-speed I/O trace can sustain a data flow rate from a processor in a range from 5 gigabits per second (Gb/s) to 40 Gb/s.

摘要翻译： 高速I / O迹线是集成电路封装基板的I / O封装架构的一部分。 集成电路封装衬底包括在芯片侧的集成的散热器占地面积，并且I / O迹线与要设置在IHS占地面积内的IC器件耦合。 I / O跟踪包括IHS封装之外的引脚输出端子，以连接到要设置在IHS占用空间之外的IC器件。 高速I / O跟踪可以维持从5吉比特每秒（Gb / s）到40 Gb / s的处理器的数据流速。

公开(公告)号：US20100078781A1

公开(公告)日：2010-04-01

申请号：US12286212

申请日：2008-09-29

申请人： Sanka Ganesan ,  Kemal Aygun ,  Chandrashekhar Ramaswamy ,  Eric Palmer ,  Henning Braunisch

发明人： Sanka Ganesan ,  Kemal Aygun ,  Chandrashekhar Ramaswamy ,  Eric Palmer ,  Henning Braunisch

IPC分类号： H01L23/50 ,  H01L21/60

CPC分类号： H01L23/34 ,  H01L23/367 ,  H01L23/498 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/50 ,  H01L23/66 ,  H01L2223/6627 ,  H01L2224/16225 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/15192 ,  H01L2924/19032 ,  H01L2224/0401

摘要： A high-speed I/O trace is part of an I/O package architecture for an integrated circuit package substrate. The integrated circuit package substrate includes an integrated heat spreader footprint on a die-side and the I/O trace to couple with an IC device to be disposed inside the IHS footprint. The I/O trace includes a pin-out terminal outside the IHS footprint to couple to an IC device to be disposed outside the IHS footprint. The high-speed I/O trace can sustain a data flow rate from a processor in a range from 5 gigabits per second (Gb/s) to 40 Gb/s.

摘要翻译： 高速I / O迹线是集成电路封装基板的I / O封装架构的一部分。 集成电路封装衬底包括在芯片侧的集成的散热器占地面积，并且I / O迹线与要设置在IHS占地面积内的IC器件耦合。 I / O跟踪包括IHS封装之外的引脚输出端子，以连接到要设置在IHS占用空间之外的IC器件。 高速I / O跟踪可以维持从5吉比特每秒（Gb / s）到40 Gb / s的处理器的数据流速。

公开(公告)号：US07684660B2

公开(公告)日：2010-03-23

申请号：US11166577

申请日：2005-06-24

申请人： Henning Braunisch ,  Daoqiang Lu ,  Nathaniel Arbizu

发明人： Henning Braunisch ,  Daoqiang Lu ,  Nathaniel Arbizu

IPC分类号： G02B6/26

CPC分类号： G02B6/4224 ,  G02B6/4204 ,  G02B6/4214 ,  G02B6/4239 ,  G02B6/4249 ,  H01L2224/14 ,  H01L2224/16225

摘要： Methods and apparatus to mount an optical waveguide to a substrate are disclosed. A disclosed method involves providing a substrate having a first layer and a second layer. The first layer includes at least one alignment fiducial and the second layer covers the at least one fiducial. At least a portion of the second layer is removed to render the fiducial visible and a waveguide is automatically aligned with the first fiducial. The waveguide is then fixed to the substrate.

摘要翻译： 公开了将光波导安装到衬底的方法和装置。 所公开的方法涉及提供具有第一层和第二层的衬底。 第一层包括至少一个对准基准，第二层覆盖至少一个基准。 去除第二层的至少一部分以使基准可见，并且波导自动与第一基准对准。 然后将波导固定到基板。

公开(公告)号：US07646093B2

公开(公告)日：2010-01-12

申请号：US11613523

申请日：2006-12-20

申请人： Henning Braunisch ,  Chuan Hu ,  Gloria Alejandra Camacho Bragado

发明人： Henning Braunisch ,  Chuan Hu ,  Gloria Alejandra Camacho Bragado

IPC分类号： H01L23/36

CPC分类号： H05K1/0204 ,  H01L25/0657 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/73253 ,  H01L2225/06517 ,  H01L2225/06572 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/15192 ,  H01L2924/15312 ,  H01L2924/3011 ,  H05K1/0206 ,  H05K1/141 ,  H05K2201/066 ,  H05K2201/10303 ,  H05K2201/10378 ,  H05K2201/10477 ,  H05K2201/10674 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： An apparatus including a first die mounted on a primary side of an electronic package and a second die mounted on a secondary side of the electronic package between the electronic package and a printed circuit board. The apparatus further comprising a thermal component thermally connected to the second die and mounted on the printed circuit board, the thermal component comprising a set of pins extending from a heat sink through a set of through-holes in the printed circuit board. A method including positioning a set of thermal connectors through a printed circuit board, the thermal connectors extending from a primary side of the printed circuit board to a secondary side of the printed circuit board opposite the primary side. The method further including thermally connecting the thermal connectors to a die positioned between an electronic package and the primary side of the printed circuit board to transfer heat from the die to the secondary side of the printed circuit board.

摘要翻译： 一种装置，包括安装在电子封装的初级侧上的第一裸片和安装在电子封装与印刷电路板之间的电子封装的次级侧上的第二裸片。 所述装置还包括热连接到所述第二管芯并安装在所述印刷电路板上的热部件，所述热部件包括从散热器延伸穿过所述印刷电路板中的一组通孔的一组销。 一种方法，包括通过印刷电路板定位一组热连接器，所述热连接器从印刷电路板的初级侧延伸到与初级侧相对的印刷电路板的次级侧。 该方法还包括将热连接器热连接到位于电子封装和印刷电路板的初级侧之间的管芯，以将热量从管芯传递到印刷电路板的次级侧。

公开(公告)号：US20100002398A1

公开(公告)日：2010-01-07

申请号：US12217294

申请日：2008-07-02

申请人： Henning Braunisch ,  Kemal Aygun

发明人： Henning Braunisch ,  Kemal Aygun

IPC分类号： H05K7/20 ,  H05K1/18

CPC分类号： H05K1/0243 ,  H01L23/367 ,  H01L23/66 ,  H01L24/16 ,  H01L25/0657 ,  H01L25/16 ,  H01L2223/6622 ,  H01L2224/16225 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2225/06517 ,  H01L2225/06589 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/14 ,  H05K1/182 ,  H05K3/222 ,  H05K2201/10356 ,  H05K2201/10492 ,  H05K2201/10704 ,  Y10T29/49002 ,  H01L2924/00 ,  H01L2224/0401

摘要： A multimode system with at least two end points may include a multimode signaling path that, in some embodiments, is a multimode cable or a multimode board and is pluggably connectable to packages at each end point. Each end point may include a processor die package coupled to a socket. The socket may also receive a connector that couples the cable to the package. Power supply signals and input/output signals may be decoupled at each end point.