MANUFACTURING TECHNIQUES TO LIMIT DAMAGE ON WORKPIECE WITH VARYING TOPOGRAPHIES
    31.
    发明申请
    MANUFACTURING TECHNIQUES TO LIMIT DAMAGE ON WORKPIECE WITH VARYING TOPOGRAPHIES 有权
    制造技术限制工件损坏与变化的地形

    公开(公告)号:US20130137266A1

    公开(公告)日:2013-05-30

    申请号:US13306299

    申请日:2011-11-29

    IPC分类号: H01L21/311

    摘要: Some embodiments relate to a method for processing a workpiece. In the method, a first photoresist layer is provided over the workpiece, wherein the first photoresist layer has a first photoresist tone. The first photoresist layer is patterned to provide a first opening exposing a first portion of the workpiece. A second photoresist layer is then provided over the patterned first photoresist layer, wherein the second photoresist layer has a second photoresist tone opposite the first photoresist tone. The second photoresist layer is then patterned to provide a second opening that at least partially overlaps the first opening to define a coincidentally exposed workpiece region. A treatment is then performed on the coincidentally exposed workpiece region. Other embodiments are also disclosed.

    摘要翻译: 一些实施例涉及用于处理工件的方法。 在该方法中,在工件上设置第一光致抗蚀剂层,其中第一光致抗蚀剂层具有第一光致抗蚀剂色调。 图案化第一光致抗蚀剂层以提供暴露工件的第一部分的第一开口。 然后在图案化的第一光刻胶层上提供第二光致抗蚀剂层,其中第二光致抗蚀剂层具有与第一光致抗蚀剂色调相反的第二光致抗蚀剂色调。 然后对第二光致抗蚀剂层进行图案化以提供与第一开口至少部分重叠的第二开口,以限定重合的工件区域。 然后对同时暴露的工件区域进行处理。 还公开了其他实施例。

    Method of measurement in semiconductor fabrication
    32.
    发明授权
    Method of measurement in semiconductor fabrication 有权
    半导体制造中的测量方法

    公开(公告)号:US08178422B2

    公开(公告)日:2012-05-15

    申请号:US12415005

    申请日:2009-03-31

    摘要: Provided is a method of fabricating a semiconductor device. The method includes providing a device substrate having a front side and a back side, the device substrate having a first refractive index, forming an embedded target over the front side of the device substrate, forming a reflective layer over the embedded target, forming a media layer over the back side of the device substrate, the media layer having a second refractive index less than the first refractive index, and projecting radiation through the media layer and the device substrate from the back side so that the embedded target is detected for a semiconductor process.

    摘要翻译: 提供一种制造半导体器件的方法。 该方法包括提供具有前侧和后侧的器件衬底,器件衬底具有第一折射率,在器件衬底的前侧上形成嵌入的靶,在嵌入的靶上形成反射层,形成介质 所述介质层具有小于所述第一折射率的第二折射率,并且从所述背面将辐射从所述介质层和所述器件基板突出以使得所述嵌入的靶被检测为半导体 处理。

    Method of fabricating backside illuminated image sensor
    33.
    发明授权
    Method of fabricating backside illuminated image sensor 有权
    制造背面照明图像传感器的方法

    公开(公告)号:US07923344B2

    公开(公告)日:2011-04-12

    申请号:US12634080

    申请日:2009-12-09

    IPC分类号: H01L31/18

    摘要: A method for fabricating a backside illuminated image sensor is provided. An exemplary method can include providing a substrate with a front surface and a back surface; forming a first alignment mark for global alignment on the front surface of the substrate; forming a second alignment mark for fine alignment in a clear-out region on the front surface of the substrate; aligning the substrate from the back surface using the first alignment mark; and removing a portion of the back surface of the substrate at the clear-out region for locating the second alignment mark.

    摘要翻译: 提供了制造背面照明图像传感器的方法。 示例性方法可以包括提供具有前表面和后表面的基底; 在所述基板的前表面上形成用于全局对准的第一对准标记; 形成用于在所述基板的前表面上的透明区域中精细对准的第二对准标记; 使用第一对准标记从背面对准基板; 以及在所述清除区域处去除所述基板的背面的一部分以定位所述第二对准标记。

    Image sensor device suitable for use with logic-embedded CIS chips and methods for making the same
    34.
    发明授权
    Image sensor device suitable for use with logic-embedded CIS chips and methods for making the same 有权
    适用于逻辑嵌入式CIS芯片的图像传感器装置及其制造方法

    公开(公告)号:US07544982B2

    公开(公告)日:2009-06-09

    申请号:US11542064

    申请日:2006-10-03

    IPC分类号: H01L31/062

    摘要: An image sensor device is provided. A substrate has a photosensor region formed therein and/or thereon. An interconnection structure is formed over the substrate, and includes metal lines formed in inter-metal dielectric (IMD) layers. At least one IMD-level micro-lens is/are formed in at least one of the IMD layers over the photosensor region. Preferably, barrier layers are located between the IMD layers. Preferably, each of the barrier layers at each level has a net thickness limited to 100 angstroms or less at locations over the photosensor region, except at locations where the IMD-level micro-lenses are located. The IMD-level micro-lenses and the etch stop layers preferably have a refractive index greater than that of the IMD layers. A cap layer is preferably formed on the metal lines, especially when the metal lines include copper. An upper-level micro-lens may be located on a level that is above the interconnection structure.

    摘要翻译: 提供图像传感器装置。 衬底在其中和/或其上形成有光电传感器区域。 在衬底上形成互连结构,并且包括在金属间电介质(IMD)层中形成的金属线。 在光电传感器区域中的至少一个IMD层中形成至少一个IMD级微透镜。 优选地,阻挡层位于IMD层之间。 优选地,除了在IMD级微透镜所在的位置之外,每个级别的每个阻挡层的净厚度在光电传感器区域之外的位置处具有限制在100埃或更小的净厚度。 IMD级微透镜和蚀刻停止层优选具有大于IMD层的折射率的折射率。 优选在金属线上形成覆盖层,特别是当金属线包括铜时。 上级微透镜可以位于互连结构之上的层上。

    Manufacturing techniques to limit damage on workpiece with varying topographies
    36.
    发明授权
    Manufacturing techniques to limit damage on workpiece with varying topographies 有权
    制造技术来限制对具有不同形貌的工件的损伤

    公开(公告)号:US08623229B2

    公开(公告)日:2014-01-07

    申请号:US13306299

    申请日:2011-11-29

    IPC分类号: B44C1/22

    摘要: Some embodiments relate to a method for processing a workpiece. In the method, a first photoresist layer is provided over the workpiece, wherein the first photoresist layer has a first photoresist tone. The first photoresist layer is patterned to provide a first opening exposing a first portion of the workpiece. A second photoresist layer is then provided over the patterned first photoresist layer, wherein the second photoresist layer has a second photoresist tone opposite the first photoresist tone. The second photoresist layer is then patterned to provide a second opening that at least partially overlaps the first opening to define a coincidentally exposed workpiece region. A treatment is then performed on the coincidentally exposed workpiece region. Other embodiments are also disclosed.

    摘要翻译: 一些实施例涉及用于处理工件的方法。 在该方法中,在工件上设置第一光致抗蚀剂层,其中第一光致抗蚀剂层具有第一光致抗蚀剂色调。 图案化第一光致抗蚀剂层以提供暴露工件的第一部分的第一开口。 然后在图案化的第一光致抗蚀剂层上提供第二光致抗蚀剂层,其中第二光致抗蚀剂层具有与第一光致抗蚀剂色调相反的第二光致抗蚀剂色调。 然后对第二光致抗蚀剂层进行图案化以提供与第一开口至少部分重叠的第二开口,以限定重合的工件区域。 然后对同时暴露的工件区域进行处理。 还公开了其他实施例。

    IMAGE DEVICE AND METHODS OF FORMING THE SAME
    37.
    发明申请
    IMAGE DEVICE AND METHODS OF FORMING THE SAME 有权
    图像装置及其形成方法

    公开(公告)号:US20130323876A1

    公开(公告)日:2013-12-05

    申请号:US13487840

    申请日:2012-06-04

    IPC分类号: H01L31/18

    摘要: A method of forming of an image sensor device includes a patterned hardmask layer is formed over a substrate. The patterned hard mask layer has a plurality of first openings in a periphery region, and a plurality of second openings in a pixel region. A first patterned mask layer is formed over the pixel region to expose the periphery region. A plurality of first trenches is etched into the substrate in the periphery region. Each first trench, each first opening and each second opening are filled with a dielectric material. A second patterned mask layer is formed over the periphery region to expose the pixel region. The dielectric material in each second opening over the pixel region is removed. A plurality of dopants is implanted through each second opening to form various doped isolation features in the pixel region.

    摘要翻译: 形成图像传感器装置的方法包括在衬底上形成图案化的硬掩模层。 图案化的硬掩模层在周边区域中具有多个第一开口,在像素区域中具有多个第二开口。 在像素区域上形成第一图案化掩模层以暴露外围区域。 多个第一沟槽被蚀刻到周边区域中的衬底中。 每个第一沟槽,每个第一开口和每个第二开口都填充有电介质材料。 在外围区域上形成第二图案化掩模层以暴露像素区域。 在像素区域上的每个第二开口中的电介质材料被去除。 通过每个第二开口注入多个掺杂剂,以在像素区域中形成各种掺杂的隔离特征。

    Dummy Gate Structure for Semiconductor Devices
    38.
    发明申请
    Dummy Gate Structure for Semiconductor Devices 有权
    半导体器件的虚拟门结构

    公开(公告)号:US20130175660A1

    公开(公告)日:2013-07-11

    申请号:US13345059

    申请日:2012-01-06

    IPC分类号: H01L29/06 H01L21/762

    摘要: A structure and method for fabricating a spacer structure for semiconductor devices, such as a multi-gate structure, is provided. The dummy gate structure is formed by depositing a dielectric layer, forming a mask over the dielectric layer, and patterning the dielectric layer. The mask is formed to have a tapered edge. In an embodiment, the tapered edge is formed in a post-patterning process, such as a baking process. In another embodiment, a relatively thick mask layer is utilized such that during patterning a tapered results. The profile of the tapered mask is transferred to the dielectric layer, thereby providing a tapered edge on the dielectric layer.

    摘要翻译: 提供了一种用于制造诸如多栅极结构的半导体器件的间隔结构的结构和方法。 虚拟栅极结构通过沉积介电层,在电介质层上形成掩模和图案化电介质层而形成。 掩模形成为具有锥形边缘。 在一个实施例中,锥形边缘在诸如烘烤工艺的后图案化工艺中形成。 在另一个实施例中,使用相对厚的掩模层,使得在图案化期间形成锥形结果。 锥形掩模的轮廓转移到电介质层,从而在电介质层上提供锥形边缘。

    METHOD OF MEASUREMENT IN SEMICONDUCTOR FABRICATION
    40.
    发明申请
    METHOD OF MEASUREMENT IN SEMICONDUCTOR FABRICATION 有权
    半导体制造中的测量方法

    公开(公告)号:US20100244287A1

    公开(公告)日:2010-09-30

    申请号:US12415005

    申请日:2009-03-31

    IPC分类号: H01L23/544 H01L21/30

    摘要: Provided is a method of fabricating a semiconductor device. The method includes providing a device substrate having a front side and a back side, the device substrate having a first refractive index, forming an embedded target over the front side of the device substrate, forming a reflective layer over the embedded target, forming a media layer over the back side of the device substrate, the media layer having a second refractive index less than the first refractive index, and projecting radiation through the media layer and the device substrate from the back side so that the embedded target is detected for a semiconductor process.

    摘要翻译: 提供一种制造半导体器件的方法。 该方法包括提供具有前侧和后侧的器件衬底,器件衬底具有第一折射率,在器件衬底的前侧上形成嵌入的靶,在嵌入的靶上形成反射层,形成介质 所述介质层具有小于所述第一折射率的第二折射率,并且从所述背面将辐射从所述介质层和所述器件基板突出以使得所述嵌入的靶被检测为半导体 处理。