公开(公告)号：US20230199671A1

公开(公告)日：2023-06-22

申请号：US18171881

申请日：2023-02-21

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Satoshi TANAKA ,  Kiichiro TAKENAKA ,  Takayuki TSUTSUI ,  Taizo YAMAWAKI ,  Shun IMAI

IPC: H04W52/24 ,  H04W52/02 ,  H03F3/189 ,  H03F3/24 ,  H04B1/04 ,  H03F1/02 ,  H03F3/19 ,  H03F3/21

CPC classification number: H04W52/246 ,  H04W52/0261 ,  H03F3/189 ,  H03F3/24 ,  H04B1/0475 ,  H03F1/0227 ,  H03F1/0277 ,  H04W52/0251 ,  H03F3/19 ,  H03F1/0216 ,  H03F3/21 ,  Y02D30/70 ,  H04W88/06

Abstract: A high-frequency signal processing apparatus and a wireless communication apparatus can achieve a decrease in power consumption. For example, when an indicated power level to a high-frequency power amplifier is equal to or greater than a second reference value, envelope tracking is performed by causing a source voltage control circuit to control a high-speed DCDC converter using a detection result of an envelope detecting circuit and causing a bias control circuit to indicate a fixed bias value. The source voltage control circuit and the bias control circuit indicate a source voltage and a bias value decreasing in proportion to a decrease in the indicated power level when the indicated power level is in a range of the second reference value to the first reference value, and indicate a fixed source voltage and a fixed bias value when the indicated power level is less than the first reference value.

公开(公告)号：US20220189936A1

公开(公告)日：2022-06-16

申请号：US17549615

申请日：2021-12-13

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Takayuki TSUTSUI ,  Yuichi SAITO

IPC: H01L25/16 ,  H01L23/00 ,  H03F3/45

Abstract: A semiconductor device includes first member that includes a switch made of a semiconductor element made from an elemental semiconductor. The first member is joined to a second member including a radio-frequency circuit including a semiconductor element made from a compound semiconductor. The switch and the radio-frequency circuit are connected by a path. The path includes an inter-member connection wire made of a metal pattern arranged on an interlayer insulating film extending from a surface of the second member to a surface of the first member or a conductive member allowing a current to flow in a direction crossing an interface where the first member and the second member are joined.

公开(公告)号：US20210135657A1

公开(公告)日：2021-05-06

申请号：US17089766

申请日：2020-11-05

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Takayuki TSUTSUI ,  Satoshi TANAKA ,  Kiichiro TAKENAKA ,  Masatoshi HASE

IPC: H03H11/32 ,  H03F3/21

Abstract: An active balun circuit includes first and second transistors having emitters electrically coupled to each other and configured to output differential signals and a circuit element coupled between the connection point of the emitter of the first transistor and the emitter of the second transistor and a reference potential. The impedance of the circuit element at a particular frequency of the input signal appears significantly larger than impedances at other frequencies. An input signal from an input terminal is inputted to the base of the first transistor. The reference potential is applied to the base of the second transistor. A supply voltage is applied to the collector of the first transistor and the collector of the second transistor. A signal from the collector of the first transistor and a signal from the collector of the second transistor are outputted as the differential signals.

公开(公告)号：US20200303372A1

公开(公告)日：2020-09-24

申请号：US16820441

申请日：2020-03-16

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Kenji SASAKI ,  Masao KONDO ,  Shigeki KOYA ,  Shinnosuke TAKAHASHI ,  Yasunari UMEMOTO ,  Isao OBU ,  Takayuki TSUTSUI

IPC: H01L27/082 ,  H03F3/195 ,  H03F3/213 ,  H01L29/737

Abstract: A semiconductor device includes two cell rows, each of which is formed of a plurality of transistor cells aligned in parallel to each other. Each of the plurality of transistor cells includes a collector region, a base region, and an emitter region that are disposed above a substrate. A plurality of collector extended wiring lines are each connected to the collector region of a corresponding one of the plurality of transistor cells and are extended in a direction intersecting an alignment direction of the plurality of transistor cells. A collector integrated wiring line connects the plurality of collector extended wiring lines to each other. A collector intermediate integrated wiring line that is disposed between the two cell rows in plan view connects the plurality of collector extended wring lines extended from the plurality of transistor cells that belong to one of the two cell rows to each other.

公开(公告)号：US20190190476A1

公开(公告)日：2019-06-20

申请号：US16223297

申请日：2018-12-18

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Masao KONDO ,  Satoshi TANAKA ,  Yasuhisa YAMAMOTO ,  Takayuki TSUTSUI ,  Isao OBU

IPC: H03G3/30 ,  H03F3/21 ,  H03F1/02 ,  H03F3/195

CPC classification number: H03G3/3042 ,  H03F1/0211 ,  H03F3/195 ,  H03F3/211 ,  H03F2200/222 ,  H03F2200/387 ,  H03F2200/451 ,  H03F2200/48 ,  H03F2200/54 ,  H03F2203/21103 ,  H03F2203/21139 ,  H03G2201/106

Abstract: A power amplifier circuit includes a first transistor amplifying a first signal; a second transistor amplifying a second signal; a bias circuit supplying a bias current or voltage to a base or gate of the second transistor; and an attenuator attenuating the first or second signal in accordance with a control voltage supplied from the bias circuit. The attenuator includes a first diode to which the control voltage is supplied, a third transistor including a collector connected to a supply path of the first or second signal, an emitter connected to a ground, and a base to which the control voltage is supplied from the first diode, and a capacitor connected in parallel with the first diode. The control voltage decreases as a second signal power level increases. The third transistor allows part of the first or second signal to pass to the emitter in accordance with the control voltage.

公开(公告)号：US20190172933A1

公开(公告)日：2019-06-06

申请号：US16207084

申请日：2018-11-30

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Isao OBU ,  Yasunari UMEMOTO ,  Masahiro SHIBATA ,  Shigeki KOYA ,  Masao KONDO ,  Takayuki TSUTSUI

IPC: H01L29/737 ,  H01L23/00 ,  H01L29/08 ,  H01L29/10 ,  H01L29/205 ,  H01L21/02 ,  H01L21/285 ,  H01L21/308 ,  H01L21/306 ,  H01L29/66

Abstract: A bipolar transistor including a first collector layer, a second collector layer, a base layer, and an emitter layer is disposed on a substrate. Etching characteristics of the second collector layer are different from etching characteristics of the first collector layer and the base layer. In plan view, an edge of an interface between the first collector layer and the second collector layer is disposed inside an edge of a lower surface of the base layer, and an edge of an upper surface of the second collector layer coincides with the edge of the lower surface of the base layer or is disposed inside the edge of the lower surface of the base layer.

公开(公告)号：US20190150100A1

公开(公告)日：2019-05-16

申请号：US16243634

申请日：2019-01-09

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Satoshi TANAKA ,  Kiichiro TAKENAKA ,  Takayuki TSUTSUI ,  Taizo YAMAWAKI ,  Shun IMAI

IPC: H04W52/24 ,  H04B1/04 ,  H03F3/189 ,  H03F3/24 ,  H03F1/02 ,  H03F3/21 ,  H04W52/02 ,  H03F3/19

CPC classification number: H04W52/246 ,  H03F1/0216 ,  H03F1/0227 ,  H03F1/0277 ,  H03F3/189 ,  H03F3/19 ,  H03F3/21 ,  H03F3/24 ,  H03F2200/102 ,  H03F2200/294 ,  H03F2200/504 ,  H04B1/0475 ,  H04W52/0251 ,  H04W52/0261 ,  H04W88/06 ,  Y02D70/00 ,  Y02D70/1246 ,  Y02D70/1262 ,  Y02D70/40

Abstract: A high-frequency signal processing apparatus and a wireless communication apparatus can achieve a decrease in power consumption. For example, when an indicated power level to a high-frequency power amplifier is equal to or greater than a second reference value, envelope tracking is performed by causing a source voltage control circuit to control a high-speed DCDC converter using a detection result of an envelope detecting circuit and causing a bias control circuit to indicate a fixed bias value. The source voltage control circuit and the bias control circuit indicate a source voltage and a bias value decreasing in proportion to a decrease in the indicated power level when the indicated power level is in a range of the second reference value to the first reference value, and indicate a fixed source voltage and a fixed bias value when the indicated power level is less than the first reference value.

公开(公告)号：US20180212578A1

公开(公告)日：2018-07-26

申请号：US15926165

申请日：2018-03-20

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Yasushi OYAMA ,  Takayuki TSUTSUI ,  Kazuhito NAKAI

IPC: H03G1/00 ,  H03F3/72 ,  H03F3/24 ,  H03F3/19 ,  H03F3/213 ,  H03F1/56

CPC classification number: H03G1/0094 ,  H03F1/56 ,  H03F3/19 ,  H03F3/213 ,  H03F3/245 ,  H03F3/72 ,  H03F2200/111 ,  H03F2200/165 ,  H03F2200/222 ,  H03F2200/318 ,  H03F2200/387 ,  H03F2203/7209 ,  H03G2201/106 ,  H03G2201/40

Abstract: A power amplification module includes a first input terminal that receives a first transmit signal in a first frequency band, a second input terminal that receives a second transmit signal in a second frequency band having a narrower transmit/receive frequency interval than the first frequency band, a first amplification circuit that receives and amplifies the first transmit signal to produce a first amplified signal and outputs the first amplified signal, a second amplification circuit that receives and amplifies the second transmit signal to produce a second amplified signal and outputs the second amplified signal, a third amplification circuit that receives and amplifies the first or second amplified signal to produce an output signal and outputs the output signal, and an attenuation circuit located between the second input terminal and the second amplification circuit and configured to attenuate a receive frequency band component of the second frequency band.

公开(公告)号：US20180152902A1

公开(公告)日：2018-05-31

申请号：US15880871

申请日：2018-01-26

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Satoshi TANAKA ,  Takayuki TSUTSUI ,  Yusuke TANAKA ,  Hayato NAKAMURA ,  Kazuhito NAKAI

IPC: H04W52/52 ,  H03F3/195 ,  H04W72/04 ,  H04L5/14 ,  H04B7/26 ,  H03F1/02 ,  H03F3/68 ,  H03F3/24 ,  H04W88/06

CPC classification number: H04W52/52 ,  H03F1/0261 ,  H03F3/195 ,  H03F3/245 ,  H03F3/68 ,  H03F2200/111 ,  H04B7/265 ,  H04L5/14 ,  H04W72/042 ,  H04W88/06

Abstract: Provided is a communication unit that includes first and second power-amplification modules, which can be integrated. The first power-amplification module includes a first power-amplifier for a first frequency band in a first communication scheme, a second power-amplifier for a second frequency band in the first communication scheme, a third power-amplifier for a third frequency band in a second communication scheme, a fourth power-amplifier for a fourth frequency band in the second communication scheme, a first bias circuit that generates a first bias current to the first and second power-amplifiers, and a bias current circuit that converts the first bias current into a second bias current to the third and fourth power-amplifiers. The second power-amplification module includes a fifth power-amplifier for a fifth frequency band in the first communication scheme, and a second bias circuit that generates a third bias current to the fifth power-amplifier.

公开(公告)号：US20180083583A1

公开(公告)日：2018-03-22

申请号：US15709787

申请日：2017-09-20

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Takayuki TSUTSUI ,  Fumio HARIMA

IPC: H03F3/72 ,  H03F3/21 ,  H03F3/195 ,  H03F3/24 ,  H03F1/56

CPC classification number: H03F3/72 ,  H03F1/56 ,  H03F3/195 ,  H03F3/211 ,  H03F3/245 ,  H03F2200/111 ,  H03F2200/222 ,  H03F2200/387 ,  H03F2200/451 ,  H03F2203/7209 ,  H03F2203/7236 ,  H04B1/006 ,  H04B1/40

Abstract: Provided is a power amplification module that supports a plurality of communication systems. The power amplification module includes: two power amplifiers that can be selectively connected in parallel with each other; a switch that, in accordance with one communication system selected from among the plurality of communication systems, selects one power amplifier that is to operate by itself from among the two power amplifiers or selects the two power amplifiers and connects the two power amplifiers in parallel with each other; and a phase correction circuit that, when the two power amplifiers are both selected, corrects a phase difference by being selectively connected between the outputs of the two selected power amplifiers such that a phase difference is not generated between the output signals of the two selected power amplifiers.