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公开(公告)号:US10019406B2
公开(公告)日:2018-07-10
申请号:US15803639
申请日:2017-11-03
Applicant: QUALCOMM Incorporated
Inventor: Lalan Jee Mishra , Richard Dominic Wietfeldt , Helena Deirdre O'Shea , ZhenQi Chen , Wolfgang Roethig
IPC: G06F13/38 , G06F13/42 , G06F21/85 , G06F13/40 , G06F13/364
CPC classification number: G06F13/4286 , G06F13/102 , G06F13/16 , G06F13/28 , G06F13/364 , G06F13/4022 , G06F21/85
Abstract: Methods and apparatuses are described that facilitate data communication between a first slave device and a second slave device across a serial bus interface. In one configuration, a master device receives, from a first slave device, a request to send a masked-write datagram to a second slave device via a bus, wherein the masked-write datagram is addressed to a radio frequency front end (RFFE) register of the second slave device. The masked-write datagram includes a mask field identifying at least one bit to be changed in the RFFE register and a data field providing a value of the at least one bit to be changed in the RFFE register. The master device detects whether the first slave device is authorized to send the masked-write datagram to the second slave device and permits the first slave device to send the masked-write datagram to the second slave device if authorization is detected.
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公开(公告)号:US09990317B2
公开(公告)日:2018-06-05
申请号:US15346602
申请日:2016-11-08
Applicant: QUALCOMM Incorporated
Inventor: Lalan Jee Mishra , Richard Wietfeldt , Helena Deirdre O'Shea
IPC: G06F13/36 , G06F12/00 , G06F13/362 , G06F9/30
CPC classification number: G06F13/362 , G06F9/30101 , G06F13/38
Abstract: Systems, methods, and apparatus for data communication are provided. An apparatus maybe configured to generate a mask field in a packet to be transmitted through an interface to a slave device, the mask field having a first number of bits, provide a control-bit field in the packet, the control-bit field having a second number of bits, where the second number of bits is less than the first number of bits, and transmit the packet through the interface. The packet may be addressed to a control register of the slave device. The control register may have the first number of bits. Each bit in the control-bit field may correspond to a bit of the control register that is identified by the mask field.
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公开(公告)号:US09990316B2
公开(公告)日:2018-06-05
申请号:US14860568
申请日:2015-09-21
Applicant: QUALCOMM Incorporated
Inventor: Lalan Jee Mishra , Richard Dominic Wietfeldt
IPC: G06F3/00 , G06F13/42 , G06F13/00 , G06F13/362 , G06F13/40
CPC classification number: G06F13/362 , G06F13/4068 , G06F13/4282 , G06F13/4291
Abstract: A modified serial peripheral interface (SPI) is provided in each of a master device and a plurality of slave devices that does not use a slave select line. The master device may thus engage in full-duplex serial communication with each slave device through an SPI MOSI line, an SPI MISO line, and an SPI clock line.
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公开(公告)号:US20170168978A1
公开(公告)日:2017-06-15
申请号:US15348435
申请日:2016-11-10
Applicant: QUALCOMM Incorporated
Inventor: Lalan Jee Mishra , Richard Dominic Wietfeldt
IPC: G06F13/42 , G06F13/40 , G06F9/44 , G06F13/364
CPC classification number: G06F13/4282 , G06F9/4411 , G06F13/364 , G06F13/404
Abstract: Systems, methods, and apparatus for implementing hardware flow control between devices coupled through a serial peripheral interface. A method for transmitting information using a serial peripheral interface includes initiating an exchange of data over one or more data lines of a serial peripheral interface bus by asserting a first voltage state on a slave select line, transmitting data and clock signals over the serial peripheral interface bus while the slave select line remains at the first voltage state, refraining from transmitting data and clock signals over the serial peripheral interface bus when the slave select line transitions to a second first voltage state, receiving data at a slave device into a receive buffer while the slave select line remains at the first voltage state, and asserting the second voltage state on the slave select line when occupancy of the receive buffer reaches or exceeds a threshold occupancy level.
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公开(公告)号:US20170116141A1
公开(公告)日:2017-04-27
申请号:US15298071
申请日:2016-10-19
Applicant: QUALCOMM Incorporated
Inventor: Lalan Jee Mishra , Richard Wietfeldt , Helena Deirdre O'Shea , Zhenqi Chen , Wolfgang Roethig
CPC classification number: G06F13/28 , G06F13/102 , G06F13/16
Abstract: Methods and apparatuses are described that facilitate the communication of data between a transmitter and a receiver across a serial bus interface. In one configuration, a transmitter generates a datagram based on a 16-bit address and a mask-and-data pair burst length, the 16-bit address including a most significant byte (MSB) and a least significant byte (LSB), compares the MSB to a receiver base address maintained in a shadow register, compares the mask-and-data pair burst length to a receiver masked-write burst length maintained in the shadow register, and sends the datagram to the receiver via the bus interface when: the MSB is equal to the receiver base address maintained in the shadow register, and the mask-and-data pair burst length is equal to the receiver masked-write burst length maintained in the shadow register.
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36.
公开(公告)号:US20160306770A1
公开(公告)日:2016-10-20
申请号:US15097237
申请日:2016-04-12
Applicant: QUALCOMM Incorporated
Inventor: Lalan Jee Mishra , Richard Wietfeldt , Mohit Prasad , James Panian
CPC classification number: G06F13/4282 , G06F13/1678 , G06F13/385 , H03M13/19 , Y02D10/14 , Y02D10/151
Abstract: A multi-modulation scheme is provided that combines pulse-width modulation and phase modulation to transmit a plurality of GPIO signals as virtual GPIO signals.
Abstract translation: 提供了组合脉冲宽度调制和相位调制以将多个GPIO信号作为虚拟GPIO信号发送的多调制方案。
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37.
公开(公告)号:US20160260328A1
公开(公告)日:2016-09-08
申请号:US14640144
申请日:2015-03-06
Applicant: QUALCOMM Incorporated
Inventor: Lalan Jee Mishra , Richard Dominic Wietfeldt , Joseph Czompo
CPC classification number: G08G1/163 , G01S5/0072 , G01S5/0284 , G01S13/931 , G01S19/14 , G01S19/39 , G01S19/51 , G01S19/53 , G01S2013/936 , G05D1/0088 , G08G1/166
Abstract: Methods, devices, systems, and non-transitory process-readable storage media for a computing device of an autonomous vehicle to generate real-time mappings of nearby vehicles. An embodiment method executed by a computing device may include operations for obtaining origin point coordinates via a first satellite-based navigation functionality, obtaining termination point coordinates via a second satellite-based navigation functionality, calculating a unit vector based on the obtained origin point coordinates and the obtained termination point coordinates, identifying a position, a direction, and an occupancy of the autonomous vehicle based on the obtained origin point coordinates, the calculated unit vector, and stored vehicle dimensions data (e.g., length, width, height), and transmitting a message using DSRC with the origin point coordinates, the stored vehicle dimensions data, and data for identifying the vehicle's direction. The computing device may compare the direction, position, and occupancy to data of nearby vehicles based on incoming messages received via DSRC.
Abstract translation: 用于自主车辆的计算装置的方法,装置,系统和非暂时的过程可读存储介质,用于生成附近车辆的实时映射。 由计算设备执行的实施例方法可以包括经由第一基于卫星的导航功能获得原点坐标的操作,经由第二基于卫星的导航功能获得终点坐标,基于获得的原点坐标来计算单位向量,以及 所获得的终点坐标,基于获得的原点坐标,所计算的单位矢量和存储的车辆尺寸数据(例如,长度,宽度,高度)和发送方式来识别自主车辆的位置,方向和占用 使用具有原点坐标的DSRC的消息,存储的车辆尺寸数据和用于识别车辆方向的数据。 计算设备可以根据通过DSRC接收的传入消息,将方向,位置和占用与附近车辆的数据进行比较。
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公开(公告)号:US20150301979A1
公开(公告)日:2015-10-22
申请号:US14533431
申请日:2014-11-05
Applicant: QUALCOMM Incorporated
CPC classification number: G06F13/4252 , G06F9/4498 , G06F9/546 , G06F13/4022 , G06F13/4068 , G06F15/76 , G06F2015/761
Abstract: A finite state machine is provided that both serializes virtual GPIO signals and messaging signals and that deserializer virtual GPIO signals and the messaging signals. The finite state machine frames the serialized virtual GPIO signals and messaging signals into frames each demarcated by a start bit and an end bit.
Abstract translation: 提供了一种有限状态机,可将虚拟GPIO信号和消息传送信号串行化,并且解串器虚拟GPIO信号和消息传递信号。 有限状态机将串行化的虚拟GPIO信号和消息传递信号帧分成由起始位和结束位分隔的帧。
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公开(公告)号:US20150255216A1
公开(公告)日:2015-09-10
申请号:US14201469
申请日:2014-03-07
Applicant: QUALCOMM Incorporated
Inventor: Lalan Jee Mishra , Shree Krishna Pandey , Irfan Khan , Nazanin Darbanian , John David Eaton
CPC classification number: H01G4/30 , H01G2/06 , H01G4/242 , H01G4/35 , H05K1/0231 , H05K1/182 , H05K2201/09345 , H05K2201/10015 , H05K2201/10515 , H05K2201/1053 , H05K2201/10636 , H05K2201/10643 , Y02P70/611
Abstract: A capacitor with low equivalent series inductance includes multiple electrode layers arranged in parallel with alternating ones of the electrode layers connected together to form the two electrodes of the capacitor. A first set of the electrode layers are connected by an outer wall. A second set of the electrode layers are connected by a central post. Terminals on the capacitor can be spaced on a surface so that signals can be conveniently routed when the capacitor is mounted on or in a printed circuit board or integrated circuit package. Terminals can be included on opposing surfaces of the capacitors to provide for stacking. Additionally, one of the terminals substantially surrounds the other terminal and can provide electromagnetic shielding.
Abstract translation: 具有低等效串联电感的电容器包括与连接在一起的交替的电极层并联布置的多个电极层,以形成电容器的两个电极。 第一组电极层通过外壁连接。 第二组电极层通过中心柱连接。 电容器上的端子可以在表面上间隔开,使得当电容器安装在印刷电路板或集成电路封装上时可以方便地布线信号。 端子可以包括在电容器的相对表面上以提供堆叠。 此外,其中一个端子基本上围绕另一个端子并且可以提供电磁屏蔽。
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公开(公告)号:US12124400B2
公开(公告)日:2024-10-22
申请号:US18157000
申请日:2023-01-19
Applicant: QUALCOMM Incorporated
Inventor: Umesh Srikantiah , Lalan Jee Mishra , Francesco Gatta , Richard Dominic Wietfeldt
CPC classification number: G06F13/4291
Abstract: A data communication apparatus coupled to a serial bus has a protocol controller that configures a first plurality of subordinate devices with device identifiers unique within the first plurality of subordinate devices and configures a second plurality of subordinate devices with device identifiers unique within the second plurality of subordinate devices. A sequence start condition transmitted over the serial bus indicates either a first communication mode in which a clock signal is provided to the serial bus or a second communication mode in which no clock signal is provided. A device identifier associated with the first plurality of subordinate devices is used to transmit a first datagram over the serial bus in the first communication mode, and a device identifier associated with the second plurality of subordinate devices is used to transmit a second datagram over the serial bus in the second communication mode.
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