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    Semiconductor device
    31.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US08952721B2

    公开(公告)日：2015-02-10

    申请号：US13805287

    申请日：2011-06-13

    申请人： Takashi Ishiguro ,  Masayuki Sato ,  Tetsuo Hironaka ,  Hitoshi Shimazaki

    发明人： Takashi Ishiguro ,  Masayuki Sato ,  Tetsuo Hironaka ,  Hitoshi Shimazaki

    IPC分类号： H03K19/173 ,  G11C8/10 ,  G11C7/00 ,  H03K19/177

    CPC分类号： G11C8/10 ,  G11C7/00 ,  H03K19/1776 ,  H03K19/17796

    摘要： Disclosed is a semiconductor device which is intended to reduce the total number of storage element blocks that constitute a desired logic circuit. The semiconductor device includes N address lines (N is an integer equal to two or more), N data lines, and a plurality of storage sections. Each of the storage sections includes an address decoder for decoding an address supplied via the N address lines to output a word select signal to word lines; and a plurality of storage elements which are connected to the word lines and the data lines, each store data that constitute a truth table, and input or output the data via the data lines in accordance with the word select signal supplied via the word lines. The semiconductor device is adapted such that the N address lines for the storage sections are connected to the respective data lines of other N ones of the storage sections, while the N data lines for the storage sections are connected to the respective address lines of other N ones of the storage sections.

    摘要翻译： 公开了旨在减少构成期望的逻辑电路的存储元件块的总数的半导体器件。 半导体器件包括N条地址线（N是等于2或更大的整数），N条数据线和多条存储部分。 每个存储部分包括地址解码器，用于对通过N个地址线提供的地址进行解码，以将字选择信号输出到字线; 以及连接到字线和数据线的多个存储元件，每个存储元件存储构成真值表的数据，并且经由数据线经由字线提供的字选择信号来输入或输出数据。 半导体器件适于使用于存储部分的N个地址线连接到其他N个存储部分的相应数据线，而用于存储部分的N个数据线连接到其他N的各个地址线 存储部分。

    Semiconductor device
    32.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US08283945B2

    公开(公告)日：2012-10-09

    申请号：US13255846

    申请日：2010-03-24

    申请人： Tetsuo Hironaka ,  Kazuya Tanigawa ,  Hiroaki Toguchi ,  Naoki Hirakawa ,  Takashi Ishiguro ,  Masayuki Sato

    发明人： Tetsuo Hironaka ,  Kazuya Tanigawa ,  Hiroaki Toguchi ,  Naoki Hirakawa ,  Takashi Ishiguro ,  Masayuki Sato

    IPC分类号： G06F7/38 ,  H03K19/173 ,  H03K3/356

    CPC分类号： H03K19/17736 ,  H03K19/17728 ,  H03K19/17792

    摘要： FPGAs and MPLDs, which are conventional programmable semiconductor devices, have had poor cost performance and did not suitably take long signal lines into account. To solve this, a flip-flop is built into each MLUT block comprised of a plurality of MLUTs, each MLUT comprising a memory and an address-data pair. With respect to the adjacent line between adjacent MLUTs, alternated adjacent line are introduced, while in the case of interconnects between non-adjacent MLUTs, dedicated distant line and, furthermore, a torus interconnect network are provided.

    摘要翻译： 作为常规可编程半导体器件的FPGA和MPLD具有差的成本性能，并未适当地考虑长信号线。 为了解决这个问题，在由多个MLUT组成的每个MLUT块中内置触发器，每个MLUT包括存储器和地址数据对。 相对于相邻MLUT之间的相邻线，引入了交替的相邻线，而在不相邻MLUT之间的互连的情况下，提供专用远距离线，此外，提供了环面互连网络。

    Double-talk detector with accuracy and speed of detection improved and a method therefor
    33.
    发明授权
    Double-talk detector with accuracy and speed of detection improved and a method therefor 有权
    具有检测精度和速度的双向通话检测器及其方法

    公开(公告)号：US08184818B2

    公开(公告)日：2012-05-22

    申请号：US12219486

    申请日：2008-07-23

    申请人： Takashi Ishiguro

    发明人： Takashi Ishiguro

    IPC分类号： H04B3/20

    CPC分类号： H04B3/234

    摘要： A double-talk detector finds an estimated power value of near end background noise based on a residual signal by a noise estimator; the average power of a transmitter input signal by a transmitter average power calculator; the average power of a receiver input signal by a receiver average power calculator; and an estimated echo path attenuation value through a predetermined echo path attenuation value estimating process based on the estimated power value of the near end background noise, the average power of the transmitter input signal and the average power of the receiver input signal by an attenuation value estimator. The double-talk detector detects a double-talk state based on the estimated echo path attenuation value, the average power of the transmitter input signal and the average power of the receiver input signal by a double-talk determiner to control update of the coefficient of an adaptive filter.

    摘要翻译： 双方通话检测器基于噪声估计器的残留信号，求出近端背景噪声的估计功率值; 发射机平均功率计算器的发射机输入信号的平均功率; 接收机平均功率计算器的接收机输入信号的平均功率; 以及基于近端背景噪声的估计功率值，发射机输入信号的平均功率和接收机输入信号的平均功率的衰减值，通过预定回波路径衰减值估计处理的估计回波路径衰减值 估计。 双方通话检测器基于估计的回波路径衰减值，发送器输入信号的平均功率和双方通话确定器的接收器输入信号的平均功率来检测双方通话状态，以控制更新系数 自适应滤波器。

    Jitter buffering control for controlling storage locations of a jitter buffer, and a method therefor
    34.
    发明申请
    Jitter buffering control for controlling storage locations of a jitter buffer, and a method therefor 有权
    用于控制抖动缓冲器的存储位置的抖动缓冲控制及其方法

    公开(公告)号：US20100246608A1

    公开(公告)日：2010-09-30

    申请号：US12659470

    申请日：2010-03-10

    申请人： Takashi Ishiguro

    发明人： Takashi Ishiguro

    IPC分类号： H04J3/06

    CPC分类号： H04L49/9094

    摘要： A jitter buffer control apparatus has a buffer for storing data included in an input packet transmitted from a telecommunications network, and a jitter buffer controller for controlling the buffer to store the input data into the buffer and take out the stored data from the buffer on the basis of a sequence number included in the input packet in a processing period. When under-running occurs in the buffer, the jitter buffer controller stores input data into the buffer with a storage location skipped which corresponds to the processing period associated with packet loss due to the under-running.

    摘要翻译： 抖动缓冲器控制装置具有用于存储包括在从电信网络发送的输入分组中的数据的缓冲器，以及抖动缓冲器控制器，用于控制缓冲器将输入数据存储到缓冲器中，并从缓冲器中取出存储的数据 在处理周期中包括在输入分组中的序列号的基础。 当在缓冲器中发生欠运行时，抖动缓冲器控制器将输入数据存储到缓冲器中，其中跳过存储位置，该存储位置对应于由于运行不足而与分组丢失相关联的处理周期。

    Redundancy gateway system
    35.
    发明授权
    Redundancy gateway system 有权
    冗余网关系统

    公开(公告)号：US07715374B2

    公开(公告)日：2010-05-11

    申请号：US12000133

    申请日：2007-12-10

    申请人： Yuzuru Masuya ,  Koichi Kihara ,  Koichi Yamazaki ,  Takashi Ishiguro ,  Yasuhiro Tazoi ,  Junji Arai ,  Takeshi Shimomura

    发明人： Yuzuru Masuya ,  Koichi Kihara ,  Koichi Yamazaki ,  Takashi Ishiguro ,  Yasuhiro Tazoi ,  Junji Arai ,  Takeshi Shimomura

    IPC分类号： H04L12/66 ,  H04L12/56

    CPC分类号： H04J3/0632 ,  H04J3/14 ,  H04J2203/006 ,  H04J2203/0087 ,  H04L65/103

    摘要： A redundancy gateway system that can avoid short interruption of data communication caused by system switching in gateway units configured in a multiplex manner for a plurality of systems, and that can maintain the communication state prior to the system switching and avoid degradation of communication quality. A duplicate of a received packet is generated, thereby supplying the packet of the same content to a configuration of gateway units. For each packet, a common write pointer corresponding to identification information appended to the packet is generated. Each gateway unit writes the packet to its own jitter buffer in accordance with the common write pointer corresponding to each supplied packet, sequentially reads out the written packet from the jitter buffer, and generates a TDM signal. One of the gateway units is selectively switched and only the TDM signal generated by the one gateway unit is supplied to a TDM network.

    摘要翻译： 一种冗余网关系统，其能够避免由以多路复用方式为多个系统配置的网关单元中的系统交换引起的数据通信的短暂中断，并且能够在系统切换之前保持通信状态并避免通信质量下降。 产生接收到的分组的副本，从而将相同内容的分组提供给网关单元的配置。 对于每个分组，生成与附加到分组的标识信息相对应的公共写指针。 每个网关单元根据与每个提供的分组相对应的公共写指针将分组写入其自身的抖动缓冲器，从抖动缓冲器顺序读出写入的分组，并产生TDM信号。 选择性地切换网关单元之一，并且只有由一个网关单元生成的TDM信号被提供给TDM网络。

    Echo canceler and echo canceling method
    36.
    发明申请
    Echo canceler and echo canceling method 有权
    回波消除器和回波消除方法

    公开(公告)号：US20080175375A1

    公开(公告)日：2008-07-24

    申请号：US11976257

    申请日：2007-10-23

    申请人： Takashi Ishiguro ,  Koichi Kihara ,  Yuzuru Masuya ,  Junji Arai

    发明人： Takashi Ishiguro ,  Koichi Kihara ,  Yuzuru Masuya ,  Junji Arai

    IPC分类号： H04M9/08

    CPC分类号： H04B3/234

    摘要： An echo canceler has an adaptive filter that generates an echo replica signal from a far-end signal. The filter coefficients of the adaptive filter are updated according to a residual error signal, which is obtained by subtracting the echo replica signal from a near-end signal to cancel echo. A background noise estimator estimates the near-end background noise power level from the residual error signal. A step size calculator uses the estimated near-end background noise power in determining the step size of the adaptive updating of the filter coefficients. When the estimated near-end background noise level is high, a small step size is used, which improves echo cancellation under these conditions. When the estimated near-end background noise level is low, a larger step size is used to permit rapid convergence of the filter coefficients.

    摘要翻译： 回波消除器具有自适应滤波器，其从远端信号产生回波复制信号。 根据剩余误差信号来更新自适应滤波器的滤波器系数，该残差误差信号通过从近端信号中减去回波复制信号而获得，以消除回波。 背景噪声估计器从剩余误差信号估计近端背景噪声功率电平。 步长计算器使用估计的近端背景噪声功率来确定滤波器系数的自适应更新的步长。 当估计的近端背景噪声水平高时，使用小的步长，这在这些条件下改善回声消除。 当估计的近端背景噪声电平低时，使用较大的步长来允许滤波器系数的快速收敛。

    Method of nucleic acid analysis, nucleic acid analysis device and disk for nucleic acid analysis
    37.
    发明申请
    Method of nucleic acid analysis, nucleic acid analysis device and disk for nucleic acid analysis 审中-公开
    核酸分析方法，核酸分析装置和核酸分析盘

    公开(公告)号：US20050266448A1

    公开(公告)日：2005-12-01

    申请号：US11101124

    申请日：2005-04-06

    申请人： Naoto Hagiwara ,  Takashi Ishiguro

    发明人： Naoto Hagiwara ,  Takashi Ishiguro

    IPC分类号： G01N21/78 ,  B01L3/00 ,  B01L7/00 ,  C12M1/00 ,  C12N15/09 ,  C12Q1/68 ,  G01N21/25 ,  C12M1/34

    CPC分类号： G01N21/253 ,  B01L3/5027 ,  B01L3/50273 ,  B01L3/502738 ,  B01L7/525 ,  B01L2300/024 ,  B01L2300/0806 ,  B01L2300/0861 ,  B01L2300/1822 ,  B01L2300/1827 ,  B01L2300/1861 ,  B01L2400/0409

    摘要： There is provided a method or structure of carrying out optical measurement for the change of the state of the reactive sample solution at two or more measurement points of the channel simultaneously and continuously in a flow system reaction in which the reactive proceeds according to the elapsed time for movement. A sample containing nucleic acids is made to flow to a channel of which a temperature control means controlling the temperature of the passing area so that the temperature changes in the repetitive pattern, and the change in the state of the sample containing nucleic acids flowing on the channel is detected by optical detection means at two or more places of the channel. The channel can be placed in the analysis area on the disk driven by rotation, and information of the reactive sample solution in the channel can be detected simultaneously and continuously by optical detection means which is installed facing the disk for nucleic acid analysis. The constitution of the structure allows providing compact device for nucleic acid analysis is provided with a flow system reaction tube of the sample containing nucleic acids and an optical detection means.

    摘要翻译： 提供了在流动系统反应中同时且连续地在通道的两个或更多个测量点处改变反应性样品溶液状态的方法或结构，其中反应性根据经过时间进行 为运动。 使含有核酸的样品流向其中控制通过区域的温度的温度控制装置的通道，使得温度在重复模式中变化，并且含有核酸的样品的状态变化 通道在通道的两个或多个位置处由光学检测装置检测。 通道可以放置在通过旋转驱动的盘上的分析区域中，通过光盘检测装置可同时连续地检测信道中的反应样品溶液的信息，该检测装置面向盘安装用于核酸分析。 提供结构允许提供用于核酸分析的紧凑装置的构造具有含有核酸的样品的流系统反应管和光学检测装置。

    Method of producing a printed circuit board and mask for carrying out the same
    38.
    发明授权
    Method of producing a printed circuit board and mask for carrying out the same 有权
    制造印刷电路板的方法和用于进行印刷电路板的掩模

    公开(公告)号：US06497991B1

    公开(公告)日：2002-12-24

    申请号：US09606691

    申请日：2000-06-30

    申请人： Takashi Ishiguro

    发明人： Takashi Ishiguro

    IPC分类号： G03F700

    CPC分类号： H05K3/0094 ,  H05K1/115 ,  H05K3/1225 ,  H05K2201/0959 ,  H05K2203/025

    摘要： Provided is a method of producing a printed circuit board. The method comprises preparing a base having a plurality of through via conductors having through holes, filling the through holes of the through via conductors with resin paste by printing in such a manner that, of the through holes, those which are arranged at smaller intervals are filled with a smaller amount of resin paste than those which are arranged at larger intervals, curing the resin paste, and removing an unnecessary portion of resin resulting from the curing of the resin paste. A mask used for carrying out the filling by printing is also provided.

    摘要翻译： 提供一种印刷电路板的制造方法。 该方法包括制备具有多个通孔的基底，该通孔导体具有通孔，通过印刷方式填充通孔导体的通孔，使得通孔，以较小间隔布置的通孔为 填充较少量的树脂浆料比以较大间隔排列的树脂浆料固化，固化树脂浆料，以及除去由树脂浆料固化产生的不必要部分的树脂。 还提供了用于通过印刷进行填充的掩模。