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公开(公告)号：US20140030846A1
公开(公告)日：2014-01-30
申请号：US14043925
申请日：2013-10-02
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Kengo AKIMOTO , Toshinari SASAKI , Hideaki KUWABARA
IPC: H01L29/66
CPC classification number: H01L29/66969 , H01L21/02554 , H01L21/02565 , H01L21/02631 , H01L27/1225 , H01L29/45 , H01L29/66742 , H01L29/786 , H01L29/78606 , H01L29/7869 , H01L29/78696
Abstract: An object is, in a thin film transistor in which an oxide semiconductor is used as an active layer, to prevent change in composition, film quality, an interface, or the like of an oxide semiconductor region serving as an active layer, and to stabilize electrical characteristics of the thin film transistor. In a thin film transistor in which a first oxide semiconductor region is used as an active layer, a second oxide semiconductor region having lower electrical conductivity than the first oxide semiconductor region is formed between the first oxide semiconductor region and a protective insulating layer for the thin film transistor, whereby the second oxide semiconductor region serves as a protective layer for the first oxide semiconductor region; thus, change in composition or deterioration in film quality of the first oxide semiconductor region can be prevented, and electrical characteristics of the thin film transistor can be stabilized.
Abstract translation: 在使用氧化物半导体作为有源层的薄膜晶体管中，为了防止用作有源层的氧化物半导体区域的组成，膜质量，界面等的变化，并且为了稳定化 薄膜晶体管的电气特性。 在其中使用第一氧化物半导体区域作为有源层的薄膜晶体管中，在第一氧化物半导体区域和用于薄的第一氧化物半导体区域的保护绝缘层之间形成具有比第一氧化物半导体区域低导电性的第二氧化物半导体区域 由此第二氧化物半导体区域用作第一氧化物半导体区域的保护层; 因此，可以防止第一氧化物半导体区域的组成变化或膜质量的劣化，并且能够稳定薄膜晶体管的电特性。
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公开(公告)号：US20130265518A1
公开(公告)日：2013-10-10
申请号：US13909398
申请日：2013-06-04
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Shunpei YAMAZAKI , Yukie SUZUKI , Hideaki KUWABARA , Hajime KIMURA
IPC: G02F1/1368
CPC classification number: G02F1/1368 , G02F1/133345 , G02F1/1339 , G02F1/134309 , G02F1/136286 , H01L27/1214 , H01L27/1222 , H01L27/1288 , H01L29/04 , H01L29/458 , H01L29/4908 , H01L29/66765 , H01L29/78678 , H01L29/78696
Abstract: A method of manufacturing, with high mass productivity, liquid crystal display devices having highly reliable thin film transistors with excellent electric characteristics is provided. In a liquid crystal display device having an inverted staggered thin film transistor, the inverted staggered thin film transistor is formed as follows: a gate insulating film is formed over a gate electrode; a microcrystalline semiconductor film which functions as a channel formation region is formed over the gate insulating film; a buffer layer is formed over the microcrystalline semiconductor film; a pair of source and drain regions are formed over the buffer layer; and a pair of source and drain electrodes are formed in contact with the source and drain regions so as to expose a part of the source and drain regions.
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公开(公告)号：US20240345625A1
公开(公告)日：2024-10-17
申请号：US18624215
申请日：2024-04-02
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor： Hideaki KUWABARA , Masaaki HIROKI
CPC classification number: G06F1/163 , G04B19/00 , G06F1/1652
Abstract: A novel electronic device is provided. Alternatively an electronic device of a novel embodiment is provided. An electronic device includes a support and a display portion. The support has a first curved surface. The display portion is provided over the support. The display portion has a top surface and a side surface in contact with at least one side of the top surface. The side surface has a second curved surface. The top surface includes a first display region. The side surface includes a second display region. The first display region and the second display region are continuously provided.
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公开(公告)号：US20240188404A1
公开(公告)日：2024-06-06
申请号：US18285529
申请日：2022-03-29
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Shunpei Yamazaki , Kenichi OKAZAKI , Koji KUSUNOKI , Hideaki KUWABARA , Yoshiaki OIKAWA
IPC: H10K59/95 , H10K102/00
CPC classification number: H10K59/95 , H10K2102/311
Abstract: A display apparatus with a novel structure is provided. The display apparatus includes a display surface, a flexible non-rectangular substrate over which part of the display surface is formed, and a light-emitting device formed over the flexible substrate. The light-emitting device includes pixel regions formed in a matrix. The display surface has a convex or concave region when part of the flexible non-rectangular substrate is bent. A novel light-emitting apparatus, a novel display apparatus, a novel input/output apparatus, or a novel semiconductor apparatus can be achieved. The display apparatus enables the degree of design flexibility of a display apparatus to be increased and design of the display apparatus to be improved.
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公开(公告)号：US20200264671A1
公开(公告)日：2020-08-20
申请号：US16864287
申请日：2020-05-01
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor： Yusuke YOSHITANI , Hideaki KUWABARA , Natsuko TAKASE
Abstract: A highly convenient electronic device used while being worn on a body is provided. The electronic device is an arm-worn electronic device including a display panel, a power storage device, a circuit, and a sealing structure. The display panel displays an image with power supplied from the power storage device. The circuit includes an antenna and charges the power storage device wirelessly. Inside the sealing structure, the display panel, the power storage device, and the circuit are provided. The sealing structure includes a portion that transmits visible light. The sealing structure can be worn on an arm or is connected to a structure body that can be worn on an arm.
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Patent Agency Ranking
公开(公告)号：US20190165334A1
公开(公告)日：2019-05-30
申请号：US16264996
申请日：2019-02-01
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Hideaki KUWABARA , Hideto OHNUMA
Abstract: As a result of miniaturization of a pixel region associated with an improvement in definition and an increase in a substrate size associated with an increase in area, defects due to precision, bending, and the like of a mask used at the time of evaporation have become issues. A partition including portions with different thicknesses over a pixel electrode (also referred to as a first electrode) in a display region and in the vicinity of a pixel electrode layer is formed, without increasing the number of steps, by using a photomask or a reticle provided with an auxiliary pattern having a light intensity reduction function made of a diffraction grating pattern or a semi-transmissive film.
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公开(公告)号：US20190019895A1
公开(公告)日：2019-01-17
申请号：US16121708
申请日：2018-09-05
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Shunpei YAMAZAKI , Miyuki HOSOBA , Junichiro SAKATA , Hideaki KUWABARA
IPC: H01L29/786 , G02F1/1362 , H01L27/12 , H01L29/45 , H01L29/51 , H01L29/66 , G02F1/1343 , G02F1/1368 , G02F1/167 , G02F1/136 , H01L27/32 , G02F1/1339 , G09G3/34 , G09G3/36 , G02F1/1345
Abstract: An object is to provide a semiconductor device having a structure in which parasitic capacitance between wirings can be efficiently reduced. In a bottom gate thin film transistor using an oxide semiconductor layer, an oxide insulating layer used as a channel protection layer is formed above and in contact with part of the oxide semiconductor layer overlapping with a gate electrode layer, and at the same time an oxide insulating layer covering a peripheral portion (including a side surface) of the stacked oxide semiconductor layer is formed. Further, a source electrode layer and a drain electrode layer are formed in a manner such that they do not overlap with the channel protection layer. Thus, a structure in which an insulating layer over the source electrode layer and the drain electrode layer is in contact with the oxide semiconductor layer is provided.
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公开(公告)号：US20170278878A1
公开(公告)日：2017-09-28
申请号：US15463487
申请日：2017-03-20
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Hideaki KUWABARA , Hiroki ADACHI , Satoru IDOJIRI
IPC: H01L27/12 , H01L21/683 , H01L21/67
Abstract: A technique is described in which a transistor formed using an oxide semiconductor film, a transistor formed using a polysilicon film, a transistor formed using an amorphous silicon film or the like, a transistor formed using an organic semiconductor film, a light-emitting element, or a passive element is separated from a glass substrate by light or heat. An oxide layer is formed over a light-transmitting substrate, a metal layer is selectively formed over the oxide layer, a resin layer is formed over the metal layer, an element layer is formed over the resin layer, a flexible film is fixed to the element layer, the resin layer and the metal layer are irradiated with light through the light-transmitting substrate, the light-transmitting substrate is separated, and a bottom surface of the metal layer is made bare.
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公开(公告)号：US20170263777A1
公开(公告)日：2017-09-14
申请号：US15609513
申请日：2017-05-31
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Shunpei YAMAZAKI , Jun KOYAMA , Hiroyuki MIYAKE , Kei TAKAHASHI , Kouhei TOYOTAKA , Masashi TSUBUKU , Kosei NODA , Hideaki KUWABARA
IPC: H01L29/786 , H01L23/552 , H01L23/66 , H01L49/02 , H01L27/02 , H01L27/108 , H01L27/12 , H01L21/84 , H01L25/16
CPC classification number: H01L29/7869 , H01L21/84 , H01L23/552 , H01L23/60 , H01L23/66 , H01L25/16 , H01L27/0222 , H01L27/10873 , H01L27/12 , H01L27/1225 , H01L28/20 , H01L28/60 , H01L29/78609 , H01L2223/6677 , H01L2924/0002 , H01L2924/00
Abstract: An object is to reduce leakage current and parasitic capacitance of a transistor used for an LSI, a CPU, or a memory. A semiconductor integrated circuit included in an LSI, a CPU, or a memory is manufactured using the transistor which is formed using an oxide semiconductor which is an intrinsic or substantially intrinsic semiconductor obtained by removal of impurities which serve as electron donors (donors) from the oxide semiconductor and has larger energy gap than a silicon semiconductor, and is formed over a semiconductor substrate. With the transistor which is formed over the semiconductor substrate and includes the highly purified oxide semiconductor layer with sufficiently reduced hydrogen concentration, a semiconductor device whose power consumption due to leakage current is low can be realized.
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40.发明申请公开(公告)号：US20170092230A1
公开(公告)日：2017-03-30
申请号：US15272533
申请日：2016-09-22
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Hideaki KUWABARA
Abstract: A power saving system using a plurality of flexible display devices placed on various places is provided. A structure of a bendable portion in a display device is improved. Specifically, a wiring partly including a metal nanoparticle is used. Openings are formed in an insulating layer so that the wiring becomes substantially longer by meandering in cross section. When a plurality of openings are formed and aligned, a portion that is easy to bend is formed along the line where they are aligned. A plurality of display panels are used for one display portion. The flexible display portion can be provided on a surface, specifically, a curved surface of furniture such as a chair or a sofa.
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