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    STORAGE DEVICE, ELECTRONIC COMPONENT, AND ELECTRONIC DEVICE
    31.
    发明申请
    STORAGE DEVICE, ELECTRONIC COMPONENT, AND ELECTRONIC DEVICE 审中-公开

    公开(公告)号：US20200279595A1

    公开(公告)日：2020-09-03

    申请号：US16647566

    申请日：2018-10-02

    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

    Inventor： Yoshiaki OIKAWA ,  Atsushi MIYAGUCHI ,  Hideki UOCHI

    IPC: G11C11/16 ,  H01L27/22 ,  H01L29/786 ,  H01L43/02 ,  G11C11/419

    Abstract: A novel storage device is provided. The storage device includes a first wiring, a second wiring, and a first memory cell. The first memory cell includes a first transistor and a first magnetic tunnel junction device. One of a source or a drain of the first transistor is electrically connected to a first wiring. The other of the source or the drain of the first transistor is electrically connected to one terminal of the first magnetic tunnel junction device. Another terminal of the first magnetic tunnel junction device is electrically connected to the second wiring. The first transistor includes an oxide semiconductor in its channel formation region.

    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
    32.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 审中-公开

    公开(公告)号：US20190027640A1

    公开(公告)日：2019-01-24

    申请号：US16141187

    申请日：2018-09-25

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Shunpei YAMAZAKI ,  Kengo AKIMOTO ,  Shigeki KOMORI ,  Hideki UOCHI

    IPC: H01L33/00 ,  H01L29/66 ,  H01L27/12 ,  H01L29/786

    Abstract: An object is to provide a semiconductor device including a thin film transistor with excellent electrical characteristics and high reliability and a method for manufacturing the semiconductor device with high mass productivity. A main point is to form a low-resistance oxide semiconductor layer as a source or drain region after forming a drain or source electrode layer over a gate insulating layer and to form an oxide semiconductor film thereover as a semiconductor layer. It is preferable that an oxygen-excess oxide semiconductor layer be used as a semiconductor layer and an oxygen-deficient oxide semiconductor layer be used as a source region and a drain region.

    SEMICONDUCTOR DEVICE AND METHOD FOR DRIVING THE SAME
    34.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD FOR DRIVING THE SAME 审中-公开

    公开(公告)号：US20170194050A1

    公开(公告)日：2017-07-06

    申请号：US15462956

    申请日：2017-03-20

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Hideki UOCHI ,  Koichiro KAMATA

    IPC: G11C13/00 ,  H01L27/115 ,  H01L29/24

    Abstract: Disclosed is a semiconductor device having a memory cell which comprises a transistor having a control gate and a storage gate. The storage gate comprises an oxide semiconductor and is able to be a conductor and an insulator depending on the potential of the storage gate and the potential of the control gate. Data is written by setting the potential of the control gate to allow the storage gate to be a conductor, supplying a potential of data to be stored to the storage gate, and setting the potential of the control gate to allow the storage gate to be an insulator. Data is read by supplying a potential for reading to a read signal line connected to one of a source and a drain of the transistor and detecting the change in potential of a bit line connected to the other of the source and the drain.

    DISPLAY DEVICE
    37.
    发明申请
    DISPLAY DEVICE 有权

    公开(公告)号：US20130175525A1

    公开(公告)日：2013-07-11

    申请号：US13780138

    申请日：2013-02-28

    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., Ltd.

    Inventor： Shunpei YAMAZAKI ,  Kengo AKIMOTO ,  Shigeki KOMORI ,  Hideki UOCHI ,  Tomoya FUTAMURA ,  Takahiro KASAHARA

    IPC: H01L33/00

    CPC classification number: G02F1/136204 ,  H01L27/0248 ,  H01L27/1225 ,  H01L27/124 ,  H01L33/0041 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: In order to take advantage of the properties of a display device including an oxide semiconductor, a protective circuit and the like having appropriate structures and a small occupied area are necessary. The protective circuit is formed using a non-linear element which includes a gate insulating film covering a gate electrode; a first oxide semiconductor layer over the gate insulating film; a channel protective layer covering a region which overlaps with a channel formation region of the first oxide semiconductor layer; and a first wiring layer and a second wiring layer each of which is formed by stacking a conductive layer and a second oxide semiconductor layer and over the first oxide semiconductor layer. The gate electrode is connected to a scan line or a signal line, the first wiring layer or the second wiring layer is directly connected to the gate electrode.

    MEMORY DEVICE, OPERATION METHOD OF THE MEMORY DEVICE, AND PROGRAM
    38.
    发明申请
    MEMORY DEVICE, OPERATION METHOD OF THE MEMORY DEVICE, AND PROGRAM 有权

    公开(公告)号：US20250147841A1

    公开(公告)日：2025-05-08

    申请号：US18835451

    申请日：2023-02-08

    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

    Inventor： Kazuma FURUTANI ,  Yoshiyuki KUROKAWA ,  Kazuaki OHSHIMA ,  Hideki UOCHI

    IPC: G06F11/10

    Abstract: A highly reliable memory device is provided. Of an information bit and a check bit forming a hamming code, the information bit having a larger bit length than the check bit is stored in a first memory portion, and the check bit is stored in the second memory portion. The hamming code is divided and stored in a plurality of memory portions, whereby occurrence of a soft error is suppressed. The first memory portion that needs a large memory capacity is formed using a Si transistor, and the second memory portion is formed using an OS transistor. A combination of memory scribing and bit interleaving achieves a highly reliable memory device.

    MEMORY DEVICE
    39.
    发明申请
    MEMORY DEVICE 有权

    公开(公告)号：US20250072009A1

    公开(公告)日：2025-02-27

    申请号：US18947085

    申请日：2024-11-14

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Shunpei YAMAZAKI ,  Hajime KIMURA ,  Takanori MATSUZAKI ,  Tatsuya ONUKI ,  Yuki OKAMOTO ,  Hideki UOCHI ,  Satoru OKAMOTO ,  Hiromichi GODO ,  Kazuki TSUDA ,  Hitoshi KUNITAKE

    IPC: H10B63/00

    Abstract: A highly reliable memory device is provided. On a side surface of a first conductor extending in a first direction, a first insulator, a first semiconductor, a second insulator, a second semiconductor, and a third insulator are provided in this order when seen from the first conductor side. A first region overlapping with a second conductor with the first insulator, the first semiconductor, the second insulator, the second semiconductor, and the third insulator therebetween, and a second region overlapping with a third conductor with the first insulator, the first semiconductor, the second insulator, the second semiconductor, and the third insulator therebetween are provided in the first conductor. In the second region, a fourth conductor is provided between the first insulator and the first semiconductor.

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