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    Integrated circuit including integrated standard cell structure
    32.
    发明授权
    Integrated circuit including integrated standard cell structure 有权

    公开(公告)号：US11329039B2

    公开(公告)日：2022-05-10

    申请号：US16842053

    申请日：2020-04-07

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Sanghoon Baek ,  Myung Gil Kang ,  Jae-Ho Park ,  Seung Young Lee

    IPC: H01L27/02 ,  H01L27/092 ,  H01L29/06 ,  H01L29/423 ,  H01L29/786 ,  H01L27/118

    Abstract: An integrated circuit includes first and second active regions, first and second standard cells on the first active region and the second active region, and a filler cell between the first and second standard cells and including first and second insulating isolations. The filler cell has a one-pitch dimension. The first and second insulating isolations are spaced the one-pitch dimension apart from each other. The first insulating isolation of the filler cell is disposed at a first boundary between the first standard cell and the filler cell. The second insulating isolation of the filler cell is disposed at a second boundary between the second standard cell and the filler cell. The first and second insulating isolations separate at least a part of the first active region, and at least a part of the second active region.

    SEMICONDUCTOR DEVICES
    36.
    发明申请
    SEMICONDUCTOR DEVICES 有权

    公开(公告)号：US20250087586A1

    公开(公告)日：2025-03-13

    申请号：US18960252

    申请日：2024-11-26

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jungho Do ,  Sanghoon Baek

    IPC: H01L23/528 ,  H01L21/8238 ,  H01L27/02 ,  H01L27/092 ,  H01L29/06 ,  H01L29/423 ,  H01L29/78 ,  H01L29/786

    Abstract: Disclosed is a semiconductor device comprising a mixed height cell on a substrate, and a first power line and a second power line that run across the mixed height cell. First to third line tracks are defined between the first power line and the second power line. A fourth line track is defined adjacent to the second power line. The second power line is between the third line track and the fourth line track. The mixed height cell includes a plurality of lower lines aligned with the first to fourth line tracks. A cell height of the mixed height cell is about 1.25 times to about 1.5 times a distance between a first point of the first power line and a corresponding second point of the second power line.

    Semiconductor device
    37.
    发明授权
    Semiconductor device 有权

    公开(公告)号：US12131999B2

    公开(公告)日：2024-10-29

    申请号：US18512527

    申请日：2023-11-17

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jungho Do ,  Sanghoon Baek

    IPC: H01L23/528 ,  H01L27/02 ,  H01L27/092 ,  H01L29/423 ,  H01L29/786

    CPC classification number: H01L23/5286 ,  H01L27/0207 ,  H01L27/092 ,  H01L29/42392 ,  H01L29/78696

    Abstract: A semiconductor device includes a substrate having an active region, a first group of standard cells arranged in a first row on the active region of the substrate and having a first height defined in a column direction, a second group of standard cells arranged in a second row on the active region of the substrate, and having a second height, and a plurality of power lines extending in a row direction and respectively extending along boundaries of the first and the second groups of standard cells. The first and second groups of standard cells each further include a plurality of wiring lines extending in the row direction and arranged in the column direction, and at least some of wiring lines in at least one standard cell of the first and second groups of standard cells are arranged at different spacings and/or pitches.

    Integrated circuit including asymmetric power line and method of designing the same
    40.
    发明授权
    Integrated circuit including asymmetric power line and method of designing the same 有权

    公开(公告)号：US11755809B2

    公开(公告)日：2023-09-12

    申请号：US17458948

    申请日：2021-08-27

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Jisu Yu ,  Jaewoo Seo ,  Hyeongyu You ,  Sanghoon Baek ,  Jonghoon Jung

    IPC: G06F30/00 ,  G06F30/392 ,  H01L23/50 ,  H01L27/02

    CPC classification number: G06F30/392 ,  H01L23/50 ,  H01L27/0207

    Abstract: An integrated circuit is provided. The integrated circuit includes a first cell that has a first height and is arranged in a first row which extends in a first direction; a second cell that has a second height and is arranged in a second row which extends in the first direction and is adjacent to the first row, wherein the second cell is adjacent to the first cell in a second direction perpendicular to the first direction; and a power line that extends in the first direction, is arranged on a boundary between the first cell and the second cell, and is configured to supply power to the first cell and the second cell. The first cell overlaps a first width of the power line along the second direction and the second cell overlaps a second width of the power line along the second direction, and the first width and the second width are different from each other.

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