公开(公告)号：US11984507B2

公开(公告)日：2024-05-14

申请号：US17206229

申请日：2021-03-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dongwoo Kim ,  Jinbum Kim ,  Gyeom Kim ,  Dohee Kim ,  Seunghun Lee

IPC: H01L29/78 ,  H01L21/02 ,  H01L29/06 ,  H01L29/161 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66 ,  H01L29/786

CPC classification number: H01L29/78618 ,  H01L21/02532 ,  H01L21/02603 ,  H01L29/0673 ,  H01L29/161 ,  H01L29/41733 ,  H01L29/42392 ,  H01L29/66545 ,  H01L29/66636 ,  H01L29/66742 ,  H01L29/78696

Abstract: A semiconductor device including an active region extending in a first direction on a substrate; channel layers vertically spaced apart on the active region; a gate structure extending in a second direction and intersecting the active region, the gate structure surrounding the channel layers; a source/drain region on the active region in contact with the channel layers; and a contact plug connected to the source/drain region, wherein the source/drain region includes a first epitaxial layer on side surfaces of the channel layers and including a first impurity; a second epitaxial layer on the first epitaxial layer and including the first impurity and a second impurity; and a third epitaxial layer on the second epitaxial layer and including the first impurity, and in a horizontal sectional view, the second epitaxial layer includes a peripheral portion having a thickness in the first direction that increases along the second direction.

公开(公告)号：US11973082B2

公开(公告)日：2024-04-30

申请号：US17410325

申请日：2021-08-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seokhyeon Yoon ,  Junyoung Park ,  Woocheol Shin ,  Seunghun Lee

IPC: H01L27/12 ,  H01L29/06 ,  H01L29/08 ,  H01L29/786

CPC classification number: H01L27/1203 ,  H01L27/1222 ,  H01L29/0653 ,  H01L29/0665 ,  H01L29/0847 ,  H01L29/78696

Abstract: An integrated circuit device includes: a semiconductor on insulator (SOI) substrate layer including a base substrate layer, an insulating substrate layer, and a cover substrate layer; a semiconductor substrate layer; a plurality of first fin-type active areas and a plurality of second fin-type active areas each defined by a plurality of trenches, and extending in a first horizontal direction, in above the SOI substrate layer and the semiconductor substrate layer, respectively; a plurality of nanosheet stacked structures comprising nanosheets extending in parallel with each other and spaced apart from upper surfaces of the plurality of first fin-type active areas and the plurality of second fin-type active areas; a plurality of first source/drain regions extending into the SOI substrate layer; and a plurality of second source/drain regions extending into the semiconductor substrate layer. Lower surfaces of the first and second source/drain regions may not be coplanar with each other.

公开(公告)号：US11664453B2

公开(公告)日：2023-05-30

申请号：US17192301

申请日：2021-03-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaemun Kim ,  Dahye Kim ,  Jinbum Kim ,  Gyeom Kim ,  Dohee Kim ,  Dongwoo Kim ,  Seunghun Lee

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/417 ,  H01L21/8234 ,  H01L29/04

CPC classification number: H01L29/785 ,  H01L21/823431 ,  H01L29/41791 ,  H01L29/6681 ,  H01L29/66818 ,  H01L29/045

Abstract: A semiconductor device includes a substrate including a fin-type active region, the fin-type active region extending in a first direction; a plurality of channel layers on the fin-type active region, the plurality of channel layers including an uppermost channel layer, a lowermost channel layer, and an intermediate channel layer isolated from direct contact with each other in a direction perpendicular to an upper surface of the substrate; a gate electrode surrounding the plurality of channel layers and extending in a second direction intersecting the first direction; a gate insulating film between the plurality of channel layers and the gate electrode; and source/drain regions electrically connected to the plurality of channel layers. In a cross section taken in the second direction, the uppermost channel layer has a width greater than a width of the intermediate channel layer.

公开(公告)号：US11626401B2

公开(公告)日：2023-04-11

申请号：US16991530

申请日：2020-08-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaemun Kim ,  Gyeom Kim ,  Dahye Kim ,  Jinbum Kim ,  Kyungin Choi ,  Ilgyou Shin ,  Seunghun Lee

IPC: H01L27/088 ,  H01L21/8234 ,  H01L21/02

Abstract: An integrated circuit device includes: a fin-type active area protruding from a substrate, extending in a first direction parallel to an upper surface of the substrate, and including a first semiconductor material; an isolation layer arranged on the substrate and covering a lower portion of a sidewall of the fin-type active area, the isolation layer including an insulation liner conformally arranged on the lower portion of the sidewall of the fin-type active area, and an insulation filling layer on the insulation liner; a capping layer surrounding an upper surface and the sidewall of the fin-type active area, including a second semiconductor material different from the first semiconductor material, and with the capping layer having an upper surface, a sidewall, and a facet surface between the upper surface and the sidewall; and a gate structure arranged on the capping layer and extending in a second direction perpendicular to the first direction.

公开(公告)号：US20220336214A1

公开(公告)日：2022-10-20

申请号：US17853990

申请日：2022-06-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： GYEOM KIM ,  Dongwoo Kim ,  Jihye Yi ,  JINBUM KIM ,  Sangmoon Lee ,  Seunghun Lee

IPC: H01L21/02 ,  H01L21/285 ,  H01L21/768 ,  H01L21/8234 ,  H01L29/66 ,  H01L29/08 ,  H01L29/165 ,  H01L29/417 ,  H01L23/485 ,  H01L29/78 ,  H01L29/786 ,  H01L29/423 ,  H01L29/06 ,  H01L29/775

Abstract: A semiconductor device is provided. The semiconductor device includes: an active region on a semiconductor substrate; a channel region on the active region; a source/drain region adjacent to the channel region on the active region; a gate structure overlapping the channel region, on the channel region; a contact structure on the source/drain region; a gate spacer between the contact structure and the gate structure; and a contact spacer surrounding a side surface of the contact structure. The source/drain region includes a first epitaxial region having a recessed surface and a second epitaxial region on the recessed surface of the first epitaxial region, and the second epitaxial region includes an extended portion, extended from a portion overlapping the contact structure in a vertical direction, in a horizontal direction and overlapping the contact spacer in the vertical direction.

公开(公告)号：US20220102498A1

公开(公告)日：2022-03-31

申请号：US17546690

申请日：2021-12-09

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seokhoon KIM ,  Dongmyoung Kim ,  Kanghun Moon ,  Hyunkwan Yu ,  Sanggil Lee ,  Seunghun Lee ,  Sihyung Lee ,  Choeun Lee ,  Edward Namkyu Cho ,  Yang Xu

IPC: H01L29/08 ,  H01L29/78 ,  H01L27/088 ,  H01L29/06

Abstract: A semiconductor device includes a substrate, a fin structure on the substrate, a gate structure on the fin structure, a gate spacer on at least on side surface of the gate structure, and a source/drain structure on the fin structure, wherein a topmost portion of a bottom surface of the gate spacer is lower than a topmost portion of a top surface of the fin structure, and a topmost portion of a top surface of the source/drain structure is lower than the topmost portion of the top surface of the fin structure.

公开(公告)号：US20210028281A1

公开(公告)日：2021-01-28

申请号：US16806629

申请日：2020-03-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seokhoon Kim ,  Dongmyoung Kim ,  Kanghun Moon ,  Hyunkwan Yu ,  Sanggil Lee ,  Seunghun Lee ,  Sihyung Lee ,  Choeun Lee ,  Edward Namkyu Cho ,  Yang Xu

IPC: H01L29/08 ,  H01L29/78 ,  H01L27/088 ,  H01L29/06 ,  H01L21/8234

Abstract: A semiconductor device includes a substrate, a fin structure on the substrate, a gate structure on the fin structure, a gate spacer on at least on side surface of the gate structure, and a source/drain structure on the fin structure, wherein a topmost portion of a bottom surface of the gate spacer is lower than a topmost portion of a top surface of the fin structure, and a topmost portion of a top surface of the source/drain structure is lower than the topmost portion of the top surface of the fin structure.

公开(公告)号：US20250154703A1

公开(公告)日：2025-05-15

申请号：US19025599

申请日：2025-01-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dahye LEE ,  Kyoungwoong Noh ,  Changju Oh ,  Seunghun Lee

IPC: D06F33/46 ,  D06F33/47 ,  D06F34/08 ,  D06F34/10 ,  D06F103/46 ,  D06F105/58 ,  D06F105/62 ,  H02K11/33

Abstract: Provided is a washing machine and a method of controlling the washing machine. The washing machine includes: a washing tub; a motor to supply rotational power to the washing tub; an intelligent power module (IPM) to supply power to the motor; a sensor to detect a current output from the IPM; a relay configured to output AC power to the washing machine; a rectifier configured to rectify the AC power output from the relay into DC power and to output the DC power to the IPM; memory storing instructions; and a processor configured to execute the instructions to: based on the washing machine being in a standby state, obtain the current value detected by the sensor, and based on the current value being greater than or equal to a preset current value, control the relay to perform an off-operation to cut off the DC power supplied to the IPM.

公开(公告)号：US12249505B2

公开(公告)日：2025-03-11

申请号：US18513297

申请日：2023-11-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Gyeom Kim ,  Dongwoo Kim ,  Jihye Yi ,  Jinbum Kim ,  Sangmoon Lee ,  Seunghun Lee

IPC: H01L21/02 ,  B82Y10/00 ,  H01L21/28 ,  H01L21/285 ,  H01L21/768 ,  H01L21/8234 ,  H01L23/485 ,  H01L23/532 ,  H01L29/06 ,  H01L29/08 ,  H01L29/10 ,  H01L29/161 ,  H01L29/165 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/78 ,  H01L29/786

Abstract: A semiconductor device is provided. The semiconductor device includes: an active region on a semiconductor substrate; a channel region on the active region; a source/drain region adjacent to the channel region on the active region; a gate structure overlapping the channel region, on the channel region; a contact structure on the source/drain region; a gate spacer between the contact structure and the gate structure; and a contact spacer surrounding a side surface of the contact structure. The source/drain region includes a first epitaxial region having a recessed surface and a second epitaxial region on the recessed surface of the first epitaxial region, and the second epitaxial region includes an extended portion, extended from a portion overlapping the contact structure in a vertical direction, in a horizontal direction and overlapping the contact spacer in the vertical direction.

公开(公告)号：US12237383B2

公开(公告)日：2025-02-25

申请号：US17404078

申请日：2021-08-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dohee Kim ,  Gyeom Kim ,  Jinbum Kim ,  Jaemun Kim ,  Seunghun Lee

IPC: H01L29/417 ,  H01L27/088 ,  H01L29/78

Abstract: An integrated circuit (IC) device includes a fin-type active region extending in a first lateral direction on a substrate, a gate line extending in a second lateral direction on the fin-type active region, an insulating spacer covering a sidewall of the gate line, a source/drain region at a position adjacent to the gate line, a metal silicide film covering a top surface of the source/drain region, and a source/drain contact apart from the gate line with the insulating spacer therebetween in the first lateral direction. The source/drain contact includes a bottom contact segment being in contact with a top surface of the metal silicide film and an upper contact segment integrally connected to the bottom contact segment. A width of the bottom contact segment is greater than a width of at least a portion of the upper contact segment in the first lateral direction.