公开(公告)号：US07479681B2

公开(公告)日：2009-01-20

申请号：US11783779

申请日：2007-04-12

申请人： Fumitaka Nakayama ,  Masatoshi Morikawa ,  Yutaka Hoshino ,  Tetsuo Uchiyama

发明人： Fumitaka Nakayama ,  Masatoshi Morikawa ,  Yutaka Hoshino ,  Tetsuo Uchiyama

IPC分类号： H01L23/62

CPC分类号： H01L21/823814 ,  H01L21/26586 ,  H01L23/3677 ,  H01L23/5223 ,  H01L23/5227 ,  H01L27/0617 ,  H01L27/0629 ,  H01L27/0805 ,  H01L27/0922 ,  H01L28/20 ,  H01L28/40 ,  H01L29/0638 ,  H01L29/0696 ,  H01L29/1045 ,  H01L29/1083 ,  H01L29/4238 ,  H01L29/456 ,  H01L29/4975 ,  H01L29/66659 ,  H01L2224/48227 ,  H01L2224/49113 ,  H01L2224/49171 ,  H01L2924/13091 ,  H01L2924/30107 ,  H03F3/193 ,  H01L2924/00

摘要： A semiconductor device including a MISFET formed in a well at a main surface of a substrate, a second MISFET formed at a main surface of the substrate, and a passive element formed over the main surface of the substrate and having two terminals. A conductive film is formed at a rear face of the semiconductor substrate. The conductive film is connected with a fixed potential and also electrically connected with the conductive film.

摘要翻译： 一种半导体器件，包括形成在基板的主表面的阱中的MISFET，形成在基板的主表面处的第二MISFET以及形成在基板的主表面上并具有两个端子的无源元件。 导电膜形成在半导体衬底的背面。 导电膜与固定电位连接，并与导电膜电连接。

公开(公告)号：US07176523B2

公开(公告)日：2007-02-13

申请号：US10921327

申请日：2004-08-19

申请人： Yutaka Hoshino ,  Shuji Ikeda ,  Isao Yoshida ,  Shiro Kamohara ,  Megumi Kawakami ,  Tomoyuki Miyake ,  Masatoshi Morikawa

发明人： Yutaka Hoshino ,  Shuji Ikeda ,  Isao Yoshida ,  Shiro Kamohara ,  Megumi Kawakami ,  Tomoyuki Miyake ,  Masatoshi Morikawa

IPC分类号： H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

CPC分类号： H01L29/66659 ,  H01L21/823475 ,  H01L21/823871 ,  H01L23/4827 ,  H01L23/53219 ,  H01L23/53295 ,  H01L27/0255 ,  H01L27/088 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/0847 ,  H01L29/086 ,  H01L29/1045 ,  H01L29/105 ,  H01L29/1083 ,  H01L29/4175 ,  H01L29/41758 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/4916 ,  H01L29/7835 ,  H01L29/861 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

摘要： In a high frequency amplifying MOSFET having a drain offset region, the size is reduced and the on-resistance is decreased by providing conductor plugs 13 (P1) for leading out electrodes on a source region 10, a drain region 9 and leach-through layers 3 (4), to which a first layer wirings 11a, 11d (M1) are connected and, further, backing second layer wirings 12a to 12d are connected on the conductor plugs 13 (P1) to the first layer wirings 11s, 11d (M1).

摘要翻译： 在具有漏极偏移区域的高频放大MOSFET中，通过提供用于在源极区域10，漏极区域9和漏电极上引出电极的导体插头13（P 1），尺寸减小并导通电阻降低 连接有第一层布线11a，11d（M1）的层3（4），并且另外，背面的第二层布线12a至12d在导体塞13（P1）上连接到第一层 层布线11s，11d（M 1）。

公开(公告)号：US07087977B2

公开(公告)日：2006-08-08

申请号：US10670258

申请日：2003-09-26

申请人： Fumitaka Nakayama ,  Masatoshi Morikawa ,  Yutaka Hoshino ,  Tetsuo Uchiyama

发明人： Fumitaka Nakayama ,  Masatoshi Morikawa ,  Yutaka Hoshino ,  Tetsuo Uchiyama

IPC分类号： H01L29/00

CPC分类号： H01L21/823814 ,  H01L21/26586 ,  H01L23/3677 ,  H01L23/5223 ,  H01L23/5227 ,  H01L27/0617 ,  H01L27/0629 ,  H01L27/0805 ,  H01L27/0922 ,  H01L28/20 ,  H01L28/40 ,  H01L29/0638 ,  H01L29/0696 ,  H01L29/1045 ,  H01L29/1083 ,  H01L29/4238 ,  H01L29/456 ,  H01L29/4975 ,  H01L29/66659 ,  H01L2224/48227 ,  H01L2224/49113 ,  H01L2224/49171 ,  H01L2924/13091 ,  H01L2924/30107 ,  H03F3/193 ,  H01L2924/00

摘要： Plural elements forming a high frequency device in one chip are provided by forming a resistor element and the lower electrode of a capacitor element from one identical polycrystal silicon film over a substrate; forming the gate electrode of a power MISFET, upper electrode of the capacitor element, gate electrode of an n-channel type MISFET and gate electrode of a p-channel type MISFET from an identical polycrystal silicon film different from the other polycrystal silicon film and a WSi film; forming a capacitor element having a wiring formed on a silicon oxide film deposited over the substrate as a lower electrode and a wiring formed on the silicon oxide film as the upper electrode in the region MIN; forming a spiral coil in a region IND using an aluminum alloy film identical with that deposited on a silicon oxide film; and forming a bonding pad in a region PAD.

摘要翻译： 通过在基板上形成来自一个相同的多晶硅膜的电容器元件的电阻元件和下电极来提供在一个芯片中形成高频器件的多个元件; 从与其他多晶硅膜不同的相同多晶硅膜形成功率MISFET的栅电极，电容器元件的上电极，n沟道型MISFET的栅电极和p沟道型MISFET的栅电极，以及 WSi电影; 形成电容器元件，其具有形成在沉积在所述基板上的氧化硅膜上的布线作为下电极，以及在所述区域MIN中形成在所述氧化硅膜上的布线作为所述上电极; 使用与沉积在氧化硅膜上的铝合金膜相同的铝合金膜在区域IND中形成螺旋线圈; 以及在区域PAD中形成接合焊盘。

公开(公告)号：US06865399B2

公开(公告)日：2005-03-08

申请号：US10062529

申请日：2002-02-05

申请人： Toru Fujioka ,  Isao Yoshida ,  Mineo Katsueda ,  Masatoshi Morikawa ,  Yoshikuni Matsunaga ,  Kenji Sekine ,  Osamu Kagaya

发明人： Toru Fujioka ,  Isao Yoshida ,  Mineo Katsueda ,  Masatoshi Morikawa ,  Yoshikuni Matsunaga ,  Kenji Sekine ,  Osamu Kagaya

IPC分类号： H04B1/40 ,  H04B1/00 ,  H04B1/04

CPC分类号： H03F3/245 ,  H03F1/56 ,  H03F3/195 ,  H03F3/72 ,  H03F2200/111 ,  H03F2200/18 ,  H03F2200/222 ,  H03F2200/387 ,  H03F2200/405 ,  H03F2200/429 ,  H03F2203/7209 ,  H03F2203/7221 ,  H04B1/005 ,  H04B1/006 ,  H04B1/406

摘要： In a mobile telephone apparatus corresponding to dual-band provided with an RF power module to operate in two kinds of different frequencies, a common harmonics control circuit is provided to the output circuit of such RF power module to realize higher efficiency in view of controlling respective harmonics power for both band frequencies. Moreover, a means for selectively setting the bias is also provided so that the maximum efficiency can be attained depending on the output power required with respective communication systems with the bias control signal output from the CPU of the control unit interlocking with selection of frequency of the mobile telephone apparatus body.

摘要翻译： 在对应于具有以两种不同频率工作的RF功率模块的双频带的移动电话装置中，向这种RF功率模块的输出电路提供公共谐波控制电路，以实现更高的效率 两个频段的谐波功率。 此外，还提供了用于选择性地设置偏置的装置，使得可以根据各个通信系统所需的输出功率来获得最大效率，其中从控制单元的CPU输出的偏置控制信号与选择频率的 移动电话机身。

公开(公告)号：US06707102B2

公开(公告)日：2004-03-16

申请号：US09929016

申请日：2001-08-15

申请人： Masatoshi Morikawa ,  Mio Shindo ,  Isao Yoshida ,  Kenichi Nagura

发明人： Masatoshi Morikawa ,  Mio Shindo ,  Isao Yoshida ,  Kenichi Nagura

IPC分类号： H01L2976

CPC分类号： H01L29/402 ,  H01L29/4175 ,  H01L29/4238 ,  H01L29/7835 ,  H03F1/565 ,  H03F3/193

摘要： A power MOSFET for a high frequency amplification element having good output power characteristics and high frequency characteristics is described. In the power MOSFET, a shield conductive film electrically connected to via an insulating film is arranged over a drain-offset semiconductor region. A wiring for a drain electrode is so arranged as to extent in parallel to the shield conductive film at one end side of the shield conductive film. On the other hand, a wiring for the gate electrode, a wiring for a source electrode and a gate shunt wiring are arranged in this order to extend in parallel to each other at the other end side of the shield conductive film. The shield conductive film is so formed that the thickness thereof is smaller than that of the wiring for the gate electrode. In this way, the input and output capacitances of the MOSFET can be decreased.

摘要翻译： 描述了具有良好的输出功率特性和高频特性的高频放大元件的功率MOSFET。 在功率MOSFET中，通过绝缘膜电连接的屏蔽导电膜设置在漏极 - 偏移半导体区域上。 用于漏电极的布线被布置成与屏蔽导电膜的一端侧处的屏蔽导电膜平行地设置。 另一方面，用于栅电极的布线，用于源电极的布线和栅极分路布线依次布置成在屏蔽导电膜的另一端侧彼此平行地延伸。 屏蔽导电膜形成为使得其厚度小于栅电极的布线的厚度。 以这种方式，MOSFET的输入和输出电容可以减小。

公开(公告)号：US06535069B2

公开(公告)日：2003-03-18

申请号：US10084364

申请日：2002-02-28

申请人： Toru Fujioka ,  Isao Yoshida ,  Mineo Katsueda ,  Masatoshi Morikawa ,  Yoshikuni Matsunaga ,  Kenji Sekine ,  Osamu Kagaya

发明人： Toru Fujioka ,  Isao Yoshida ,  Mineo Katsueda ,  Masatoshi Morikawa ,  Yoshikuni Matsunaga ,  Kenji Sekine ,  Osamu Kagaya

IPC分类号： H03F304

CPC分类号： H03F3/72 ,  H03F3/193 ,  H03F3/211 ,  H03F2200/306 ,  H03F2200/309 ,  H03F2200/39 ,  H03F2200/429 ,  H04B1/0053 ,  H04B1/0458

摘要： A radio frequency power amplifier module for a dual-band type mobile communication apparatus that can transmit and receive a first frequency f1 and second frequency f2 (f2=2×f1). It includes a drive stage amplifier having the gain peaks at f1 and f2 with a matching circuit and a radio frequency power output circuit including a radio frequency power output transistor. The output circuit has a transmission line connected to the drain end of the output transistor, a parallel resonance circuit connected in series to the transmission line to resonate at harmonics of a frequency twice the frequency f2, a series resonance circuit provided between one end of the resonance circuit and the ground to resonate at harmonics of a frequency twice the frequency f2 and an output matching circuit provided in series to the other end of the parallel resonance circuit for matching with f1 and f2.

摘要翻译： 一种能够发送和接收第一频率f1和第二频率f2（f2 = 2xf1）的双频带型移动通信装置的射频功率放大器模块。 它包括具有匹配电路的f1和f2处的增益峰值的驱动级放大器和包括射频功率输出晶体管的射频功率输出电路。 输出电路具有连接到输出晶体管的漏极端的传输线，串联连接到传输线的并联谐振电路，以使谐振频率为频率f2的两倍的频率，串联谐振电路设置在 谐振电路和接地谐振频率为频率f2的频率的谐波，以及与并联谐振电路的另一端串联设置的与f1和f2匹配的输出匹配电路。

公开(公告)号：US06528848B1

公开(公告)日：2003-03-04

申请号：US09666772

申请日：2000-09-20

申请人： Yutaka Hoshino ,  Shuji Ikeda ,  Isao Yoshida ,  Shiro Kamohara ,  Megumi Kawakami ,  Tomoyuki Miyake ,  Masatoshi Morikawa

发明人： Yutaka Hoshino ,  Shuji Ikeda ,  Isao Yoshida ,  Shiro Kamohara ,  Megumi Kawakami ,  Tomoyuki Miyake ,  Masatoshi Morikawa

IPC分类号： H01L2972

CPC分类号： H01L29/66659 ,  H01L21/823475 ,  H01L21/823871 ,  H01L23/4827 ,  H01L23/53219 ,  H01L23/53295 ,  H01L27/0255 ,  H01L27/088 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/0847 ,  H01L29/086 ,  H01L29/1045 ,  H01L29/105 ,  H01L29/1083 ,  H01L29/4175 ,  H01L29/41758 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/4916 ,  H01L29/7835 ,  H01L29/861 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

摘要： In a high frequency amplifying MOSFET having a drain offset region, the size is reduced and the on-resistance is decreased by providing conductor plugs 13 (P1) for leading out electrodes on a source region 10, a drain region 9 and leach-through layers 3 (4), to which a first layer wirings 11a, 11d (M1) are connected and, further, backing second layer wirings 12a to 12d are connected on the conductor plugs 13 (P1) to the first layer wirings 11s, 11d (M1).

公开(公告)号：US06366788B1

公开(公告)日：2002-04-02

申请号：US09674072

申请日：2000-10-26

申请人： Toru Fujioka ,  Isao Yoshida ,  Mineo Katsueda ,  Masatoshi Morikawa ,  Yoshikuni Matsunaga ,  Kenji Sekine ,  Osamu Kagaya

发明人： Toru Fujioka ,  Isao Yoshida ,  Mineo Katsueda ,  Masatoshi Morikawa ,  Yoshikuni Matsunaga ,  Kenji Sekine ,  Osamu Kagaya

IPC分类号： H04B138

CPC分类号： H04B1/006 ,  H03F3/193 ,  H03F3/604 ,  H03F3/72 ,  H03F2200/306 ,  H03F2200/309 ,  H03F2200/39 ,  H03F2200/429 ,  H04B1/005 ,  H04B1/406

摘要： In a mobile telephone apparatus corresponding to dual-band provided with an RF power module to operate in two kinds of different frequencies, a common harmonics control circuit is provided to the output circuit of such RF power module to realize higher efficiency in view of controlling respective harmonics power for both band frequencies. Moreover, a means for selectively setting the bias is also provided so that the maximum efficiency can be attained depending on the output power required with respective communication systems with the bias control signal output from the CPU of the control unit interlocking with selection of frequency of the mobile telephone apparatus body.

摘要翻译： 在对应于具有以两种不同频率工作的RF功率模块的双频带的移动电话装置中，向这种RF功率模块的输出电路提供公共谐波控制电路，以实现更高的效率 两个频段的谐波功率。 此外，还提供了用于选择性地设置偏置的装置，使得可以根据各个通信系统所需的输出功率来获得最大效率，其中从控制单元的CPU输出的偏置控制信号与选择频率的 移动电话机身。

公开(公告)号：US20120235250A1

公开(公告)日：2012-09-20

申请号：US13486153

申请日：2012-06-01

申请人： Yutaka Hoshino ,  Shuji Ikeda ,  Isao Yoshida ,  Shiro Kamohara ,  Megumi Kawakami ,  Tomoyuki Miyake ,  Masatoshi Morikawa

发明人： Yutaka Hoshino ,  Shuji Ikeda ,  Isao Yoshida ,  Shiro Kamohara ,  Megumi Kawakami ,  Tomoyuki Miyake ,  Masatoshi Morikawa

IPC分类号： H01L29/78

CPC分类号： H01L29/66659 ,  H01L21/823475 ,  H01L21/823871 ,  H01L23/4827 ,  H01L23/53219 ,  H01L23/53295 ,  H01L27/0255 ,  H01L27/088 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/0847 ,  H01L29/086 ,  H01L29/1045 ,  H01L29/105 ,  H01L29/1083 ,  H01L29/4175 ,  H01L29/41758 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/4916 ,  H01L29/7835 ,  H01L29/861 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

摘要： In a high frequency amplifying MOSFET having a drain offset region, the size is reduced and the on-resistance is decreased by providing conductor plugs 13 (P1) for leading out electrodes on a source region 10, a drain region 9 and leach-through layers 3 (4), to which a first layer wirings 11a, 11d (M1) are connected and, further, backing second layer wirings 12a to 12d are connected on the conductor plugs 13 (P1) to the first layer wirings 11s, 11d (M1).

摘要翻译： 在具有漏极偏移区域的高频放大MOSFET中，通过在源极区域10，漏极区域9和浸出层9上引出电极的导体插头13（P1）来减小尺寸并降低导通电阻。 连接有第一层布线11a，11d（M1）的第3层（4），另外，背面的第二层布线12a〜12d在导体插塞13（P1）上连接到第一层布线11s，11d（M1 ）。

公开(公告)号：US08232595B2

公开(公告)日：2012-07-31

申请号：US13111001

申请日：2011-05-19

申请人： Yutaka Hoshino ,  Shuji Ikeda ,  Isao Yoshida ,  Shiro Kamohara ,  Megumi Kawakami ,  Tomoyuki Miyake ,  Masatoshi Morikawa

发明人： Yutaka Hoshino ,  Shuji Ikeda ,  Isao Yoshida ,  Shiro Kamohara ,  Megumi Kawakami ,  Tomoyuki Miyake ,  Masatoshi Morikawa

IPC分类号： H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L27/10 ,  H01L29/74

CPC分类号： H01L29/66659 ,  H01L21/823475 ,  H01L21/823871 ,  H01L23/4827 ,  H01L23/53219 ,  H01L23/53295 ,  H01L27/0255 ,  H01L27/088 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/0847 ,  H01L29/086 ,  H01L29/1045 ,  H01L29/105 ,  H01L29/1083 ,  H01L29/4175 ,  H01L29/41758 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/4916 ,  H01L29/7835 ,  H01L29/861 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

摘要： In a high frequency amplifying MOSFET having a drain offset region, the size is reduced and the on-resistance is decreased by providing conductor plugs 13 (P1) for leading out electrodes on a source region 10, a drain region 9 and leach-through layers 3 (4), to which a first layer wirings 11a, 11d (M1) are connected and, further, backing second layer wirings 12a to 12d are connected on the conductor plugs 13 (P1) to the first layer wirings 11s, 11d (M1).

摘要翻译： 在具有漏极偏移区域的高频放大MOSFET中，通过在源极区域10，漏极区域9和浸出层9上引出电极的导体插头13（P1）来减小尺寸并降低导通电阻。 连接有第一层布线11a，11d（M1）的第3层（4），另外，背面的第二层布线12a〜12d在导体插塞13（P1）上连接到第一层布线11s，11d（M1 ）。