公开(公告)号：US20100047994A1

公开(公告)日：2010-02-25

申请号：US12196067

申请日：2008-08-21

申请人： Zhong Dong ,  Ching-Hwa Chen

发明人： Zhong Dong ,  Ching-Hwa Chen

IPC分类号： H01L21/764

CPC分类号： H01L21/76224 ,  H01L29/66825 ,  H01L29/66833 ,  H01L29/7881 ,  H01L29/792

摘要： After forming a stack of layers (130, 140, 310) for a transistor or a charge-trapping memory over an active area (110), and before etching isolation trenches (160) in the semiconductor substrate (120) with the stack as a mask, spacers (610) are formed on the stack's sidewalls. The trench etch may include a lateral component, so the top edges of the trenches may be laterally recessed to a position under the spacers or the stack. After the etch, the spacers are removed to facilitate filling the trenches with the dielectric (to eliminate voids at the recessed top edges of the trenches). Other embodiments are also provided.

摘要翻译： 在有源区（110）上形成用于晶体管或电荷俘获存储器的层叠层（130,140,​​310）之后，以及在将堆叠中的隔离沟槽（160）刻蚀为半导体衬底 掩模，间隔物（610）形成在堆叠的侧壁上。 沟槽蚀刻可以包括侧向部件，因此沟槽的顶部边缘可以横向凹入到间隔件或堆叠下的位置。 在蚀刻之后，去除间隔物以便于用电介质填充沟槽（以消除沟槽凹陷的顶部边缘处的空隙）。 还提供了其他实施例。

公开(公告)号：US20090096009A1

公开(公告)日：2009-04-16

申请号：US11872998

申请日：2007-10-16

申请人： Zhong Dong ,  Chiliang Chen ,  Ching-Hwa Chen

发明人： Zhong Dong ,  Chiliang Chen ,  Ching-Hwa Chen

IPC分类号： H01L29/788 ,  H01L21/336

CPC分类号： H01L29/7883 ,  H01L29/40114 ,  H01L29/40117 ,  H01L29/7885 ,  H01L29/792

摘要： A nonvolatile memory cell stores at least 50% of the charge in a dielectric, charge-trapping layer (160) and at least 20% of the charge in a floating gate (170). The floating gate is at most 20 nm thick.

摘要翻译： 非易失性存储单元将电荷的至少50％存储在电介质电荷俘获层（160）中，并且在浮动栅极（170）中存储至少20％的电荷。 浮栅最多为20nm厚。

公开(公告)号：US20080135917A1

公开(公告)日：2008-06-12

申请号：US11608702

申请日：2006-12-08

申请人： Zhong Dong ,  Chiliang Chen

发明人： Zhong Dong ,  Chiliang Chen

IPC分类号： H01L29/788 ,  H01L21/31 ,  H01L23/58

CPC分类号： H01L21/31662 ,  H01L21/02057 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/02307 ,  H01L21/02312 ,  H01L29/40114

摘要： Thin oxide films are grown on silicon which has been previously treated with a gaseous or liquid source of chloride ions. The resulting oxide is of more uniform thickness than obtained on untreated silicon, thereby allowing a given charge to be stored on a floating gate formed over said oxide for a longer time than previously required for a structure not so treated.

摘要翻译： 薄氧化膜生长在已经用气态或液态氯离子源处理过的硅上。 所得到的氧化物的厚度比在未处理的硅上获得的厚度更均匀，从而允许将给定的电荷存储在形成于所述氧化物上的浮栅上比未经处理的结构先前需要的时间更长的时间。

公开(公告)号：US20080132086A1

公开(公告)日：2008-06-05

申请号：US12029328

申请日：2008-02-11

申请人： Zhong Dong ,  Chiliang Chen ,  Ching-Hwa Chen

发明人： Zhong Dong ,  Chiliang Chen ,  Ching-Hwa Chen

IPC分类号： H01L21/31

CPC分类号： H01L29/0847 ,  H01L21/28202 ,  H01L27/105 ,  H01L27/11526 ,  H01L27/11536 ,  H01L27/11546 ,  H01L29/7881

摘要： In-situ steam generation (ISSG) is used to reduce the nitrogen concentration in silicon and silicon oxide areas.

摘要翻译： 原位蒸汽发生（ISSG）用于降低硅和氧化硅区域的氮浓度。

公开(公告)号：US07323729B2

公开(公告)日：2008-01-29

申请号：US11431087

申请日：2006-05-04

申请人： Zhong Dong ,  Chuck Jang ,  Chia-Shun Hsiao

发明人： Zhong Dong ,  Chuck Jang ,  Chia-Shun Hsiao

IPC分类号： H01L29/76

CPC分类号： H01L21/02164 ,  H01L21/02211 ,  H01L21/02271 ,  H01L21/02337 ,  H01L21/28158 ,  H01L21/3105 ,  H01L21/31612

摘要： A method and apparatus are disclosed for reducing the concentration of chlorine and/or other bound contaminants within a semiconductor oxide composition that is formed by chemical vapor deposition (CVD) using a semiconductor-element-providing reactant such as dichlorosilane (DCS) and an oxygen-providing reactant such as N2O. In one embodiment, a DCS-HTO film is annealed by heating N2O gas to a temperature in the range of about 825° C. to about 950° C. so as to trigger exothermic decomposition of the N2O gas and flowing the heated gas across the DCS-HTO film so that disassociated atomic oxygen radicals within the heated N2O gas can transfer disassociating energy to chlorine atoms bound within the DCS-HTO film and so that the atomic oxygen radicals can fill oxygen vacancies within the semiconductor-oxide matrix of DCS-HTO film. An improved ONO structure may be formed with the annealed DCS-HTO film for use in floating gate or other memory applications.

摘要翻译： 公开了一种方法和装置，用于降低通过化学气相沉积（CVD）形成的半导体氧化物组合物中的氯和/或其它结合的污染物的浓度，所述半导体氧化物组合物使用提供半导体元素的反应物如二氯硅烷（DCS）和氧 提供反应物如N 2 O。 在一个实施方案中，通过将N 2 O 2气体加热至约825℃至约950℃的温度来退火DCS-HTO膜，以引发放热分解 N 2 O气体并使加热的气体流过DCS-HTO膜，使得加热的N 2 O气体内的解离的原子氧自由基能够将分解能量转移到结合的氯原子上 在DCS-HTO膜内，使得原子氧自由基可以填充DCS-HTO膜的半导体氧化物基质内的氧空位。 可以用退火的DCS-HTO膜形成改进的ONO结构，用于浮动栅极或其他存储器应用中。

公开(公告)号：US20070264776A1

公开(公告)日：2007-11-15

申请号：US11801301

申请日：2007-05-08

申请人： Zhong Dong ,  Chuck Jang ,  Chunchieh Huang

发明人： Zhong Dong ,  Chuck Jang ,  Chunchieh Huang

IPC分类号： H01L21/336

CPC分类号： H01L29/511 ,  H01L29/40114

摘要： An ONO-type inter-poly insulator is formed by depositing intrinsic silicon on an oxidation stop layer. In one embodiment, the oxidation stop layer is a nitridated top surface of a lower, and conductively-doped, polysilicon layer. In one embodiment, atomic layer deposition (ALD) is used to precisely control the thickness of the deposited, intrinsic silicon. Heat and an oxidizing atmosphere are used to convert the deposited, intrinsic silicon into thermally-grown, silicon dioxide. The oxidation stop layer impedes deeper oxidation. A silicon nitride layer and an additional silicon oxide layer are further deposited to complete the ONO structure before an upper, and conductively-doped, polysilicon layer is formed. In one embodiment, the lower and upper polysilicon layers are patterned to respectively define a floating gate (FG) and a control gate (CG) of an electrically re-programmable memory cell. In an alternative embodiment, after the middle, silicon nitride of the ONO structure is defined, another layer of intrinsic silicon is deposited, by way of for example, ALD. Heat and an oxidizing atmosphere are used to convert the second deposited, intrinsic silicon into thermally-grown, silicon dioxide. An ONO structure with two thermally-grown, and spaced apart, silicon oxide layers is thereby provided.

公开(公告)号：US20070004136A1

公开(公告)日：2007-01-04

申请号：US11174081

申请日：2005-06-30

申请人： Zhong Dong ,  Tai-Peng Lee

发明人： Zhong Dong ,  Tai-Peng Lee

IPC分类号： H01L21/8238 ,  H01L21/336 ,  H01L29/76

CPC分类号： H01L21/823481 ,  H01L21/28273 ,  H01L21/76224 ,  H01L27/115 ,  H01L27/11521

摘要： Chlorine is incorporated into pad oxide (110) formed on a silicon substrate (120) before the etch of substrate isolation trenches (134). The chlorine enhances the rounding of the top corners (140C) of the trenches when a silicon oxide liner (150.1) is thermally grown on the trench surfaces. A second silicon oxide liner (150.2) incorporating chlorine is deposited by CVD over the first liner (150.1), and then a third liner (150.3) is thermally grown. The chlorine concentration in the second liner (150.2) and the thickness of the three liners (150.1, 150.2, 150.3) are controlled to improve the corner rounding without consuming too much of the active areas (140).

摘要翻译： 在衬底隔离沟槽（134）的蚀刻之前，将氯结合到在硅衬底（120）上形成的衬垫氧化物（110）中。 当在沟槽表面上热生长氧化硅衬垫（150.1）时，氯增强了沟槽的顶角（140℃）的倒圆。 通过CVD在第一衬垫（150.1）上沉积掺入氯的第二氧化硅衬垫（150.2），然后热生长第三衬里（150.3）。 控制第二衬套（150.2）中的氯浓度和三个衬垫（150.1,150.2,150.3）的厚度以改善拐角四舍五入，而不消耗太多的有效区域（140）。

公开(公告)号：US07122415B2

公开(公告)日：2006-10-17

申请号：US10243379

申请日：2002-09-12

申请人： Chuck Jang ,  Zhong Dong ,  Vei-Han Chan ,  Ching-Hwa Chen

发明人： Chuck Jang ,  Zhong Dong ,  Vei-Han Chan ,  Ching-Hwa Chen

IPC分类号： H01L21/8238

CPC分类号： H01L21/02164 ,  H01L21/02178 ,  H01L21/022 ,  H01L21/02211 ,  H01L21/02271 ,  H01L21/0228 ,  H01L21/02307 ,  H01L21/28211 ,  H01L21/28273 ,  H01L21/3162 ,  H01L21/31683 ,  H01L29/511

摘要： Aluminum oxide is deposited by atomic layer deposition to form a high-k dielectric for the interpoly dielectric layer of a non-volatile memory device. The increased capacitive coupling can allow a thicker oxide layer to be used between the floating gate and the control gate, resulting in improved reliability and longer lifetime of the memory cells fabricated according to this invention.

摘要翻译： 通过原子层沉积沉积氧化铝以形成用于非易失性存储器件的多晶硅介电层的高k电介质。 增加的电容耦合可以允许在浮动栅极和控制栅极之间使用较厚的氧化物层，从而提高根据本发明制造的存储器单元的可靠性和更长寿命。

公开(公告)号：US20050106793A1

公开(公告)日：2005-05-19

申请号：US10718008

申请日：2003-11-19

申请人： Zhong Dong ,  Chuck Jang ,  Chunchieh Huang

发明人： Zhong Dong ,  Chuck Jang ,  Chunchieh Huang

IPC分类号： H01L21/28 ,  H01L29/51 ,  H01L21/336

CPC分类号： H01L29/511 ,  H01L21/28273

摘要： An ONO-type inter-poly insulator is formed by depositing intrinsic silicon on an oxidation stop layer. In one embodiment, the oxidation stop layer is a nitridated top surface of a lower, and conductively-doped, polysilicon layer. In one embodiment, atomic layer deposition (ALD) is used to precisely control the thickness of the deposited, intrinsic silicon. Heat and an oxidizing atmosphere are used to convert the deposited, intrinsic silicon into thermally-grown, silicon dioxide. The oxidation stop layer impedes deeper oxidation. A silicon nitride layer and an additional silicon oxide layer are further deposited to complete the ONO structure before an upper, and conductively-doped, polysilicon layer is formed. In one embodiment, the lower and upper polysilicon layers are patterned to respectively define a floating gate (FG) and a control gate (CG) of an electrically re-programmable memory cell. In an alternative embodiment, after the middle, silicon nitride of the ONO structure is defined, another layer of intrinsic silicon is deposited, by way of for example, ALD. Heat and an oxidizing atmosphere are used to convert the second deposited, intrinsic silicon into thermally-grown, silicon dioxide. An ONO structure with two thermally-grown, and spaced apart, silicon oxide layers is thereby provided.

摘要翻译： 通过在氧化停止层上沉积本征硅来形成ONO型多晶硅绝缘体。 在一个实施方案中，氧化停止层是较低且导电掺杂的多晶硅层的氮化顶表面。 在一个实施例中，原子层沉积（ALD）用于精确控制沉积的本征硅的厚度。 使用热和氧化气氛将沉积的本征硅转化成热生长的二氧化硅。 氧化停止层阻碍更深的氧化。 在形成上部和导电掺杂的多晶硅层之前，进一步沉积氮化硅层和另外的氧化硅层以完成ONO结构。 在一个实施例中，下部和上部多晶硅层被图案化以分别限定电可重新编程的存储器单元的浮动栅极（FG）和控制栅极（CG）。 在替代实施例中，在中间形成ONO结构的氮化硅之后，通过例如ALD沉积另一层本征硅。 使用热和氧化气氛将第二沉积的本征硅转化成热生长的二氧化硅。 由此提供具有两个热生长和间隔开的氧化硅层的ONO结构。

公开(公告)号：US06893920B2

公开(公告)日：2005-05-17

申请号：US10243791

申请日：2002-09-12

申请人： Zhong Dong ,  Chuck Jang

发明人： Zhong Dong ,  Chuck Jang

IPC分类号： H01L21/28 ,  H01L21/314 ,  H01L21/336 ,  H01L29/51 ,  H01L21/8247

CPC分类号： H01L29/788 ,  H01L21/28273 ,  H01L21/3144 ,  H01L21/3145 ,  H01L29/511 ,  H01L29/66825

摘要： A thin buffer layer of SiON is formed on the top surface of the floating gate, in order to protect the polysilicon surface from attack by atomic chlorine produced during the formation of the high temperature oxide of the ONO stack. The buffer layer can also be formed on other dielectric surfaces which are otherwise subject to adverse conditions in subsequent processing, such as the nitride layer in the ONO dielectric stack.

摘要翻译： 在浮栅的顶表面上形成有薄的缓冲层SiON，以便保护多晶硅表面免受在ONO堆叠的高温氧化物形成过程中产生的原子氯的侵蚀。 缓冲层也可以形成在其它电介质表面上，否则在后续处理中会受到不利条件的影响，例如ONO电介质叠层中的氮化物层。