Abstract:
A semiconductor structure includes a semiconductor substrate; a planar transistor on a first portion of the semiconductor substrate, wherein the first portion of the semiconductor substrate has a first top surface; and a multiple-gate transistor on a second portion of the semiconductor substrate. The second portion of the semiconductor substrate is recessed from the first top surface to form a fin of the multiple-gate transistor. The fin is electrically isolated from the semiconductor substrate by an insulator.
Abstract:
A wireless subsoil tension meter is disclosed, including an upper housing part, a middle housing part, a lower housing part, and a sensor module. The upper, middle and lower housing parts are assembled to form a sealed space to house a sensor module and liquid. The upper housing part has a tubular body shape. The middle housing part has a funnel body shape, with a larger top and the smaller bottom, the top end of the middle housing part is slightly smaller than the inside the bottom end of the outer tube of the upper housing part for easy assembly and tight fit. The lower housing part is has an elongated dome shape. When assembled, the sensor module is housed inside the assembly, which can further be applied to an extendable wireless soil measurement apparatus.
Abstract:
A two-tier wireless soil measurement apparatus is disclosed, including a top head and a plurality of sensors, wherein the top head being placed on or above the ground and the plurality of sensors being buried under the soil for sensing soil conditions, generating soil data representing the sensed soil conditions, and transmitting generated soil conditions to the top head; the plurality of sensors able to be assembled into a pole and each of the plurality of sensors including a sensor unit for sensing a soil condition; a circuit module connected to the sensor unit for transmitting sensed soil condition to the top head, a sensor housing for housing the sensor unit and the circuit module; and an engaging element for engaging two sensors in a head-to-tail manner for form a pole.
Abstract:
A differential voltage sensing method for achieving input impedance matching comprises the steps of: providing a first bio-potential signal to a first variable resistor for generating a first signal; providing a second bio-potential signal to a second variable resistor for generating a second signal; differentially amplifying first and second signals for generating a third signal; selecting an operation band of the third signal for generating first and second logic signals; and dynamically adjusting one of the impedances of the first and second variable resistors according to the first and second logic signals, wherein each of the first and second bio-potential signals has a common signal voltage level and a differential signal voltage level.
Abstract:
A semiconductor component includes a semiconductor substrate having a top surface. An opening extends from the top surface into the semiconductor substrate. The opening includes an interior surface. A first dielectric liner having a first compressive stress is disposed on the interior surface of the opening. A second dielectric liner having a tensile stress is disposed on the first dielectric liner. A third dielectric liner having a second compressive stress disposed on the second dielectric liner. A metal barrier layer is disposed on the third dielectric liner. A conductive material is disposed on the metal barrier layer and fills the opening.
Abstract:
A sensor for acquiring EMG and MMG signals is provided, including a substrate, an inertial sensing element received in a hole of the substrate, a circuit element disposed on the substrate, a plurality of electrical connecting members connecting the inertial sensing element with the substrate, and a sensing ring disposed on the substrate and surrounding the hole. The electrical connecting members are flexible, and the circuit element and the sensing ring are disposed on opposite sides of the substrate.
Abstract:
A physiological signal sensing device for examination of human is provided. The physiological signal sensing device includes a light emitting fiber and a light receiving fiber. The light emitting fiber includes a plurality of light emitting portions, wherein the light emitting fiber provides a plurality of sensing beams, and the sensing beams are respectively emitted through the light emitting portions. The light receiving fiber includes a plurality of light receiving portions. The light receiving fiber corresponds to the light emitting fiber. The sensing beams are emitted through the light emitting portions, reflected or refracted by the human. And then the sensing beams are received by the light receiving portions.
Abstract:
A physiological signal sensing device for examination of human is provided. The physiological signal sensing device includes a light emitting fiber and a light receiving fiber. The light emitting fiber includes a plurality of light emitting portions, wherein the light emitting fiber provides a plurality of sensing beams, and the sensing beams are respectively emitted through the light emitting portions. The light receiving fiber includes a plurality of light receiving portions. The light receiving fiber corresponds to the light emitting fiber. The sensing beams are emitted through the light emitting portions, reflected or refracted by the human. And then the sensing beams are received by the light receiving portions.
Abstract:
A semiconductor structure includes a semiconductor fin on a top surface of a substrate, wherein the semiconductor fin includes a middle section having a first width; and a first and a second end section connected to opposite ends of the middle section, wherein the first and the second end sections each comprises at least a top portion having a second width greater than the first width. The semiconductor structure further includes a gate dielectric layer on a top surface and sidewalls of the middle section of the semiconductor fin; and a gate electrode on the gate dielectric layer.
Abstract:
The present disclosure provides a method of fabricating a FinFET element including providing a substrate including a first fin and a second fin. A first layer is formed on the first fin. The first layer comprises a dopant of a first type. A dopant of a second type is provided to the second fin. High temperature processing of the substrate is performed on the substrate including the formed first layer and the dopant of the second type.