Thin film transistor having a plurality of carbon nanotubes
    41.
    发明授权
    Thin film transistor having a plurality of carbon nanotubes 有权
    具有多个碳纳米管的薄膜晶体管

    公开(公告)号:US08101953B2

    公开(公告)日:2012-01-24

    申请号:US12384329

    申请日:2009-04-02

    摘要: A thin film transistor includes a source electrode, a drain electrode, a semiconducting layer, and a gate electrode. The drain electrode is spaced from the source electrode. The semiconducting layer is connected to the source electrode and the drain electrode. The gate electrode is insulated from the source electrode, the drain electrode, and the semiconducting layer by an insulating layer. The semiconducting layer includes at least two stacked carbon nanotube films. Each carbon nanotube film includes an amount of carbon nanotubes. At least a part of the carbon nanotubes of each carbon nanotube film are aligned along a direction from the source electrode to the drain electrode.

    摘要翻译: 薄膜晶体管包括源电极,漏电极,半导体层和栅电极。 漏电极与源电极间隔开。 半导体层连接到源电极和漏电极。 栅电极通过绝缘层与源电极,漏电极和半导体层绝缘。 半导电层包括至少两个堆叠的碳纳米管膜。 每个碳纳米管膜包括一定量的碳纳米管。 每个碳纳米管膜的碳纳米管的至少一部分沿着从源电极到漏电极的方向排列。

    THREE-DIMENSIONAL NANO-STRUCTURE ARRAY
    42.
    发明申请
    THREE-DIMENSIONAL NANO-STRUCTURE ARRAY 审中-公开
    三维纳米结构阵列

    公开(公告)号:US20110293884A1

    公开(公告)日:2011-12-01

    申请号:US12970085

    申请日:2010-12-16

    IPC分类号: B32B3/30 B32B3/10 B32B7/00

    摘要: A three-dimensional nano-structure array includes a substrate and a number of three-dimensional nano-structures. The three-dimensional nano-structures are located on a surface of the substrate. Each of the plurality of three-dimensional nano-structures is a stepped bulge. The stepped bulge includes a first cylinder located on the substrate and a second cylinder located on the first cylinder.

    摘要翻译: 三维纳米结构阵列包括基底和多个三维纳米结构。 三维纳米结构位于基板的表面上。 多个三维纳米结构中的每一个都是阶梯状凸起。 阶梯式凸起包括位于基板上的第一气缸和位于第一气缸上的第二气缸。

    METHOD, APPARATUS AND SYSTEM FOR HANDOVER BETWEEN MULTI-CARRIER CELLS
    43.
    发明申请
    METHOD, APPARATUS AND SYSTEM FOR HANDOVER BETWEEN MULTI-CARRIER CELLS 审中-公开
    用于多载波电池之间切换的方法,装置和系统

    公开(公告)号:US20110269469A1

    公开(公告)日:2011-11-03

    申请号:US13180793

    申请日:2011-07-12

    IPC分类号: H04W36/00

    摘要: The present invention relates to the wireless network communication field, and discloses a method for handover between multi-carrier cells to avoid repeated handover decisions caused by delay of the triggering event. The method includes: the source cell receives a measurement report triggered by an event reported by a served User Equipment (UE); and the source cell executs a handover decision according to measurement reports triggered by multiple events after receiving the measurement reports triggered by the multiple events within an estimated interval, and hands over the UE to the corresponding carrier of the corresponding target cell. With the present invention, the resources of the source cell and the target cell may be saved, and the handover efficiency may be improved.

    摘要翻译: 本发明涉及无线网络通信领域,并且公开了一种用于在多载波小区之间切换的方法,以避免由触发事件的延迟引起的重复切换决策。 该方法包括:源小区接收由服务用户设备(UE)报告的事件触发的测量报告; 并且源单元在接收到由估计间隔内的多个事件触发的测量报告之后,根据由多个事件触发的测量报告执行切换判定,并且将UE切换到对应的目标小区的相应载波。 利用本发明,可以节省源小区和目标小区的资源,并且可以提高切换效率。

    Method for fabricating light emitting diode
    44.
    发明授权
    Method for fabricating light emitting diode 有权
    制造发光二极管的方法

    公开(公告)号:US08021902B2

    公开(公告)日:2011-09-20

    申请号:US12584386

    申请日:2009-09-03

    IPC分类号: H01L21/00

    摘要: A method of fabricating a light emitting diode includes the following steps. A substrate is provided and a first semiconductor layer, an active layer, and a second semiconductor layer are placed on the substrate. A carbon nanotube structure is provided and the carbon nanotube structure is lie on the second semiconductor layer. A first electrode is formed on the carbon nanotube structure. A portion of the first semiconductor layer is exposed and a second electrode is formed on the exposed portion of the first semiconductor layer to obtain the light emitting diode.

    摘要翻译: 制造发光二极管的方法包括以下步骤。 提供衬底,并且在衬底上放置第一半导体层,有源层和第二半导体层。 提供碳纳米管结构,碳纳米管结构位于第二半导体层上。 在碳纳米管结构上形成第一电极。 暴露第一半导体层的一部分,并且在第一半导体层的暴露部分上形成第二电极以获得发光二极管。

    Methods to improve transmission control protocol (TCP) performance over large bandwidth long delay links
    46.
    发明授权
    Methods to improve transmission control protocol (TCP) performance over large bandwidth long delay links 有权
    改进传输控制协议(TCP)性能在大带宽长延迟链路上的方法

    公开(公告)号:US08004983B2

    公开(公告)日:2011-08-23

    申请号:US11839342

    申请日:2007-08-15

    申请人: Qing Li

    发明人: Qing Li

    IPC分类号: H04L12/24

    摘要: TCP options are provided to address TCP performance problems during data exchanges over large bandwidth long delay communication links. These options address problems such as in sequence tail drops, inaccurate estimations of available bandwidth over a communication link, and slow responses to dynamic changes in link conditions.

    摘要翻译: 提供TCP选项来解决通过大带宽长延迟通信链路进行数据交换时的TCP性能问题。 这些选项解决了诸如序列尾部丢失,通信链路上可用带宽的不准确估计以及对链路条件下的动态变化的缓慢响应等问题。

    Assays which screen for compounds that modulate bitter taste of chlorogenic lactone compounds
    47.
    发明授权
    Assays which screen for compounds that modulate bitter taste of chlorogenic lactone compounds 有权
    测定调节绿色内酯化合物苦味的化合物的筛选

    公开(公告)号:US07939276B2

    公开(公告)日:2011-05-10

    申请号:US11455693

    申请日:2006-06-20

    IPC分类号: G01N33/567 C07K14/705

    摘要: The present invention relates to the discovery that specific human taste receptors in the T2R taste receptor family respond to particular bitter compounds, i.e., chlorogenic lactone compounds that contribute at least partially to the bitter taste of many coffee beverages. The present invention further relates to the use of these receptors in assays for identifying ligands that modulate the activation of these taste receptors by chlorogenic lactones and related compounds and which may be used as additives and/or removed from foods, beverages and medicinals in order to modify (block) T2R-associated bitter taste. A preferred embodiment is the use of the identified compounds as additives in coffee and coffee-flavored foods, beverages and medicinals.

    摘要翻译: 本发明涉及T2R味觉受体家族中的特定人味受体对特定苦味化合物的反应的发现,即,至少部分地促成许多咖啡饮料的苦味的绿色内酯化合物。 本发明还涉及这些受体在测定中用于鉴定调节绿色内酯和相关化合物来调节这些味觉受体的活化并可以用作添加剂和/或从食品,饮料和药物中去除的配体的用途,以便 修改(阻断)T2R相关的苦味。 优选的实施方案是使用所鉴定的化合物作为咖啡和咖啡风味食品,饮料和药物中的添加剂。

    Chimeric human sweet-umami and umami-sweet taste receptors
    48.
    发明授权
    Chimeric human sweet-umami and umami-sweet taste receptors 有权
    嵌合人类甜味和鲜味甜味受体

    公开(公告)号:US07906627B2

    公开(公告)日:2011-03-15

    申请号:US11583097

    申请日:2006-10-19

    摘要: This invention relates to chimeric taste receptors comprising the extracellular portion of one T1R or a variant or fragment thereof, either T1R1 or T1R2, and the transmembrane portion of another T1R or a variant or fragment thereof, either T1R1 or T1R2, preferably associated with a T1R3 polypeptide and a suitable G protein. These chimeric taste receptors and cells which express such chimeric taste receptors are useful in assays for identifying sweet and umami ligands as well in assays for identifying sweet and umami enhancers. Additionally, these chimeric taste receptors and cells which express same can be used to map and determine where specific sweet and umami ligands interact with their respective receptors and to elucidate the mechanism of receptor activation.

    摘要翻译: 本发明涉及包含一个T1R的细胞外部分或其变体或片段T1R1或T1R2的嵌合味觉感受器,以及T1R1或其变体或片段的跨膜部分,T1R1或T1R2,优选与T1R3相关 多肽和合适的G蛋白。 这些嵌合味觉受体和表达这种嵌合味觉受体的细胞可用于鉴定甜味和鲜味配体的测定以及用于鉴定甜味和鲜味增强剂的测定中。 此外,这些嵌合味觉受体和表达相同的细胞可以用于绘制和确定特定甜味和鲜味配体与其各自受体相互作用的位置,并阐明受体活化的机制。

    METHOD FOR MANAGING A PLURALITY OF BLOCKS OF A FLASH MEMORY, AND ASSOCIATED MEMORY DEVICE AND CONTROLLER THEREOF
    49.
    发明申请
    METHOD FOR MANAGING A PLURALITY OF BLOCKS OF A FLASH MEMORY, AND ASSOCIATED MEMORY DEVICE AND CONTROLLER THEREOF 有权
    用于管理闪存存储器的多个块的方法,以及相关的存储器件及其控制器

    公开(公告)号:US20110055460A1

    公开(公告)日:2011-03-03

    申请号:US12765882

    申请日:2010-04-23

    IPC分类号: G06F12/00 G06F12/02 G06F12/10

    摘要: A method for managing a plurality of blocks of a Flash memory includes: recording/updating linking information regarding a logical block address, wherein the linking information includes a plurality of physical block addresses linking to the logical block address, and each physical block address represents a block of the plurality of blocks; and when a block represented by a physical block address of the plurality of physical block addresses has no any valid page, selectively erasing the block and removing the physical block address from the linking information. An associated memory device and a controller thereof are also provided, where the controller includes: a ROM arranged to store a program code; and a microprocessor arranged to execute the program code to control the access to the Flash memory and manage the plurality of blocks.

    摘要翻译: 用于管理闪存的多个块的方法包括:记录/更新关于逻辑块地址的链接信息,其中链接信息包括链接到逻辑块地址的多个物理块地址,并且每个物理块地址表示 多个块的块; 并且当由所述多个物理块地址的物理块地址表示的块没有任何有效页面时,选择性地擦除所述块并从所述链接信息中移除所述物理块地址。 还提供了一种相关联的存储器件及其控制器,其中控制器包括:ROM,被布置为存储程序代码; 以及布置成执行程序代码以控制对闪存的访问并管理多个块的微处理器。

    Method about protecting high layer service in the multilayer communication equipment
    50.
    发明授权
    Method about protecting high layer service in the multilayer communication equipment 有权
    在多层通信设备中保护高层服务的方法

    公开(公告)号:US07881186B2

    公开(公告)日:2011-02-01

    申请号:US10522057

    申请日:2003-07-17

    IPC分类号: H04L1/00

    CPC分类号: H04L12/437

    摘要: This invention relates to a method for protecting high layer service in the multi-layer communication equipment, include that low layer processing module which provides low layer transmission passages for high layer processing module, and high layer processing module which sets up transparent VP link passage from up and down node by the service of said module, in order to make the service processed by the said module avoid influence. Once detecting the fault of the said processing module, high layer processing module will message the low layer processing module, and the low layer processing module will set up bypass connection after detecting the fault of the high layer processing module, then isolate the failed high layer process module. According to the present invention, extra network passages are not necessary, the means of protecting network is not limited. The present invention aims to protect effectively ATM traffic when the processing ability of ATM layer invalidate between MSPP and MSTP. The present invention solves the problem that will influence the other node of the network beyond the said node service in the case of device maintenance.

    摘要翻译: 本发明涉及一种用于保护多层通信设备中的高层业务的方法,包括为高层处理模块提供低层传输通道的低层处理模块,以及建立透明VP链路通道的高层处理模块 通过所述模块的服务来上下节点,以使由所述模块处理的服务避免影响。 一旦检测到所述处理模块的故障,高层处理模块就会通知低层处理模块,低层处理模块将在检测到高层处理模块的故障后建立旁路连接,然后隔离故障高层 过程模块。 根据本发明,不需要额外的网络通道,保护网络的方式不受限制。 本发明旨在在ATM层的处理能力在MSPP与MSTP之间无效时有效保护ATM流量。 在设备维护的情况下,本发明解决了影响网络的其他节点超出所述节点业务的问题。