摘要:
A MISFET capable of a high speed operation includes a metal silicide layer in a high concentration region aligned with a gate side wall layer on a self-alignment basis. A MISFET which can be driven at a high voltage includes an LDD portion having a width greater than the width of the side wall layer, a high concentration region in contact with the LDD portion and a metal silicide layer in the high concentration region.
摘要:
An encoding unit (44) individually encodes display image-forming image data, i.e., image data from an image input unit (2), decoded data from a decoding unit (46), and graphics image data from a graphics-generating unit (47). A storing unit (45) stores the individually encoded image data. As a result, when a user intends to reuse, more specifically, replay, edit, or transmit the stored display image, the user can selectively decode required image elements, thereby reusing the selectively decoded image elements. This feature provides improved user-friendliness.
摘要:
A MISFET capable of a high speed operation includes a metal silicide layer in a high concentration region aligned with a gate side wall layer on a self-alignment basis. A MISFET which can be driven at a high voltage includes an LDD portion having a width greater than the width of the side wall layer, a high concentration region in contact with the LDD portion and a metal silicide layer in the high concentration region.
摘要:
Row electrodes Xi (i=1 to n) are arranged over portions close to right and left ends of a PDP, and column electrodes Wj (j=1 to m) are arranged over portions close to upper and lower ends thereof to grade-separately intersect with the row electrodes Xi. The column electrodes Wj and Wm+1−j are connected in common. Row electrodes YL1 to YLn extending over a portion close to the left end and a portion close to the center and row electrodes YR1 to YRn extending over a portion close to the right end and a portion close to the center are arranged alternately with row electrodes X1 to Xn. A scan pulse Vax1 is successively applied to the row electrodes Xi and a voltage Vaw1 based on image data is applied to each column electrode Wj in synchronization with the application of the pulse Vax1 in a first address period. In this period, a subscan pulse Vay1 is applied to the row electrodes YL1 to YLn while the row electrodes YR1 to YRn are set to a ground potential. In a second address period, the voltages applied to the aforementioned row electrodes YL1 to YLn and the row electrodes YR1 to YRn are exchanged. Thus, reduction of the cost for a plasma display device is attained by reducing the number of driving ICs for the column electrodes.
摘要:
The invention provides a bipolar transistor with improved performance. An insulation film comprising a silicon oxide film is formed by means of oxidation treatment on the side surface of an emitter aperture, and then an epitaxial layer comprised of SiGe is grown selectively in an aperture formed by removing a silicon nitride film so as to form under cut.
摘要:
A pin layout which prevents degradation of a frequency characteristic of a low noise amplifier and a receiving mixer included in a semiconductor integrated circuit for dual-band transmission/reception wherein the circuit of the low noise amplifier is provided at a position where the distance from the end of a pin outside the package of the low noise amplifier to the pad is the shortest; ground pins of two low noise amplifiers and the high frequency signal pins are arranged respectively so as not to be adjacent to each other; the power source and ground pin of the low noise amplifier, and the power source and ground pin of the bias circuit are respectively separated; and high frequency signal wires do not intersect each other.
摘要:
An electric discharge machining apparatus includes a wire electrode for machining a workpiece, and a first voltage applying unit for applying a voltage pulse. The voltage pulse has a rise time longer than a discharge formative time lag when a rectangular voltage pulse is applied, when a distance between the workpiece and the wire is an average value in machining, and rises to the same voltage as the rectangular voltage pulse.
摘要:
In a host interface circuit performing data transmission/reception between an external host controller and a device connected to the external host controller, the external host controller generates, as external addresses to be supplied to the connected device, first addresses corresponding to the respective internal addresses in an internal storage space of the connected device, and a specific second address corresponding to internal addresses of a series of areas in the internal storage space; and the host interface circuit includes a first address conversion circuit for converting the first addresses into the internal addresses in the internal storage space, and a second address conversion circuit for converting the specific second address into the internal addresses in the internal storage space; and the specific second address is used when the external host controller makes continuous access to the serial areas in the internal storage space of the connected device. Therefore, the external host controller can make continuous access to a series of areas in the internal storage space of the connected device by using the specific address, without using DMA, between the external host controller and the host interface circuit. As the result, power consumption is reduced, and complexity in software processing is reduced.
摘要:
Column electrodes W1 to Wm are arranged on the side of a rear glass substrate along a first direction D1 at regular intervals. Row electrodes X1 to Xn and Y1 to Yn include (a) strip bus electrodes Xb1 to Xbn and Yb1 to Ybn alternately arranged on a surface of a front glass substrate closer to discharge spaces at regular pitches to extend in a second direction D2 and (b) square transparent electrodes Xt and Yt having ends connected to the bus electrodes Xb1 to Xbn and Yb1 to Ybn respectively. The transparent electrodes Xt and Yt alternately extend into single ones of unit areas AR adjacent to each other in the first direction D1 through the bus electrodes Xbi and Ybi connected with the ends thereof. The unit areas AR are separated into discharge cells C having discharge gaps defined by opposite edges of the transparent electrodes Xt and Yt and non-discharge cells NC having no discharge gaps. The discharge gaps C are not adjacent to each other in the first and second directions D1 and D2. Thus provided is an AC-PDP capable of suppressing/avoiding false discharge.
摘要:
A MISFET capable of a high speed operation includes a metal silicide layer in a high concentration region aligned with a gate side wall layer on a self-alignment basis. A MISFET which can be driven at a high voltage includes an LDD portion having a width greater than the width of the side wall layer, a high concentration region in contact with the LDD portion and a metal silicide layer in the high concentration region.