公开(公告)号：US07192662B2

公开(公告)日：2007-03-20

申请号：US10909529

申请日：2004-08-02

Applicant: Chaopeng Chen ,  Kevin Lin ,  Jei Wei Chang

Inventor： Chaopeng Chen ,  Kevin Lin ,  Jei Wei Chang

IPC: G11B5/33

CPC classification number: C25D5/18 ,  C25D3/562 ,  C25D5/006 ,  C25D7/001 ,  G11B5/3109 ,  G11B5/3163 ,  H01F10/16 ,  H01F41/26 ,  Y10T428/115 ,  Y10T428/12493

Abstract: A plated magnetic thin film of high saturation magnetization and low coercivity having the general form Co100-a-bFeaMb, where M can be Mo, Cr, W, Ni or Rh, which is suitable for use in magnetic recording heads that write on narrow trackwidth, high coercivity media. The plating method that produces the alloy includes four current application processes: direct current, pulsed current, pulse reversed current and conditioned pulse reversed current.

Abstract translation: 具有高饱和磁化强度和低矫顽力的电镀磁性薄膜具有一般形式，其中M可以是 Mo，Cr，W，Ni或Rh，其适用于写在窄轨道宽度，高矫顽力介质上的磁记录头。 生产合金的电镀方法包括四个电流施加工艺：直流，脉冲电流，脉冲反向电流和调节脉冲反向电流。

公开(公告)号：US07136323B2

公开(公告)日：2006-11-14

申请号：US11162972

申请日：2005-09-29

Applicant: Kevin Lin ,  Alex Chang

Inventor： Kevin Lin ,  Alex Chang

IPC: G11C8/00

CPC classification number: G06F13/4234

Abstract: Apparatus and method for generating a variable-frequency clock is disclosed. A control state machine defines various commands and generates corresponding control signals. A variable-frequency clock generator then outputs the variable-frequency clock that has a specific pattern corresponding with the respective command, where the variable-frequency clock is constructed with a first clock and a second clock having a frequency different from the first clock. A control signals generator accordingly outputs the control signals that are also constructed with the first clock and the second clock.

Abstract translation: 公开了一种用于产生可变频率时钟的装置和方法。 控制状态机定义各种命令并产生相应的控制信号。 然后，可变频率时钟发生器输出具有与相应命令对应的特定模式的可变频率时钟，其中可变频率时钟由第一时钟构成，第二时钟具有与第一时钟不同的频率。 控制信号发生器相应地输出也由第一时钟和第二时钟构成的控制信号。

公开(公告)号：US20050249025A1

公开(公告)日：2005-11-10

申请号：US10709299

申请日：2004-04-27

Applicant: Kevin Lin ,  Alex Chang

Inventor： Kevin Lin ,  Alex Chang

IPC: G06F13/42 ,  G11C8/00 ,  G11C11/407

CPC classification number: G06F13/4234

Abstract: A method for providing a variable frequency clock for a SDRAM. First, receiving a clock with a fixed frequency and a plurality of signals, wherein each the signal is an interlace combination of a plurality of high level signals and a plurality of low levels signals. Second, extracting a plurality of proper positions from the signals, wherein each low level of each the signal corresponds to a proper position. Third, amending the frequency of the clock such that each the proper position corresponds to a rising edge of the clock.

Abstract translation: 一种用于为SDRAM提供可变频率时钟的方法。 首先，接收具有固定频率和多个信号的时钟，其中每个信号是多个高电平信号和多个低电平信号的隔行组合。 第二，从信号中提取多个适当的位置，其中每个信号的每个低电平对应于适当的位置。 第三，修改时钟的频率，使得每个正确的位置对应于时钟的上升沿。

公开(公告)号：US06403411B1

公开(公告)日：2002-06-11

申请号：US09208601

申请日：1998-12-08

Applicant: Chih-Hsun Chu ,  Horng-Nan Chern ,  Kevin Lin ,  Kuo-Tai Huang ,  Wen-Yi Hsieh ,  Tri-Rung Yew

Inventor： Chih-Hsun Chu ,  Horng-Nan Chern ,  Kevin Lin ,  Kuo-Tai Huang ,  Wen-Yi Hsieh ,  Tri-Rung Yew

IPC: H01L218234

CPC classification number: H01L28/84 ,  H01L21/76895

Abstract: A method for manufacturing the lower electrode of a DRAM capacitor. The method includes depositing polysilicon instead of amorphous silicon to form the lower electrode. Because polysilicon has a higher depositing temperature, it has a higher depositing rate capable of shortening depositing time. After forming the polysilicon lower electrode, the upper portion of the polysilicon layer is transformed into an amorphous layer by bombarding the polysilicon layer with ions to damage its internal structure. Eventually, hemispherical grain silicon is able to grow over the lower electrode, thereby increasing its surface area.

Abstract translation: 一种用于制造DRAM电容器的下电极的方法。 该方法包括沉积多晶硅而不是非晶硅以形成下电极。 由于多晶硅具有较高的沉积温度，因此具有更高的沉积速率，能够缩短沉积时间。 在形成多晶硅下电极之后，通过用离子轰击多晶硅层将多晶硅层的上部转变成非晶层，以破坏其内部结构。 最终，半球形晶粒硅能够在下电极上生长，从而增加其表面积。

公开(公告)号：USD445699S1

公开(公告)日：2001-07-31

申请号：US29132741

申请日：2000-11-13

Applicant: Kevin Lin

Designer： Kevin Lin

公开(公告)号：US06238974B1

公开(公告)日：2001-05-29

申请号：US09475212

申请日：1999-12-29

Applicant: Horng-Nan Chern ,  Kevin Lin ,  Kun-Chi Lin

Inventor： Horng-Nan Chern ,  Kevin Lin ,  Kun-Chi Lin

IPC: H01L218242

CPC classification number: H01L28/84 ,  H01L21/76895 ,  H01L27/10852

Abstract: A process of fabricating a bottom electrode for the storage capacitors of DRAM is disclosed. The process includes first forming an insulation layer on the surface of the device substrate, with the insulation layer patterned to form a contact opening that exposes a source/drain region of the memory cell transistor. A first conductive layer then covers the insulation layer and fills into the contact opening, with the first conductive layer contacting the exposed source/drain region. A native oxide layer is then formed on the surface of the first conductive layer. A second electrically conductive layer is then formed and patterned to form a recess substantially above the location of the contact opening in the insulation layer. A layer of HSG—Si then covers the surface of the second conductive layer and the surface of the recess, and the HSG—Si layer and the second conductive layer are patterned to form the bottom electrode of the capacitor. The recess and its covering HSG—Si layer increase the effective surface area of the bottom electrode of the capacitor.

Abstract translation: 公开了制造用于DRAM的存储电容器的底部电极的工艺。 该方法包括首先在器件衬底的表面上形成绝缘层，其中图案化绝缘层以形成暴露存储单元晶体管的源/漏区的接触开口。 然后，第一导电层覆盖绝缘层并填充到接触开口中，第一导电层与暴露的源极/漏极区接触。 然后在第一导电层的表面上形成自然氧化物层。 然后形成第二导电层并图案化以形成基本上在绝缘层中的接触开口位置上方的凹部。 然后，HSG-Si层覆盖第二导电层的表面和凹部的表面，并且对HSG-Si层和第二导电层进行图案化以形成电容器的底部电极。 凹槽及其覆盖的HSG-Si层增加了电容器底部电极的有效表面积。

公开(公告)号：US06190041B1

公开(公告)日：2001-02-20

申请号：US09327478

申请日：1999-06-09

Applicant: James Huang ,  Kevin Lin

Inventor： James Huang ,  Kevin Lin

IPC: G01K100

CPC classification number: G01J5/08 ,  A61B5/01 ,  G01J5/04 ,  G01J5/049 ,  G01J5/0818 ,  G01J5/0834 ,  G01J5/62

Abstract: The shutter construction of a tympanic thermometer comprises a base formed with a horizontal groove and a vertical slot that communicate with each other, wherein said horizontal groove is for mounting a wave guiding duct; a supporting frame formed at the rear end of said base and formed with at least a first engaging portion and at least a second engaging portion; a shutter plate mounted in said vertical slot for closing said wave guiding duct; a linking element, the fore end of the linking element being coupled to the lower portion of said shutter plate and the rear end of the linking element being engaged with said first engaging portion of said supporting frame so that the fore end of the linking element can be swayed up and down relative to the rear end thereof; a spring element, the fore end of the spring element being coupled to said linking element; and an actuating element, the fore end of the actuating element being engaged with said second engaging portion of said supporting frame and the rear end of the supporting frame being coupled to the rear end of said spring element so that the rear end of said actuating element can be swayed up and down relative to the fore end of said actuating element, thereby said linking element can be moved down by said spring element when said actuating element is pressed down.

Abstract translation: 鼓膜温度计的快门结构包括形成有水平槽和垂直槽的基座，所述垂直槽彼此连通，其中所述水平槽用于安装波导管; 支撑框架，形成在所述底座的后端，并形成有至少第一接合部分和至少第二接合部分; 安装在所述垂直槽中的挡板，用于关闭所述波导管; 联接元件的前端联接到所述活门板的下部，并且连接元件的后端与所述支撑框架的所述第一接合部分接合，使得连接元件的前端可以 相对于其后端上下摆动; 弹簧元件，弹簧元件的前端联接到所述连接元件; 和致动元件，所述致动元件的前端与所述支撑框架的所述第二接合部分接合，并且所述支撑框架的后端联接到所述弹簧元件的后端，使得所述致动元件的后端 可以相对于所述致动元件的前端上下摆动，由此当所述致动元件被按压时，所述连接元件可以被所述弹簧元件向下移动。

公开(公告)号：US6074955A

公开(公告)日：2000-06-13

申请号：US189116

申请日：1998-11-09

Applicant: Kevin Lin ,  Chia-Wen Liang ,  Kun-Chi Lin

Inventor： Kevin Lin ,  Chia-Wen Liang ,  Kun-Chi Lin

IPC: H01L21/311 ,  H01L21/60 ,  H01L21/768 ,  H01L21/8242

CPC classification number: H01L27/10852 ,  H01L21/76816 ,  H01L21/76897 ,  H01L21/31144 ,  H01L27/10873 ,  H01L27/10882

Abstract: A method of fabricating a node contact window. A substrate having devices and a first dielectric layer is provided. Bit lines having spacer are formed on the first dielectric layer and a second is formed on the first dielectric layer. A hard material layer is then formed on the second dielectric layer. An opening is formed within the second dielectric layer to expose the spacer and the first dielectric layer. A polysilicon spacer is then formed on the sidewalls of the opening. A node contact window is formed by etching through the first dielectric layer to expose the substrate.

Abstract translation: 一种制造节点接触窗口的方法。 提供具有器件和第一介电层的衬底。 具有间隔物的位线形成在第一电介质层上，第二电极形成在第一电介质层上。 然后在第二电介质层上形成硬质材料层。 在第二电介质层内形成开口以露出间隔物和第一介电层。 然后在开口的侧壁上形成多晶硅间隔物。 通过蚀刻穿过第一电介质层形成节点接触窗，露出衬底。

公开(公告)号：US09429427B2

公开(公告)日：2016-08-30

申请号：US13720876

申请日：2012-12-19

Applicant: Qing Ma ,  Feras Eid ,  Kevin Lin ,  Johanna M. Swan ,  Weng Hong Teh ,  Valluri R. Rao

Inventor： Qing Ma ,  Feras Eid ,  Kevin Lin ,  Johanna M. Swan ,  Weng Hong Teh ,  Valluri R. Rao

IPC: G01C19/00 ,  G01C19/56 ,  G01C19/5776

CPC classification number: G01C19/56 ,  G01C19/5776

Abstract: This invention relates to inductive inertial sensors employing a magnetic drive and/or sense architecture. In embodiments, translational gyroscopes utilize a conductive coil made to vibrate in a first dimension as a function of a time varying current driven through the coil in the presence of a magnetic field. Sense coils register an inductance that varies as a function of an angular velocity in a second dimension. In embodiments, the vibrating coil causes first and second mutual inductances in the sense coils to deviate from each other as a function of the angular velocity. In embodiments, self-inductances associated with a pair of meandering coils vary as a function of an angular velocity in a second dimension. In embodiments, package build-up layers are utilized to fabricate the inductive inertial sensors, enabling package-level integrated inertial sensing advantageous in small form factor computing platforms, such as mobile devices.

Abstract translation: 本发明涉及采用磁驱动和/或感测架构的感应惯性传感器。 在实施例中，平移陀螺仪利用在第一维度中制成的导电线圈作为在存在磁场的情况下驱动通过线圈的时变电流的函数。 感应线圈记录在第二维度上作为角速度的函数变化的电感。 在实施例中，振动线圈使得感测线圈中的第一和第二互感器作为角速度的函数彼此偏离。 在实施例中，与一对曲折线圈相关联的自感量作为第二维度中的角速度的函数而变化。 在实施例中，使用封装积层来制造感应惯性传感器，使得能够在诸如移动设备的小尺寸计算平台中有利的封装级集成惯性感测。

公开(公告)号：US20140262707A1

公开(公告)日：2014-09-18

申请号：US13996507

申请日：2013-03-14

Applicant: Chytra Pawashe ,  Kevin Lin ,  Anurag Chaudhry ,  Raseong Kim ,  Seiyon Kim ,  Kelin Kuhn ,  Sasikanth Manipatruni ,  Rafael Rios ,  Ian A. Young

Inventor： Chytra Pawashe ,  Kevin Lin ,  Anurag Chaudhry ,  Raseong Kim ,  Seiyon Kim ,  Kelin Kuhn ,  Sasikanth Manipatruni ,  Rafael Rios ,  Ian A. Young

IPC: H01H59/00

CPC classification number: H01L29/84 ,  B82Y10/00 ,  H01H1/0094 ,  H01H9/0271 ,  H01H59/0009 ,  H01L29/045 ,  H01L29/0673 ,  H01L29/161

Abstract: Nanowire-based mechanical switching devices are described. For example, a nanowire relay includes a nanowire disposed in a void disposed above a substrate. The nanowire has an anchored portion and a suspended portion. A first gate electrode is disposed adjacent the void, and is spaced apart from the nanowire. A first conductive region is disposed adjacent the first gate electrode and adjacent the void, and is spaced apart from the nanowire.

Abstract translation: 描述了基于纳米线的机械开关装置。 例如，纳米线继电器包括布置在衬底上方的空隙中的纳米线。 纳米线具有锚固部分和悬挂部分。 第一栅电极邻近空隙设置，并与纳米线隔开。 第一导电区域邻近第一栅电极设置并邻近空隙，并与纳米线隔开。