公开(公告)号：US5734606A

公开(公告)日：1998-03-31

申请号：US767240

申请日：1996-12-13

申请人： Saied N. Tehrani ,  Eugene Chen ,  Ronald N. Legge ,  Xiaodong T. Zhu ,  Mark Durlam

发明人： Saied N. Tehrani ,  Eugene Chen ,  Ronald N. Legge ,  Xiaodong T. Zhu ,  Mark Durlam

IPC分类号： G11C11/15 ,  H01L21/8246 ,  H01L27/105

CPC分类号： G11C11/15

摘要： New types of memory cell structures (20, 40) for a magnetic random access memory are provided. A memory cell (20, 40) has a plurality of cell pieces (21-24) where digital information is stored. Each cell piece is formed by magnetic layers (27, 28) separated by a conductor layer (29). A word line (25, 41) is placed adjacent each cell piece for winding around cell pieces (21-24) and meandering on a same plane on cell pieces (21-24), for example. The invention attains less power consumption and effective usage for a word current.

摘要翻译： 提供了用于磁随机存取存储器的新型存储单元结构（20,40）。 存储单元（20,40）具有存储数字信息的多个单元（21-24）。 每个电池片由通过导体层（29）分开的磁性层（27,28）形成。 例如，字线（25,41）被放置在每个单元片附近，用于绕在单元片（21-24）上并在单元片（21-24）上的同一平面上蜿蜒曲折。 本发明实现了对于字电流的更少的功耗和有效的使用。

公开(公告)号：US5719088A

公开(公告)日：1998-02-17

申请号：US556477

申请日：1995-11-13

申请人： Jenn-Hwa Huang ,  Mark Durlam ,  Marino J. Martinez ,  Ernie Schirmann ,  Saied N. Tehrani ,  William J. Ooms

发明人： Jenn-Hwa Huang ,  Mark Durlam ,  Marino J. Martinez ,  Ernie Schirmann ,  Saied N. Tehrani ,  William J. Ooms

IPC分类号： H01L21/285 ,  H01L21/311 ,  H01L21/335 ,  H01L23/485 ,  H01L21/44

CPC分类号： H01L29/66462 ,  H01L21/28587 ,  H01L21/31116 ,  H01L23/485 ,  H01L2924/0002

摘要： A method of fabricating semiconductor devices with a passivated surface includes providing a contact layer on a substrate so as to define an inter-electrode surface area. A first layer and an insulating layer, which are selectively etchable relative to each other and to the substrate and the contact layer, are deposited on the contact layer and the inter-electrode surface area. The insulating layer and the first layer are individually and selectively etched to define an electrode contact area and to expose the inter-electrode surface area. The exposed inter-electrode surface area is passivated, either subsequent to or during the etching of the first layer. A metal contact is formed in the electrode contact area in abutting engagement with the insulating layer so as to seal the inter-electrode surface area.

摘要翻译： 制造具有钝化表面的半导体器件的方法包括在衬底上提供接触层以便限定电极间表面积。 可以相对于彼此和基板和接触层选择性地蚀刻的第一层和绝缘层沉积在接触层和电极间表面区域上。 分别选择性地蚀刻绝缘层和第一层以限定电极接触面积并暴露电极间表面积。 暴露的电极间表面积在第一层蚀刻之前或期间被钝化。 在与绝缘层邻接的电极接触区域中形成金属接触，以密封电极间表面积。

公开(公告)号：US5482875A

公开(公告)日：1996-01-09

申请号：US229266

申请日：1994-04-18

申请人： Rimantas L. Vaitkus ,  Saied N. Tehrani ,  Vijay K. Nair ,  Herbert Goronkin

发明人： Rimantas L. Vaitkus ,  Saied N. Tehrani ,  Vijay K. Nair ,  Herbert Goronkin

IPC分类号： H01L29/812 ,  H01L21/338 ,  H01L29/08 ,  H01L29/10 ,  H01L29/778 ,  H01L29/80 ,  H01L21/335

CPC分类号： H01L29/7783 ,  H01L29/0891 ,  H01L29/1029 ,  Y10S148/072

摘要： A low power heterojunction field effect transistor (10, 30, 50, 60) capable of operating at low drain currents while having a low intermodulation distortion. A channel restriction region (9, 38, 51) is formed between the gate electrodes (24, 41, 69) and the drain electrodes (25, 46, 65). The channel restriction region (9, 38, 51) depletes the channel layer (13, 33) thereby constricting a channel and lowering a drain saturation current. The channel restriction region (9, 38, 51) may be used to set a desired drain saturation current such that a second derivative of the transconductance with respect to the gate-source voltage is approximately zero and a first derivative of the transconductance with respect to the gate-source voltage is, approximately, a relative maximum at the desired operating point.

摘要翻译： 低功率异质结场效应晶体管（10,30,50,60）能够以低漏电流工作，同时具有低的互调失真。 在栅极（24,41,69）和漏极（25,46,65）之间形成沟道限制区（9,38,51）。 信道限制区域（9,38,51）耗尽信道层（13,33），从而限制信道并降低漏极饱和电流。 通道限制区域（9,38,51）可以用于设置所需的漏极饱和电流，使得相对于栅极 - 源极电压的跨导的二次导数近似为零，并且跨导的第一导数相对于 栅极源极电压大约在所需工作点处的相对最大值。

公开(公告)号：US5349214A

公开(公告)日：1994-09-20

申请号：US119554

申请日：1993-09-13

申请人： Saied N. Tehrani ,  X. Theodore Zhu ,  Herbert Goronkin ,  Jun Shen

发明人： Saied N. Tehrani ,  X. Theodore Zhu ,  Herbert Goronkin ,  Jun Shen

IPC分类号： H01L29/80 ,  H01L27/06 ,  H01L27/092 ,  H01L27/095 ,  H01L27/088 ,  H01L27/105 ,  H01L31/06

CPC分类号： H01L27/0605 ,  H01L27/092 ,  Y10S148/015 ,  Y10S148/072 ,  Y10S148/16

摘要： A heterojunction device including a first semiconductive layer on a substrate, a barrier layer on the first layer, a second semiconductive layer on the barrier layer and a multi-layer cap, on the second semiconductive layer. First and second gates positioned on layers of the cap to define first and second transistors, with the cap layers being selected and etched to pin the Fermi level in a first transistor conduction channel in the second semiconductive layer such that the number of carriers in the first conduction channel are substantially less than the number of carriers in surrounding portions of the second semiconductive layer and the Fermi level in a second transistor conduction channel in the first semiconductive layer such that the number of carriers in the second conduction channel are substantially less than the number of carriers in surrounding portions of the first semiconductive layer.

摘要翻译： 一种异质结装置，在第二半导体层上包括衬底上的第一半导体层，第一层上的阻挡层，阻挡层上的第二半导体层和多层帽。 位于盖的层上的第一和第二栅极限定第一和第二晶体管，其中盖层被选择和蚀刻以在第二半导体层中的第一晶体管导通通道中引导费米能级，使得第一和第二晶体管中的载流子数目 传导通道基本上小于第一半导体层中的第二半导体层的周围部分中的载流子数量和第二晶体管传导通道中的费米能级数，使得第二导电通道中的载流子数目基本上小于数量 在第一半导体层的周围部分的载体。

公开(公告)号：US5294809A

公开(公告)日：1994-03-15

申请号：US65338

申请日：1993-05-24

申请人： Herbert Goronkin ,  Saied N. Tehrani ,  Jun Shen ,  Xiaodong T. Zhu

发明人： Herbert Goronkin ,  Saied N. Tehrani ,  Jun Shen ,  Xiaodong T. Zhu

IPC分类号： H01L29/88

CPC分类号： B82Y30/00 ,  B82Y10/00 ,  H01L29/882

摘要： A resonant tunneling diode having a quantum well sandwiched between first and second tunnel barrier layers and the quantum well and tunnel barrier layers sandwiched between an injection layer and a collector layer. The improvement includes a relatively thin layer of semiconductor material sandwiched between either the first tunnel barrier layer and the injection layer or the first tunnel barrier layer and the quantum well. The thin semiconductor layer has a valence band with an energy level lower than the valence band of the first tunnel barrier layer so as to prevent minority carriers from travelling toward the injection layer.

摘要翻译： 一种谐振隧道二极管，其具有夹在第一和第二隧道势垒层之间的量子阱以及夹在注入层和集电极层之间的量子阱和隧道势垒层。 该改进包括夹在第一隧道势垒层和注入层之间的相对薄的半导体材料层或第一隧道势垒层和量子阱。 薄半导体层具有能级低于第一隧道势垒层的价带的价带，以防止少数载流子朝向注入层行进。

公开(公告)号：US5940319A

公开(公告)日：1999-08-17

申请号：US144686

申请日：1998-08-31

申请人： Mark Durlam ,  Gloria Kerszykowski ,  Jon Slaughter ,  Theodore Zhu ,  Eugene Chen ,  Saied N. Tehrani ,  Kelly W. Kyler

发明人： Mark Durlam ,  Gloria Kerszykowski ,  Jon Slaughter ,  Theodore Zhu ,  Eugene Chen ,  Saied N. Tehrani ,  Kelly W. Kyler

IPC分类号： G11C11/15 ,  H01L21/8246 ,  H01L27/22 ,  G11C11/14

CPC分类号： H01L27/228 ,  B82Y10/00 ,  G11C11/15 ,  H01L27/224

摘要： An improved and novel MRAM device with magnetic memory elements and circuitry for controlling magnetic memory elements is provided. The circuitry, for example, transistor (12a) having a gate (17a), a drain (18) and a source (16a) is integrated on a substrate (11) and coupled to a magnetic memory element (43) on the circuitry through a plug conductor (19a) and a conductor line (45). The circuitry is fabricated first under the CMOS process and then magnetic memory elements (43, 44). Digit line (29) and bit line (48) are placed under and on top of magnetic memory element (43), respectively, and enabled to access magnetic memory element (43). These lines are enclosed by a high permeability layer (31, 56, 58) excluding a surface facing magnetic memory element (43), which shields and focuses a magnetic field toward magnetic memory element (43).

摘要翻译： 提供了一种具有磁存储器元件和用于控制磁存储元件的电路的改进和新颖的MRAM器件。 电路，例如具有栅极（17a），漏极（18）和源极（16a）的晶体管（12a）集成在衬底（11）上并且耦合到电路上的磁存储元件（43），通过 插头导体（19a）和导线（45）。 首先在CMOS工艺之下制造电路，然后制造磁存储元件（43,44）。 数字线（29）和位线（48）分别放置在磁存储元件（43）的下面和顶部，并且能够访问磁存储元件（43）。 这些线被除了面向磁性存储元件（43）的高磁导率层（31,56,58）包围，磁性层屏蔽并将磁场聚焦到磁性存储元件（43）。

公开(公告)号：US5920500A

公开(公告)日：1999-07-06

申请号：US702781

申请日：1996-08-23

申请人： Saied N. Tehrani ,  Xiaodong T. Zhu ,  Eugene Chen ,  Herbert Goronkin

发明人： Saied N. Tehrani ,  Xiaodong T. Zhu ,  Eugene Chen ,  Herbert Goronkin

IPC分类号： G11C11/15 ,  G11C11/14 ,  H01L21/8246 ,  H01L27/105 ,  H01L27/22 ,  H01L43/08

CPC分类号： G11C11/14 ,  H01L27/222

摘要： A magnetic random access memory (10) has a plurality of stacked memory cells on semiconductor substrate (11), each cell basically having a portion of magnetic material (12), a word line (13), and sense line (14). Upper sense line (22) is electrically coupled to lower sense line (12) via conductor line (23) with ohmic contacts. In order to read and store states in the memory cell, lower and upper word lines (13, 18) are activated, thereby total magnetic field is applied to portion of magnetic material (11). This stacked memory structure allows magnetic random access memory (10) to integrate more memory cells on semiconductor substrate (11).

摘要翻译： 磁性随机存取存储器（10）在半导体衬底（11）上具有多个堆叠的存储单元，每个单元基本上具有一部分磁性材料（12），字线（13）和感测线（14）。 上感测线（22）经由导体线（23）与欧姆接触电耦合到下感测线（12）。 为了读取和存储存储单元中的状态，上下文字线（13,18）被激活，从而将总磁场施加到磁性材料（11）的一部分。 这种堆叠式存储器结构允许磁性随机存取存储器（10）将更多的存储器单元集成在半导体衬底（11）上。

公开(公告)号：US5838608A

公开(公告)日：1998-11-17

申请号：US874436

申请日：1997-06-16

申请人： Theodore Zhu ,  Saied N. Tehrani

发明人： Theodore Zhu ,  Saied N. Tehrani

IPC分类号： G11C11/15

CPC分类号： G11C11/15

摘要： A new magnetic random access memory (MRAM) unit (30) is provided suitable for fabricating a MRAM device (20). The MRAM cell includes a magnetic storage element (32) and a current control element (33), for example, a diode, connected to the magnetic storage element in series to control a current in the magnetic storage element. The magnetic storage element has two magnetoresistive layers (36,38) separated by a non-magnetic layer (37), for example, aluminum oxide (Al.sub.2 O.sub.3). The diode allows a current to flow in only an MRAM cell activated by a column line and a row line.

摘要翻译： 提供了适合于制造MRAM装置（20）的新的磁性随机存取存储器（MRAM）单元（30）。 MRAM单元包括串联连接到磁存储元件的磁存储元件（32）和电流控制元件（33），例如二极管，以控制磁存储元件中的电流。 磁存储元件具有由非磁性层（37）分隔的两个磁阻层（36,38），例如氧化铝（Al 2 O 3）。 二极管允许电流仅流过由列线和行线激活的MRAM单元。

公开(公告)号：US5838607A

公开(公告)日：1998-11-17

申请号：US723162

申请日：1996-09-25

申请人： Xiaodong T. Zhu ,  Saied N. Tehrani ,  Eugene Chen ,  Mark Durlam

发明人： Xiaodong T. Zhu ,  Saied N. Tehrani ,  Eugene Chen ,  Mark Durlam

IPC分类号： G11C11/16 ,  G11C11/56 ,  H01F10/32 ,  G11C11/00 ,  H01L29/161

CPC分类号： B82Y25/00 ,  G11C11/16 ,  G11C11/5607 ,  H01F10/324

摘要： Spin polarized apparatus includes a spin polarizing section of magnetic material with an electron input port and a polarized electron port and a transport section of magnetic material with a polarized electron input port electrically coupled to the polarized electron port of the polarizing section and an electron output port. Electrons traversing the polarizing section all have similar spin directions at the output dependent upon the magnetization direction of the polarizing section. Electrons traversing the transport section all have spins in a first direction at the output. The cell has a low resistance when the magnetization direction of the polarizing section is in the first direction (electrons entering the transport section all have spins in the first direction) and a high resistance when the magnetization direction is in an opposite direction (electrons entering the transport section all have spins in the opposite direction).

摘要翻译： 旋转极化装置包括具有电子输入端口和偏振电子端口的磁性材料的自旋极化部分和具有电耦合到偏振部分的偏振电子端口的偏振电子输入端口的磁性材料的传送部分和电子输出端口 。 穿过偏振部分的电子根据偏振部分的磁化方向在输出处都具有相似的自旋方向。 穿过传送部分的电子都在输出端处沿着第一方向旋转。 当偏振片的磁化方向处于第一方向（进入输送部分的电子全部在第一方向上具有自旋）时，电池具有低电阻，当磁化方向为相反方向（电子进入 运输部分都沿相反方向旋转）。

公开(公告)号：US5818316A

公开(公告)日：1998-10-06

申请号：US892641

申请日：1997-07-15

申请人： Jun Shen ,  Saied N. Tehrani ,  Eugene Chen

发明人： Jun Shen ,  Saied N. Tehrani ,  Eugene Chen

IPC分类号： G11C11/50 ,  G11C23/00 ,  H01H51/22

CPC分类号： G11C11/50 ,  G11C23/00

摘要： A nonvolatile programmable switch includes first and second magnetizable conductors having first and second ends, respectively, each of which is a north or south pole. The ends are mounted for relative movement between a first position in which they are in contact and a second position in which they are insulated from each other. The first conductor is permanently magnetized and the second conductor is switchable in response to a magnetic field applied thereto. Programming means are associated with the second conductor for switchably magnetizing the second conductor so that the second end is alternatively a north or south pole. The first and second ends are held in the first position by magnetic attraction and in the second position by magnetic repulsion.

摘要翻译： 非易失性可编程开关包括分别具有第一和第二端的第一和第二可磁化导体，其中每一个是北极或南极。 端部被安装成在它们接触的第一位置和彼此绝缘的第二位置之间进行相对运动。 第一导体被永久磁化，并且第二导体响应于施加到其上的磁场而可切换。 编程装置与第二导体相关联，用于可切换地磁化第二导体，使得第二端可选地是北极或南极。 第一和第二端通过磁吸引力保持在第一位置，并且在第二位置通过磁力排斥保持。