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公开(公告)号：US20090010296A1
公开(公告)日：2009-01-08
申请号：US11979695
申请日：2007-11-07
CPC分类号： G02B6/4204 , H01S5/02284
摘要： An optical transceiver module and a method for manufacturing thereof, which are adopted for providing a reduced manufacturing cost and an improved signal quality, are achieved. The optical transceiver module 1 includes a VCSEL 13 that is capable of emitting light; a thermoplastic resin layer 22 provided on the VCSEL 13 and transparent to the above-described light; a copper foil 21, provided in the thermoplastic resin layer 22 and the resin layer, and having an opening 21a that is transparent to light; a dimple 22a, provided in a surface of the thermoplastic resin layer 22 in a side opposite to the VCSEL 13; and a lens provided in the dimple. The dimple 22a is located above the opening 21a.
摘要翻译： 实现了用于提供降低的制造成本和改善的信号质量的光收发器模块及其制造方法。 光收发器模块1包括能够发光的VCSEL 13; 设置在VCSEL 13上且对上述光透明的热塑性树脂层22; 设置在热塑性树脂层22和树脂层中的铜箔21，具有对光透明的开口部21a; 在与VCSEL 13相反的一侧设置在热塑性树脂层22的表面的凹部22a; 以及设置在凹坑中的透镜。 凹坑22a位于开口21a的上方。
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公开(公告)号：US07230328B2
公开(公告)日：2007-06-12
申请号：US10528160
申请日：2003-11-19
IPC分类号： H01L23/02
CPC分类号： H01L23/3114 , H01L23/5387 , H01L24/97 , H01L25/105 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/73253 , H01L2224/97 , H01L2225/06517 , H01L2225/1023 , H01L2225/1041 , H01L2225/1058 , H01L2924/01057 , H01L2924/01078 , H01L2924/01079 , H01L2924/01322 , H01L2924/15311 , H01L2924/181 , H01L2224/81 , H01L2924/00
摘要： A semiconductor package has a semiconductor device chip and a flexible substrate having a thermoplastic insulating resin layer. An electrode provided on the flexible substrate is connected to a predetermined electrode of the semiconductor device chip and sealed by the thermoplastic insulating resin layer. The flexible substrate is bent and provided with electrodes on the electrode-bearing and other surfaces. The flexible substrate has multi-layered wirings. Grooves or thin layer portions having a different number of wiring layers are formed at bends of the flexible substrate or regions including the bends, thereby creating a cavity at a portion in which a semiconductor device is packaged. Then, the flexible substrate is bent at predetermined positions to form a semiconductor package which does not depend on the outer dimensions of the semiconductor device chip.
摘要翻译： 半导体封装具有半导体器件芯片和具有热塑性绝缘树脂层的柔性基板。 设置在柔性基板上的电极连接到半导体器件芯片的预定电极并被热塑性绝缘树脂层密封。 柔性基板弯曲并在电极轴承和其它表面上设置电极。 柔性基板具有多层布线。 在柔性基板或弯曲部的区域的弯曲处形成具有不同数量的布线层的沟槽或薄层部分，从而在半导体器件被封装的部分形成空腔。 然后，柔性基板在预定位置弯曲以形成不依赖于半导体器件芯片的外部尺寸的半导体封装。
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43.发明授权公开(公告)号：US07136541B2
公开(公告)日：2006-11-14
申请号：US10273781
申请日：2002-10-18
申请人： Huipin Zhang , Cheung Auyeung , Takao Yamazaki
发明人： Huipin Zhang , Cheung Auyeung , Takao Yamazaki
IPC分类号： G06K9/32
CPC分类号： G06T3/403
摘要： A method of generating a value for a missing pixel “x” by determining a “least harmful” local edge direction between pixels, or sub-pixels, on substantially opposing sides of the missing pixel, and interpolating the difference to arrive at a value for pixel “x”. The method involves generating sub-pixel values for locations within neighboring pixels, the sub-pixels may comprise half-pixels, quarter-pixels, three-quarter pixels, and so forth, wherein any fractional pixel quantity may be created. Absolute difference values are calculated between neighboring pixels, or sub-pixel values, to determine a least harmful local edge direction along which a value is generated for pixel “x” by interpolation.
摘要翻译： 通过在缺失像素的基本相对的侧面上确定像素或子像素之间的“最不利的”局部边缘方向来产生缺失像素“x”的值的方法，并且内插差值以得到 像素“x”。 该方法涉及为相邻像素内的位置生成子像素值，子像素可以包括半像素，四分之一像素，四分之三像素等，其中可以创建任何分数像素数量。 在相邻像素或子像素值之间计算绝对差值，以确定通过插值为像素“x”生成值的最不利的局部边缘方向。
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公开(公告)号：US06515324B2
公开(公告)日：2003-02-04
申请号：US09942817
申请日：2001-08-30
申请人： Akinobu Shibuya , Shintaro Yamamichi , Toru Mori , Takao Yamazaki , Yuzo Shimada
发明人： Akinobu Shibuya , Shintaro Yamamichi , Toru Mori , Takao Yamazaki , Yuzo Shimada
IPC分类号： H01L27178
CPC分类号： H01L23/49827 , H01L23/49822 , H01L2924/0002 , H01L2924/09701 , H01L2924/3011 , H01L2924/00
摘要： A capacitor has a lower electrode, a dielectric thin film, an upper electrode, and an insulation cover layer formed on an insulation substrate made of an organic film or a ceramic material, and through holes formed at positions corresponding to input and output pads of a semiconductor element or to input and output terminals of a semiconductor package, with electrodes for connection to input and output pads of a semiconductor element or to input and output terminals of a semiconductor package provided within through holes. In a method for mounting the capacitor, the capacitor is interposed between a flip-chip connected semiconductor element and a mounting substrate.
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45.发明授权Conductive rubber composition and manufacturing method and conductive rubber member thereof 失效导电橡胶组合物及其制造方法和导电橡胶部件公开(公告)号：US06458883B1
公开(公告)日：2002-10-01
申请号：US09480793
申请日：2000-01-11
IPC分类号： C08K304
CPC分类号： C08L101/12 , C08K3/04 , C08L9/02 , C08L9/04 , C08L9/08 , C08L19/003 , C08L21/00 , C08L2666/08
摘要： The present invention provides a conductive rubber composition with a low hardness and low distortion, and exhibiting less variations in volume specific resistance value and less dependence on environment, a manufacturing method thereof, and further, a conductive rubber member using the same. The conductive rubber composition of the present invention contains a particulate polymer (A1, crosslinked particulate polymer, and the like), an uncrosslinked polymer (A2), and a conductivity imparting agent (B). The particulate polymer (A1) is a nonpolar polymer (SBR, and the like), the uncrosslinked (A2) is a polar polymer (NBR, and the like), and the more conductivity imparting agent (B) exists in the uncrosslinked polymer than in the crosslinked particulate polymer. This composition can be obtained by starting the kneading of the above-described respective compounds at such a temperature (T C.) that the Mooney viscosity of the uncrosslinked polymer is equal or less than the Mooney viscosity of particulate polymer. The particulate polymer (A1) preferably has an average particle diameter of 25 mm or less, and a Duro A hardness of 45 to 80. The conductive rubber member, according to the present invention, can be obtained by molding the above-described conductive rubber composition and then vulcanizing it.
摘要翻译： 本发明提供一种导电性橡胶组合物，其硬度低，变形小，体积比电阻值的变化小，对环境的依赖性小，其制造方法以及使用该导电性橡胶组合物的导电性橡胶构件。 本发明的导电性橡胶组合物含有粒状聚合物（A1，交联粒状聚合物等），未交联聚合物（A2）和导电性赋予剂（B）。 颗粒聚合物（A1）是非极性聚合物（SBR等），未交联的（A2）是极性聚合物（NBR等），并且在未交联的聚合物中存在较多的导电性赋予剂（B） 在交联的颗粒聚合物中。 可以通过在未交联聚合物的门尼粘度等于或小于颗粒状聚合物的门尼粘度的温度（T℃）下开始捏合上述各种化合物来获得该组合物。 粒状聚合物（A1）的平均粒径优选为25mm以下，Duro A硬度为45〜80。本发明的导电性橡胶构件可以通过将上述导电性橡胶 然后硫化。
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公开(公告)号：US5850268A
公开(公告)日：1998-12-15
申请号：US834562
申请日：1997-04-07
CPC分类号： G06F15/8015 , H04N5/14
摘要： To provide a parallel processor apparatus which can perform processing with a good efficiency on signals comprised of data of different lengths. A parallel processor configured by a serial connection of a first parallel processor and a second parallel processor having n number of individual processors and (m-n) number of individual processors. For signals comprised of data of a length, serving as the unit of processing, of m or less and n or more, these parallel processors are connected and used as a single parallel processor apparatus which performs processing equivalent to that by a conventional parallel processor apparatus. For signals comprised of data of a length of n or less, these parallel processors are independently used to perform pipeline processing and thereby perform two times the amount of processing of that performed by a conventional parallel processor apparatus.
摘要翻译： 提供一种能够对由不同长度的数据组成的信号具有良好效率的处理的并行处理器装置。 由第一并行处理器和具有n个单独处理器和（m-n个）个别处理器的数量的第一并行处理器和第二并行处理器的串行连接器配置的并行处理器。 对于作为处理单位的长度为m以下且n以上的数据构成的信号，这些并行处理器被连接并用作执行与常规并行处理器装置相同的处理的单个并行处理器装置 。 对于由长度为n以下的数据构成的信号，这些并行处理器独立地用于执行流水线处理，从而执行由常规并行处理器装置执行的处理量的两倍。
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公开(公告)号：US5521855A
公开(公告)日：1996-05-28
申请号：US292589
申请日：1994-08-18
申请人： Takao Yamazaki
发明人： Takao Yamazaki
CPC分类号： G06F7/5338 , G06F2207/3884 , G06F7/49963 , G06F7/49994
摘要： A multiplying circuit for forming a partial product in accordance with a Booth's algorithm, performing a sign correcting process of the partial product, and adding the partial product so as to multiply a multiplicand by a multiplier, includes: initial value setting circuit for setting an initial value and for supplying data necessary for the sign correcting process and adding circuit for adding the partial product and data supplied from a preceding circuit. The initial value setting circuit is adapted to output the data necessary for the sign correcting process in a format where the data accords with at least a part of a data input format of the adding circuit. In the adding circuit at least a part of a data input format of data thereof is the same as at least a part of a data output format thereof. According to the multiplying circuit, in the initial value setting circuit, data necessary for a sign correcting process, that is, calculating the complement of 2, of a partial product is converted into a format compatible with a data input format of an adding circuit. The resultant data is supplied to the adding circuit.
摘要翻译： 一种用于根据布斯算法形成部分乘积的乘法电路，执行部分乘积的符号校正处理，并且将所述部分乘积相加以乘法乘法乘法器，包括：初始值设置电路，用于设置初始值 并且用于提供用于符号校正处理所需的数据和用于添加从先前电路提供的部分积和数据的加法电路。 初始值设定电路适于以符合加法电路的数据输入格式的至少一部分的格式输出符号校正处理所必需的数据。 在加法电路中，其数据的数据输入格式的至少一部分与其数据输出格式的至少一部分相同。 根据乘法电路，在初始值设定电路中，部分乘积的符号校正处理所需的数据，即2的补码的数据被转换成与加法电路的数据输入格式兼容的格式。 所得到的数据被提供给加法电路。
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48.发明授权
公开(公告)号：US5145255A
公开(公告)日：1992-09-08
申请号：US627880
申请日：1990-12-13
申请人： Takafumi Shimada , Hiroaki Ogasawara , Hidetaro Mori , Setsuo Omoto , Kazuto Kobayashi , Takao Yamazaki
发明人： Takafumi Shimada , Hiroaki Ogasawara , Hidetaro Mori , Setsuo Omoto , Kazuto Kobayashi , Takao Yamazaki
CPC分类号： B01F7/0025 , B01F7/00316 , B01F7/165 , B01J19/18 , B01J2219/00081 , B01J2219/00083 , B01J2219/00094 , B01J2219/00164 , B01J2219/185
摘要： In order to improve mixing efficiency of highly viscous fluid, while structural simplicity being maintained, two types of stirring impellers are employed in a single stirring apparatus. One of such stirring impellers is a large flat impeller and the other is a slanted or screw-shaped impeller to cause an up-and-down flow. This principle is further utilized in a stirring tower type polymerization reaction apparatus which has an array of mixing areas, each of which corresponds to the stirring apparatus above, and partitions between the mixing areas. The partitions are disposed so that the temperature of reaction can be controlled easily. Undesirable effects such as "dead space", space in which flow is insufficient, and the attachment of gelled material to the rotational shaft can be avoided while rather obvious, but no less important, advantages of efficient and uniform mixing, etc., are secured.
摘要翻译： 为了提高高粘性流体的混合效率，在保持结构简单性的同时，在单个搅拌装置中使用两种搅拌叶轮。 这种搅拌叶轮中的一个是大的扁平叶轮，另一个是倾斜的或螺旋形的叶轮，以引起上下流动。 该原理进一步用于具有混合区域阵列的搅拌塔型聚合反应装置，每个混合区域对应于上述搅拌装置，并在混合区域之间分隔。 这些隔板被设置成能够容易地控制反应温度。 可以避免诸如“死空间”，流动不足的空间和凝胶材料附着到旋转轴的不期望的效果，同时确保了有效和均匀混合等的显而易见的但重要的优点 。
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公开(公告)号：US5134579A
公开(公告)日：1992-07-28
申请号：US578139
申请日：1990-09-06
申请人： Mitsuharu Oki , Takao Yamazaki
发明人： Mitsuharu Oki , Takao Yamazaki
CPC分类号： G06F7/506 , G06F7/5095
摘要： A digital adder circuit has a plurality of adders for adding binary numbers. A carry calculator calculates carry data to a higher bit on the basis of added results of the plurality of adders, and a carry corrector adds the carry data to the added results of the plurality of adders. An accumulator accumulates a plurality of binary numbers sequentially supplied thereto. The accumulator includes more than two adders of a plurality of bits, a delay register for delaying each of outputs and each of carry outputs of the adders by a predetermined time. The binary numbers sequentially supplied thereto and a delayed output of the delay register are sequentially added by the adders, and a carry corrector supplied with an accumulated result expressed as redundant by each of outputs of the adders corrects each of the outputs by each of the carry outputs to generate an accumulated added result having no redundancy. Thus, the digital adder circuit and the accumulator can perform calculations at high speed without substantially increasing the size of the circuit.
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公开(公告)号：US4862403A
公开(公告)日：1989-08-29
申请号：US797845
申请日：1985-11-14
申请人： Seiichiro Iwase , Takao Yamazaki
发明人： Seiichiro Iwase , Takao Yamazaki
CPC分类号： H03H17/0202
摘要： A digital filter has an input terminal provided with an input digital signal. A delay circuit connected to the input terminal produces a plurality of delayed digital signals each having a different delay time with respect to the input digital signal. A first circuit adds the input digital signal and/or the plurality of delayed digital signals to one or more digital coefficient signals of the same value so as to produce one or more added digital signals. A circuit multiplies the one or more respective digital coefficient signals by the one or more added digital signals and/or one or more of the plurality of delayed digital signals to produce a plurality of multiplied digital signals. A second circuit adds the plurality of multiplied digital signals to produce an output digital signal, and a circuit connected between the delay circuit and a multiplying circuit increases the one or more added digital signals and/or the one or more of the plurality of delayed digital signals by one or more predetermined numbers of times, whereby the one or more respective digital coefficient signals have inversely proportional values corresponding to the one or more predetermined numbers of times of the values of the one or more added digital signals and/or the one or more of the plurality of delayed digital signals.
摘要翻译： 数字滤波器具有设置有输入数字信号的输入端。 连接到输入端的延迟电路产生多个相对于输入数字信号具有不同延迟时间的延迟数字信号。 第一电路将输入数字信号和/或多个延迟的数字信号添加到相同值的一个或多个数字系数信号，以便产生一个或多个相加的数字信号。 一个电路将一个或多个相应的数字系数信号乘以一个或多个相加的数字信号和/或多个延迟的数字信号中的一个或多个，以产生多个相乘的数字信号。 第二电路将多个相乘的数字信号相加以产生输出数字信号，并且连接在延迟电路和乘法电路之间的电路增加一个或多个相加的数字信号和/或多个延迟数字信号中的一个或多个 一个或多个预定次数的信号，由此一个或多个相应的数字系数信号具有对应于一个或多个相加数字信号的值的一个或多个预定次数的反比例值和/或一个或多个 更多的多个延迟数字信号。
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