Bitline settling speed enhancement
    41.
    发明授权

    公开(公告)号:US10834351B2

    公开(公告)日:2020-11-10

    申请号:US16199887

    申请日:2018-11-26

    Abstract: An image sensor includes pixel circuitry with a photodiode to receive light and output a pixel signal. The image sensor also includes readout circuitry with a first sample and hold transistor coupled to the pixel circuitry, and a first capacitor coupled to the first sample and hold transistor to receive the pixel signal. A second sample and hold transistor is coupled to the pixel circuitry, and a second capacitor is coupled to the second sample and hold transistor to receive the pixel signal. A first output switch is coupled to output the pixel signal from the first capacitor, and a second output switch is coupled to output the pixel signal from the second capacitor. A boost transistor is coupled to connect the first output switch and the second output switch when the boost transistor is turned on.

    BITLINE SETTLING SPEED ENHANCEMENT
    42.
    发明申请

    公开(公告)号:US20200169682A1

    公开(公告)日:2020-05-28

    申请号:US16199887

    申请日:2018-11-26

    Abstract: An image sensor includes pixel circuitry with a photodiode to receive light and output a pixel signal. The image sensor also includes readout circuitry with a first sample and hold transistor coupled to the pixel circuitry, and a first capacitor coupled to the first sample and hold transistor to receive the pixel signal. A second sample and hold transistor is coupled to the pixel circuitry, and a second capacitor is coupled to the second sample and hold transistor to receive the pixel signal. A first output switch is coupled to output the pixel signal from the first capacitor, and a second output switch is coupled to output the pixel signal from the second capacitor. A boost transistor is coupled to connect the first output switch and the second output switch when the boost transistor is turned on.

    Feedback capacitor and method for readout of hybrid bonded image sensors

    公开(公告)号:US10263031B2

    公开(公告)日:2019-04-16

    申请号:US15421911

    申请日:2017-02-01

    Abstract: A hybrid-bonded image sensor has a photodiode die with multiple macrocells; each macrocell has at least one photodiode and a coupling region. The coupling regions couple to a coupling region of a macrocell unit of a supporting circuitry die where they feed an input of an amplifier and a feedback capacitor. The feedback capacitor also couples to output of the amplifier, and the amplifier inverts between the input and the output. The method includes resetting a photodiode of the photodiode die; coupling signal from photodiode through the bond point to the supporting circuitry die to a feedback capacitor and to an input of the amplifier, the feedback capacitor also coupled to an inverting output of the amplifier; and amplifying the signal with the amplifier, where a capacitance of the feedback capacitor determines a gain of the amplifier.

    Imaging sensor with amplifier having variable bias and increased output signal range

    公开(公告)号:US09961292B1

    公开(公告)日:2018-05-01

    申请号:US15420531

    申请日:2017-01-31

    CPC classification number: H03F3/082 H03F1/0261 H03F1/223 H04N5/355 H04N5/3745

    Abstract: A pixel circuit includes a photodiode, and a transfer transistor coupled to the photodiode. A floating diffusion is coupled to the transfer transistor coupled to transfer image charge from the photodiode to the floating diffusion. An amplifier circuit includes an input coupled to the floating diffusion, an output coupled to generate an image data signal of the pixel circuit, and a variable bias terminal coupled to receive a variable bias signal. A reset switch is coupled between the output and input of the amplifier circuit to reset the amplifier circuit in response to a reset signal. A variable bias generator circuit is coupled to generate the variable bias signal in response to a reset signal to transition the variable bias signal from a first bias signal value to a second bias signal value in response to a transition of the reset signal from an active state to an inactive state.

    Entrenched transfer gate
    46.
    发明授权
    Entrenched transfer gate 有权
    固定的转移门

    公开(公告)号:US09570507B2

    公开(公告)日:2017-02-14

    申请号:US13897189

    申请日:2013-05-17

    Abstract: An image sensor pixel includes a semiconductor layer, a photosensitive region to accumulate photo-generated charge, a floating node, a trench, and an entrenched transfer gate. The photosensitive region and the trench are disposed within the semiconductor layer. The trench extends into the semiconductor layer between the photosensitive region and the floating node and the entrenched transfer gate is disposed within the trench to control transfer of the photo-generated charge from the photosensitive region to the floating node.

    Abstract translation: 图像传感器像素包括半导体层,用于积累光电荷的光敏区域,浮动节点,沟槽和根深蒂的传输门。 感光区域和沟槽设置在半导体层内。 沟槽延伸到光敏区域和浮动节点之间的半导体层中,并且固定的传输栅极设置在沟槽内,以控制光生电荷从感光区域到浮动节点的转移。

    Negative biased substrate for pixels in stacked image sensors
    47.
    发明授权
    Negative biased substrate for pixels in stacked image sensors 有权
    堆叠图像传感器中像素的负偏置衬底

    公开(公告)号:US09344658B2

    公开(公告)日:2016-05-17

    申请号:US14448154

    申请日:2014-07-31

    Abstract: A pixel cell includes a photodiode disposed within a first semiconductor chip for accumulating an image charge in response to light incident upon the photodiode. A transfer transistor is disposed within the first semiconductor chip and coupled to the photodiode to transfer the image charge from the photodiode. A bias voltage generation circuit disposed within a second semiconductor chip for generating a bias voltage. The bias voltage generation circuit is coupled to the first semiconductor chip to bias the photodiode with the bias voltage. The bias voltage is negative with respect to a ground voltage of the second semiconductor chip. A floating diffusion is disposed within the second semiconductor chip. The transfer transistor is coupled to transfer the image charge from the photodiode on the first semiconductor chip to the floating diffusion on the second semiconductor chip.

    Abstract translation: 像素单元包括设置在第一半导体芯片内的光电二极管,用于响应入射在光电二极管上的光累积图像电荷。 传输晶体管设置在第一半导体芯片内并耦合到光电二极管以从光电二极管传输图像电荷。 偏置电压产生电路,设置在第二半导体芯片内,用于产生偏置电压。 偏置电压产生电路耦合到第一半导体芯片以偏置偏压的光电二极管。 偏置电压相对于第二半导体芯片的接地电压为负。 浮置扩散部设置在第二半导体芯片内。 传输晶体管被耦合以将图像电荷从第一半导体芯片上的光电二极管转移到第二半导体芯片上的浮动扩散。

    Image sensor having NMOS source follower with P-type doping in polysilicon gate
    48.
    发明授权
    Image sensor having NMOS source follower with P-type doping in polysilicon gate 有权
    具有多晶硅栅P型掺杂的NMOS源极跟随器的图像传感器

    公开(公告)号:US09319613B2

    公开(公告)日:2016-04-19

    申请号:US14097779

    申请日:2013-12-05

    Inventor: Tiejun Dai

    Abstract: An image sensor array has a tiling unit comprising a source follower stage coupled to buffer signals from a photodiode when the unit is read onto a sense line, the source follower stage differs from conventional sensor arrays because it uses an N-channel transistor having a P-doped polysilicon gate. In embodiments, other transistors of the array have conventional N-channel transistors with N-doped polysilicon gates.

    Abstract translation: 图像传感器阵列具有平铺单元,其包括源单元级耦合到源单元读取到感测线上时来自光电二极管的信号,源极跟随器级与常规传感器阵列不同,因为它使用具有P 掺杂多晶硅栅极。 在实施例中,阵列的其它晶体管具有具有N掺杂多晶硅栅极的常规N沟道晶体管。

    PROGRAMMABLE CURRENT SOURCE FOR A TIME OF FLIGHT 3D IMAGE SENSOR
    49.
    发明申请
    PROGRAMMABLE CURRENT SOURCE FOR A TIME OF FLIGHT 3D IMAGE SENSOR 有权
    飞行3D图像传感器时间可编程电流源

    公开(公告)号:US20160054447A1

    公开(公告)日:2016-02-25

    申请号:US14464453

    申请日:2014-08-20

    CPC classification number: G01S17/89 G01S7/4863 G01S17/10

    Abstract: A programmable current source for use with a time of flight pixel cell includes a first transistor. A current through the first transistor is responsive to a gate-source voltage of the first transistor. A current control circuit is coupled to the first transistor and coupled to a reference current source to selectively couple a reference current of the reference current source through the first transistor during a sample operation. A sample and hold circuit is coupled to the first transistor to sample a gate-source voltage of the first transistor during the sample operation. The sample and hold circuit is coupled to hold the gate-source voltage during a hold operation after the sample operation substantially equal to the gate-source voltage during the sample operation. A hold current through the first transistor during the hold operation is substantially equal to the reference current.

    Abstract translation: 与飞行时间像素单元一起使用的可编程电流源包括第一晶体管。 通过第一晶体管的电流响应于第一晶体管的栅极 - 源极电压。 电流控制电路耦合到第一晶体管并耦合到参考电流源,以在采样操作期间选择性地将参考电流源的参考电流耦合通过第一晶体管。 采样和保持电路耦合到第一晶体管以在采样操作期间对第一晶体管的栅源电压进行采样。 在采样操作期间,在采样操作期间基本上等于栅极 - 源极电压的保持操作期间,采样和保持电路被耦合以保持栅极 - 源极电压。 在保持操作期间通过第一晶体管的保持电流基本上等于参考电流。

    High dynamic range image sensor read out architecture
    50.
    发明授权
    High dynamic range image sensor read out architecture 有权
    高动态范围图像传感器读出架构

    公开(公告)号:US09118851B2

    公开(公告)日:2015-08-25

    申请号:US14086832

    申请日:2013-11-21

    Inventor: Tiejun Dai Jian Guo

    Abstract: A method of controlling a pixel array includes reading out image data from pixel cells of a row i of the pixel array with second transfer control signals that are coupled to be received by transfer transistors included in the pixels cells of the row of the pixel array that is being read out. Exposure times for pixel cells are independently controlled in other rows of the pixel array that are not being read out with first transfer control signals coupled to be received by transfer transistors included in the pixel cells in the other rows of the pixel array that are not being read out while the image data is read out from the pixel cells of row i of the pixel array.

    Abstract translation: 一种控制像素阵列的方法包括:通过第二传输控制信号从像素阵列的行i的像素单元读出图像数据,该传输控制信号被耦合以由像素阵列行的像素单元中包括的传输晶体管接收, 正在读出。 像素单元的曝光时间在像素阵列的其他行中被独立地控制,其不被第一传输控制信号读出,第一传输控制信号被耦合以由像素阵列的其他行中不存在的像素单元中包含的传输晶体管接收 在从像素阵列的行i的像素单元读出图像数据的同时读出。

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