SEMICONDUCTOR DEVICE
    41.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号:US20150041801A1

    公开(公告)日:2015-02-12

    申请号:US14447875

    申请日:2014-07-31

    Abstract: A semiconductor device includes a semiconductor layer, a gate electrode overlapping with the semiconductor layer, a first gate insulating layer between the semiconductor layer and the gate electrode, and a second gate insulating layer between the first gate insulating layer and the gate electrode. The first gate insulating layer includes an oxide in which the nitrogen content is lower than or equal to 5 at. %, and the second gate insulating layer includes charge trap states.

    Abstract translation: 半导体器件包括半导体层,与半导体层重叠的栅极电极,在半导体层和栅电极之间的第一栅极绝缘层,以及位于第一栅极绝缘层和栅电极之间的第二栅极绝缘层。 第一栅极绝缘层包括其中氮含量低于或等于5at的氧化物。 %,第二栅极绝缘层包括电荷陷阱状态。

    SEMICONDUCTOR DEVICE
    42.
    发明申请
    SEMICONDUCTOR DEVICE 审中-公开
    半导体器件

    公开(公告)号:US20140306221A1

    公开(公告)日:2014-10-16

    申请号:US14247676

    申请日:2014-04-08

    Abstract: The stability of a step of processing a wiring formed using copper, aluminum, gold, silver, molybdenum, or the like is increased. Moreover, the concentration of impurities in a semiconductor film is reduced. Moreover, the electrical characteristics of a semiconductor device are improved. In a transistor including an oxide semiconductor film, an oxide film in contact with the oxide semiconductor film, and a pair of conductive films being in contact with the oxide film and including copper, aluminum, gold, silver, molybdenum, or the like, the oxide film has a plurality of crystal parts and has c-axis alignment in the crystal parts, and the c-axes are aligned in a direction parallel to a normal vector of a top surface of the oxide semiconductor film or the oxide film.

    Abstract translation: 处理使用铜,铝,金,银,钼等形成的布线的步骤的稳定性增加。 此外,半导体膜中的杂质浓度降低。 此外,提高了半导体器件的电特性。 在包括氧化物半导体膜,与氧化物半导体膜接触的氧化物膜和与氧化膜接触并包括铜,铝,金,银,钼等的一对导电膜的晶体管中, 氧化物膜具有多个晶体部分,并且在晶体部分中具有c轴取向,并且c轴在与氧化物半导体膜或氧化物膜的顶表面的法向量平行的方向上排列。

    SEMICONDUCTOR DEVICE
    43.
    发明公开

    公开(公告)号:US20240314999A1

    公开(公告)日:2024-09-19

    申请号:US18596907

    申请日:2024-03-06

    CPC classification number: H10B12/00

    Abstract: A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a first transistor, a capacitor, and a second transistor stacked in this order. The first and second transistors each include a semiconductor layer, a first conductor over the semiconductor layer, a first insulator, and a second conductor over the first insulator. In each of the first and second transistors, a side surface of the semiconductor layer is aligned with a side surface of the first conductor; the semiconductor layer and the first conductor each have an opening; the first insulator is inside the opening; the first insulator has a depressed portion reflecting the shape of the opening; and a second conductor fills the depressed portion. The second conductor of the first transistor, one of a pair of electrodes of the capacitor, and the semiconductor layer of the second transistor are connected to each other.

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