公开(公告)号：US20200343281A1

公开(公告)日：2020-10-29

申请号：US16924579

申请日：2020-07-09

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wei Chuang Wu ,  Ching-Chun Wang ,  Dun-Nian Yaung ,  Feng-Chi Hung ,  Jen-Cheng Liu ,  Yen-Ting Chiang ,  Chun-Yuan Chen ,  Shen-Hui Hong

IPC: H01L27/146 ,  H04N5/369 ,  H04N5/374

Abstract: The present disclosure relates to a CMOS image sensor having a multiple deep trench isolation (MDTI) structure, and an associated method of formation. In some embodiments, the image sensor comprises a plurality of pixel regions disposed within a substrate and respectively comprising a photodiode configured to receive radiation that enters the substrate from a back-side. A boundary deep trench isolation (BDTI) structure is disposed at boundary regions of the pixel regions surrounding the photodiode. The BDTI structure extends from the back-side of the substrate to a first depth within the substrate. A multiple deep trench isolation (MDTI) structure is disposed at inner regions of the pixel regions overlying the photodiode. The MDTI structure extends from the back-side of the substrate to a second depth within the substrate smaller than the first depth. The MDTI structure is a continuous integral unit having a ring shape.

公开(公告)号：US10658410B2

公开(公告)日：2020-05-19

申请号：US16113066

申请日：2018-08-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Hung Cheng ,  Shyh-Fann Ting ,  Yen-Ting Chiang ,  Yeur-Luen Tu ,  Min-Ying Tsai

IPC: H01L27/146 ,  H04N5/365 ,  H04N5/378

Abstract: In some embodiments, a method is provided. The method includes forming a plurality of trenches in a semiconductor substrate, where the trenches extend into the semiconductor substrate from a back-side of the semiconductor substrate. An epitaxial layer comprising a dopant is formed on lower surfaces of the trenches, sidewalls of the trenches, and the back-side of the semiconductor substrate, where the dopant has a first doping type. The dopant is driven into the semiconductor substrate to form a first doped region having the first doping type along the epitaxial layer, where the first doped region separates a second doped region having a second doping type opposite the first doping type from the sidewalls of the trenches and from the back-side of the semiconductor substrate. A dielectric layer is formed over the back-side of the semiconductor substrate, where the dielectric layer fill the trenches to form back-side deep trench isolation structures.

公开(公告)号：US20190214414A1

公开(公告)日：2019-07-11

申请号：US16352108

申请日：2019-03-13

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chun-Yuan Chen ,  Ching-Chun Wang ,  Dun-Nian Yaung ,  Hsiao-Hui Tseng ,  Jhy-Jyi Sze ,  Shyh-Fann Ting ,  Tzu-Jui Wang ,  Yen-Ting Chiang ,  Yu-Jen Wang ,  Yuichiro Yamashita

IPC: H01L27/146

CPC classification number: H01L27/1463 ,  H01L27/14609 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/1464 ,  H01L27/14643 ,  H01L27/14689

Abstract: The present disclosure, in some embodiments, relates to a method of forming an image sensor. The method includes implanting a dopant into a substrate to form a doped region and implanting one or more additional dopants into the substrate to form an image sensing element between the doped region and a front-side of the substrate. The doped region directly contacts a boundary of the image sensing element that is furthest from the front-side of the substrate. The method further includes etching the substrate to form one or more trenches extending into a back-side of the substrate. The back-side of the substrate opposes the front-side of the substrate. The method further includes filling the one or more trenches with one or more dielectric materials to form isolation structures.

公开(公告)号：US20190096929A1

公开(公告)日：2019-03-28

申请号：US15795681

申请日：2017-10-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yen-Ting Chiang ,  Dun-Nian Yaung ,  Hsiao-Hui Tseng ,  Jen-Cheng Liu ,  Yu-Jen Wang ,  Chun-Yuan Chen

IPC: H01L27/146

Abstract: The present disclosure relates to a CMOS image sensor having a photodiode surrounded by a back-side deep trench isolation (BDTI) structure, and an associated method of formation. In some embodiments, a plurality of pixel regions is disposed within a substrate and respectively comprising a photodiode. A back-side deep trench isolation (BDTI) structure is disposed between adjacent pixel regions, extending from a back-side of the substrate to a position within the substrate. The BDTI structure comprises a doped layer lining a sidewall surface of a deep trench and a dielectric fill layer filling a remaining space of the deep trench. By forming the disclosed BDTI structure that functions as a doped well and an isolation structure, the implantation processes from a front-side of the substrate is simplified, and thus the exposure resolution, the full well capacity of the photodiode, and the pinned voltage is improved.

公开(公告)号：US10147752B2

公开(公告)日：2018-12-04

申请号：US15710419

申请日：2017-09-20

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chun-Yuan Chen ,  Ching-Chun Wang ,  Dun-Nian Yaung ,  Shyh-Fann Ting ,  Wei Chuang Wu ,  Yen-Ting Chiang ,  Kuan-Tsun Chen

IPC: H01L27/146

Abstract: In some embodiments, the present disclosure relates to a method of forming a back-side image (BSI) sensor. The method may be performed by forming an image sensing element within a substrate and forming a pixel-level memory node at a position within the substrate that is laterally offset from the image sensing element. A back-side of the substrate is etched to form one or more trenches that are laterally separated from the image sensing element by the substrate and that vertically overlie the pixel-level memory node. A reflective material is formed within the one or more trenches.

公开(公告)号：US10062720B2

公开(公告)日：2018-08-28

申请号：US15635673

申请日：2017-06-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yen-Ting Chiang ,  Ching-Chun Wang ,  Dun-Nian Yaung ,  Hsiao-Hui Tseng ,  Chih-Hui Huang ,  Shyh-Fann Ting ,  Shih Pei Chou ,  Sheng-Chan Li

IPC: H01L29/76 ,  H01L27/146

CPC classification number: H01L27/1463 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14636 ,  H01L27/1464 ,  H01L27/14685 ,  H01L27/14689

Abstract: The present disclosure relates to an integrated circuit, and an associated method of formation. In some embodiments, the integrated circuit comprises a deep trench grid disposed at a back side of a substrate. A passivation layer lines the deep trench grid within the substrate. The passivation layer includes a first high-k dielectric layer and a second high-k dielectric layer disposed over the first high-k dielectric layer. A first dielectric layer is disposed over the passivation layer, lining the deep trench grid and extending over an upper surface of the substrate. A second dielectric layer is disposed over the first dielectric layer and enclosing remaining spaces of the deep trench grid to form air-gaps at lower portions of the deep trench grid. The air-gaps are sealed by the first dielectric layer or the second dielectric layer below the upper surface of the substrate.

公开(公告)号：US09812483B2

公开(公告)日：2017-11-07

申请号：US15149497

申请日：2016-05-09

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chun-Yuan Chen ,  Ching-Chun Wang ,  Dun-Nian Yaung ,  Shyh-Fann Ting ,  Wei Chuang Wu ,  Yen-Ting Chiang ,  Kuan-Tsun Chen

IPC: H01L27/148 ,  H01L27/146

CPC classification number: H01L27/14629 ,  H01L27/14609 ,  H01L27/14621 ,  H01L27/14623 ,  H01L27/14627 ,  H01L27/14636 ,  H01L27/1464 ,  H01L27/14645 ,  H01L27/14685 ,  H01L27/14689

Abstract: In some embodiments, the present disclosure relates to a back-side image (BSI) sensor having a global shutter pixel with a reflective material that prevents contamination of a pixel-level memory node. In some embodiments, the BSI image sensor has an image sensing element arranged within a semiconductor substrate and a pixel-level memory node arranged within the semiconductor substrate at a location laterally offset from the image sensing element. A reflective material is also arranged within the semiconductor substrate at a location between the pixel-level memory node and a back-side of the semiconductor substrate. The reflective material has an aperture that overlies the image sensing element. The reflective material allows incident radiation to reach the image sensing element while preventing the incident radiation from reaching the pixel-level memory node, thereby preventing contamination of the pixel-level memory node.

公开(公告)号：US20170117315A1

公开(公告)日：2017-04-27

申请号：US15149497

申请日：2016-05-09

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chun-Yuan Chen ,  Ching-Chun Wang ,  Dun-Nian Yaung ,  Shyh-Fann Ting ,  Wei Chuang Wu ,  Yen-Ting Chiang ,  Kuan-Tsun Chen

IPC: H01L27/146

CPC classification number: H01L27/14629 ,  H01L27/14609 ,  H01L27/14621 ,  H01L27/14623 ,  H01L27/14627 ,  H01L27/14636 ,  H01L27/1464 ,  H01L27/14645 ,  H01L27/14685 ,  H01L27/14689

Abstract: In some embodiments, the present disclosure relates to a back-side image (BSI) sensor having a global shutter pixel with a reflective material that prevents contamination of a pixel-level memory node. In some embodiments, the BSI image sensor has an image sensing element arranged within a semiconductor substrate and a pixel-level memory node arranged within the semiconductor substrate at a location laterally offset from the image sensing element. A reflective material is also arranged within the semiconductor substrate at a location between the pixel-level memory node and a back-side of the semiconductor substrate. The reflective material has an aperture that overlies the image sensing element. The reflective material allows incident radiation to reach the image sensing element while preventing the incident radiation from reaching the pixel-level memory node, thereby preventing contamination of the pixel-level memory node.

公开(公告)号：US20160365378A1

公开(公告)日：2016-12-15

申请号：US14737979

申请日：2015-06-12

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yen-Ting Chiang ,  Ching-Chun Wang ,  Dun-Nian Yaung ,  Feng-Chi Hung ,  Hsiao-Hui Tseng ,  Ming-Tsong Wang ,  Shyh-Fann Ting ,  Wei Chuang Wu

IPC: H01L27/146

CPC classification number: H01L23/4824 ,  H01L21/76898 ,  H01L23/48 ,  H01L23/481 ,  H01L23/485 ,  H01L23/5283 ,  H01L27/1463 ,  H01L27/14636 ,  H01L27/1464 ,  H01L27/14643 ,  H01L27/14687 ,  H01L31/0224 ,  H01L31/05 ,  H01L31/0508

Abstract: A pad structure for a complementary metal-oxide-semiconductor (CMOS) image sensor is provided. A semiconductor substrate is arranged over a back end of line (BEOL) metallization stack, and comprises a scribe line opening. A buffer layer lines the scribe line opening. A conductive pad comprises a base region and a protruding region. The base region is arranged over the buffer layer in the scribe line opening, and the protruding region protrudes from the base region into the BEOL metallization stack. A dielectric layer fills the scribe line opening over the conductive pad, and is substantially flush with an upper surface of the semiconductor substrate. Further, a method for manufacturing the pad structure, as well as the CMOS image sensor, are provided.

Abstract translation: 提供了一种用于互补金属氧化物半导体（CMOS）图像传感器的焊盘结构。 半导体衬底布置在线的后端（BEOL）金属化叠层上，并且包括划线开口。 缓冲层划线划线开口。 导电焊盘包括基极区域和突出区域。 基部区域布置在划线开口中的缓冲层上方，并且突出区域从基部区域突出到BEOL金属化堆叠中。 电介质层填充导电焊盘上的划线开口，并且与半导体衬底的上表面基本齐平。 此外，提供了一种用于制造焊盘结构的方法以及CMOS图像传感器。