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41.发明授权公开(公告)号：US08569900B2
公开(公告)日：2013-10-29
申请号：US13383183
申请日：2009-07-20
IPC分类号： H01L23/58
CPC分类号： B81B1/00 , B81B2201/0214
摘要： A nanowire device includes a nanowire having differently functionalized segments. Each of the segments is configured to interact with a species to modulate the conductance of a segment. The nanowire is grown from a single catalyst and the segments include a first segment at a non-linear angle from a second segment.
摘要翻译： 纳米线器件包括具有不同功能化片段的纳米线。 每个片段被配置为与物种相互作用以调节片段的电导。 纳米线从单个催化剂生长，并且所述段包括与第二段非线性角度的第一段。
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公开(公告)号：US20110303890A1
公开(公告)日：2011-12-15
申请号：US13142504
申请日：2011-06-28
CPC分类号： H01L45/145 , H01L27/2472 , H01L45/08 , H01L45/1233 , H01L45/14 , H01L45/146 , H01L45/147 , H01L45/165
摘要： An electrically actuated device includes a first electrode and a second electrode crossing the first electrode at a non-zero angle, thereby forming a junction therebetween. A material is established on the first electrode and at the junction. At least a portion of the material is a matrix region. A current conduction channel extends substantially vertically between the first and second electrodes, and is defined in at least a portion of the material positioned at the junction. The current conduction channel has a controlled profile of dopants therein.
摘要翻译： 电驱动装置包括第一电极和第二电极，其以非零角度与第一电极交叉，从而在它们之间形成接合部。 在第一电极和接合处建立材料。 材料的至少一部分是矩阵区域。 电流传导通道在第一和第二电极之间基本垂直地延伸，并且限定在位于结处的材料的至少一部分中。 电流传导通道在其中具有受控的掺杂剂分布。
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公开(公告)号：US20110012222A1
公开(公告)日：2011-01-20
申请号：US12505377
申请日：2009-07-17
申请人： Hans S. Cho , Theodore I. Kamins
发明人： Hans S. Cho , Theodore I. Kamins
IPC分类号： H01L31/0352 , H01L21/268 , H01L31/0368 , H01L31/0376
CPC分类号： H01L21/268 , H01L31/02363 , H01L31/028 , H01L31/0296 , H01L31/0304 , H01L31/03046 , H01L31/0312 , H01L31/035281 , H01L31/03682 , H01L31/03685 , H01L31/07 , H01L31/072 , H01L31/075 , H01L31/1804 , H01L31/182 , H01L31/1872 , Y02E10/544 , Y02E10/545 , Y02E10/546 , Y02E10/547 , Y02E10/548 , Y02P70/521
摘要： A method of making a crystalline semiconductor structure provides a photonic device by employing low thermal budget annealing process. The method includes annealing a non-single crystal semiconductor film formed on a substrate to form a polycrystalline layer that includes a transition region adjacent to a surface of the film and a relatively thicker columnar region between the transition region and the substrate. The transition region includes small grains with random grain boundaries. The columnar region includes relatively larger columnar grains with substantially parallel grain boundaries that are substantially perpendicular to the substrate. The method further includes etching the surface to expose the columnar region having an irregular serrated surface.
摘要翻译： 制造晶体半导体结构的方法通过采用低热预算退火工艺提供光子器件。 该方法包括退火形成在衬底上的非单晶半导体膜以形成多晶层，该多晶层包括与膜的表面相邻的过渡区域和过渡区域与衬底之间相对较厚的柱状区域。 过渡区域包括具有随机晶界的小颗粒。 柱状区域包括具有基本上垂直于衬底的基本上平行的晶界的相对较大的柱状晶粒。 该方法还包括蚀刻表面以暴露具有不规则锯齿状表面的柱状区域。
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公开(公告)号：US20150076438A1
公开(公告)日：2015-03-19
申请号：US14396406
申请日：2012-07-31
申请人： Hans S. Cho , Janice H. Nickel , R. Stanley Williams , Jaesung Roh , Jinwon Park , Choi Hyejung , Moonsig Joo , Jiwon Moon , Changgoo Lee , Yongsun Sohn , Jeongtae Kim
发明人： Hans S. Cho , Janice H. Nickel , R. Stanley Williams , Jaesung Roh , Jinwon Park , Choi Hyejung , Moonsig Joo , Jiwon Moon , Changgoo Lee , Yongsun Sohn , Jeongtae Kim
IPC分类号： H01L45/00
CPC分类号： H01L45/1233 , H01L27/101 , H01L27/2463 , H01L45/08 , H01L45/124 , H01L45/1253 , H01L45/146 , H01L45/1641 , H01L45/1675 , H01L45/1691
摘要： Examples of the present disclosure include non-volatile resistive memory cells and methods of forming the same. An example of a non-volatile resistive memory cell includes a first portion of the non-volatile resistive memory cell formed as a vertically-extending structure on a first electrode, where the first portion comprises at least one memristive material across a width of the vertically-extending structure. The non-volatile resistive memory cell also includes a second portion formed as a vertically-extending memristive material structure on at least one sidewall of the first portion.
摘要翻译： 本公开的实例包括非易失性电阻存储器单元及其形成方法。 非易失性电阻性存储单元的示例包括在第一电极上形成为垂直延伸结构的非易失性电阻性存储单元的第一部分，其中第一部分包括跨越垂直宽度的至少一个阻聚材料 延伸结构。 非易失性电阻性存储单元还包括在第一部分的至少一个侧壁上形成为垂直延伸的忆阻材料结构的第二部分。
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公开(公告)号：US08547727B2
公开(公告)日：2013-10-01
申请号：US13119932
申请日：2008-12-12
申请人： Wei Wu , John Paul Strachan , R. Stanley Williams , Marco Florentino , Shih-Yuan Wang , Nathaniel J. Quitoriano , Hans S. Cho , Julien Borghetti , Sagi Varghese Mathai
发明人： Wei Wu , John Paul Strachan , R. Stanley Williams , Marco Florentino , Shih-Yuan Wang , Nathaniel J. Quitoriano , Hans S. Cho , Julien Borghetti , Sagi Varghese Mathai
IPC分类号： G11C11/00
CPC分类号： H01L45/145 , H01L27/2472 , H01L45/08 , H01L45/1206 , H01L45/1226 , H01L45/14 , H01L45/146 , H01L45/147
摘要： A memristive routing device includes a memristive matrix, mobile dopants moving with the memristive matrix in response to programming electrical fields and remaining stable within the memristive matrix in the absence of the programming electrical fields; and at least three electrodes surrounding the memristive matrix. A method for tuning electrical circuits with a memristive device includes measuring a circuit characteristic and applying a programming voltage to the memristive device which causes motion of dopants within the memristive device to alter the circuit characteristic. A method for increasing a switching speed of a memristive device includes drawing dopants from two geometrically separated locations into close proximity to form two conductive regions and then switching the memristive device to a conductive state by applying a programming voltage which rapidly merges the two conductive regions to form a conductive pathway between a source electrode and a drain electrode.
摘要翻译： 忆阻路由设备包括忆阻矩阵，响应于编程电场而与忆阻矩阵一起移动的移动掺杂物，并且在没有编程电场的情况下在忆阻矩阵内保持稳定; 以及围绕忆阻矩阵的至少三个电极。 一种用忆阻器件调谐电路的方法包括测量电路特性并将编程电压施加到忆阻器件，其使得忆阻器件内的掺杂剂的运动改变电路特性。 用于增加忆阻器件的切换速度的方法包括将来自两个几何分离位置的掺杂剂绘制成紧密接近形成两个导电区域，然后通过施加快速合并两个导电区域的编程电压将忆阻器件切换到导通状态 在源电极和漏电极之间形成导电路径。
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公开(公告)号：US08258049B2
公开(公告)日：2012-09-04
申请号：US12588936
申请日：2009-11-03
申请人： Hans S. Cho
发明人： Hans S. Cho
IPC分类号： H01L21/20
CPC分类号： H01L21/02675 , B82Y10/00 , B82Y30/00 , H01L21/02532 , H01L21/0262 , H01L21/2026 , H01L29/0665 , H01L29/0673 , Y10S977/762
摘要： A method of manufacturing a nanowire, a method of manufacturing a semiconductor apparatus including a nanowire and a semiconductor apparatus formed from the same are provided. The method of manufacturing a semiconductor apparatus may include forming a material layer pattern on a substrate, forming a first insulating layer on the material layer pattern, a first nanowire forming layer and a top insulating layer on the substrate, wherein a total depth of the first insulating layer and the first nanowire forming layer may be formed to be smaller than a depth of the material layer pattern, sequentially polishing the top insulating layer, the first nanowire forming layer and the first insulating layer so that the material layer pattern is exposed, exposing part of the first nanowire forming layer to form an exposed region and forming a single crystalline nanowire on an exposed region of the first nanowire forming layer.
摘要翻译： 提供一种纳米线的制造方法，包括纳米线的半导体装置的制造方法以及由该纳米线构成的半导体装置。 半导体装置的制造方法可以包括在基板上形成材料层图案，在基板上形成第一绝缘层，在基板上形成第一纳米线形成层和顶部绝缘层， 绝缘层和第一纳米线形成层可以形成为小于材料层图案的深度，顺序地抛光顶部绝缘层，第一纳米线形成层和第一绝缘层，使得材料层图案暴露，暴露 第一纳米线形成层的一部分以形成暴露区域并在第一纳米线形成层的暴露区域上形成单晶纳米线。
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公开(公告)号：US20140374693A1
公开(公告)日：2014-12-25
申请号：US14373478
申请日：2012-03-16
申请人： Hans S. Cho
发明人： Hans S. Cho
CPC分类号： H01L27/2481 , H01L45/08 , H01L45/085 , H01L45/1233 , H01L45/1266 , H01L45/128 , H01L45/146 , H01L45/1608
摘要： A varied multilayer memristive device includes a first memristive device stacked on a second memristive device. The physical parameters of the second memristive device differ from physical parameters of the first memristive to account for thermal budgeting differences present during formation processes for the memristive devices to reach specified performance parameters.
摘要翻译： 多层多层忆阻装置包括堆叠在第二忆阻装置上的第一忆阻装置。 第二忆阻装置的物理参数不同于第一忆阻器的物理参数，以考虑在忆阻器件达到指定性能参数的形成过程期间存在的热预算差异。
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公开(公告)号：US08258050B2
公开(公告)日：2012-09-04
申请号：US12505377
申请日：2009-07-17
申请人： Hans S. Cho , Theodore I. Kamins
发明人： Hans S. Cho , Theodore I. Kamins
CPC分类号： H01L21/268 , H01L31/02363 , H01L31/028 , H01L31/0296 , H01L31/0304 , H01L31/03046 , H01L31/0312 , H01L31/035281 , H01L31/03682 , H01L31/03685 , H01L31/07 , H01L31/072 , H01L31/075 , H01L31/1804 , H01L31/182 , H01L31/1872 , Y02E10/544 , Y02E10/545 , Y02E10/546 , Y02E10/547 , Y02E10/548 , Y02P70/521
摘要： A method of making a crystalline semiconductor structure provides a photonic device by employing low thermal budget annealing process. The method includes annealing a non-single crystal semiconductor film formed on a substrate to form a polycrystalline layer that includes a transition region adjacent to a surface of the film and a relatively thicker columnar region between the transition region and the substrate. The transition region includes small grains with random grain boundaries. The columnar region includes relatively larger columnar grains with substantially parallel grain boundaries that are substantially perpendicular to the substrate. The method further includes etching the surface to expose the columnar region having an irregular serrated surface.
摘要翻译： 制造晶体半导体结构的方法通过采用低热预算退火工艺提供光子器件。 该方法包括退火形成在衬底上的非单晶半导体膜以形成多晶层，该多晶层包括与膜的表面相邻的过渡区域和过渡区域与衬底之间相对较厚的柱状区域。 过渡区域包括具有随机晶界的小颗粒。 柱状区域包括具有基本上垂直于衬底的基本上平行的晶界的相对较大的柱状晶粒。 该方法还包括蚀刻表面以暴露具有不规则锯齿状表面的柱状区域。
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49.发明申请公开(公告)号：US20120025343A1
公开(公告)日：2012-02-02
申请号：US13262799
申请日：2009-04-15
申请人： Philip J. Kuekes , Alexandre M. Bratkovski , Hans S. Cho , Nathaniel J. Quitoriano , Theodore I. Kamins , R. Stanley Williams
发明人： Philip J. Kuekes , Alexandre M. Bratkovski , Hans S. Cho , Nathaniel J. Quitoriano , Theodore I. Kamins , R. Stanley Williams
CPC分类号： H01L35/32
摘要： A thermoelectric device having a variable cross-section connecting structure includes a first electrode, a second electrode, and a connecting structure connecting the first electrode and the second electrode. The connecting structure has a first section and a second section. The width of the second section is greater than the width of the first section, and the width of the first section is less than a width that is approximately equivalent to a phonon mean free path through the first section.
摘要翻译： 具有可变横截面连接结构的热电装置包括第一电极，第二电极和连接第一电极和第二电极的连接结构。 连接结构具有第一部分和第二部分。 第二部分的宽度大于第一部分的宽度，并且第一部分的宽度小于大致等于通过第一部分的声子平均自由程的宽度。
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公开(公告)号：US20110182107A1
公开(公告)日：2011-07-28
申请号：US13119932
申请日：2008-12-12
申请人： Wei Wu , John Paul Strachen , R. Stanely Williams , Marco Florentino , Shih-Yuan Wang , Hans S. Cho , Julien Borghetti , Sagi Varghese Mathai
发明人： Wei Wu , John Paul Strachen , R. Stanely Williams , Marco Florentino , Shih-Yuan Wang , Hans S. Cho , Julien Borghetti , Sagi Varghese Mathai
CPC分类号： H01L45/145 , H01L27/2472 , H01L45/08 , H01L45/1206 , H01L45/1226 , H01L45/14 , H01L45/146 , H01L45/147
摘要： A memristive routing device (200) includes a memristive matrix (240), mobile dopants (255) moving with the memristive matrix (240) in response to programming electrical fields and remaining stable within the memristive matrix (240) in the absence of the programming electrical fields; and at least three electrodes (210, 220, 230) surrounding the memristive matrix (240). A method for tuning electrical circuits with a memristive device (900) includes measuring a circuit characteristic (805) and applying a programming voltage to the memristive device (900) which causes motion of dopants within the memristive device (900) to alter the circuit characteristic (805). A method for increasing a switching speed of a memristive device (1300) includes drawing dopants from two geometrically separated locations into close proximity to form two conductive regions (1380, 1390) and then switching the memristive device (1300) to a conductive state by applying a programming voltage which rapidly merges the two conductive regions (1380, 1390) to form a conductive pathway between a source electrode (1310) and a drain electrode (1320).
摘要翻译： 忆阻路由设备（200）包括忆阻矩阵（240），移动掺杂物（255）响应于编程电场而与忆阻矩阵（240）一起移动，并且在没有编程的情况下保持稳定在忆阻矩阵（240）内 电场; 以及围绕所述忆阻矩阵（240）的至少三个电极（210,220,230）。 一种利用忆阻器件（900）来调谐电路的方法包括测量电路特性（805）并将编程电压施加到忆阻器件（900），其使得忆阻器件（900）内的掺杂剂的运动改变电路特性 （805）。 提高忆阻装置（1300）的切换速度的方法包括将来自两个几何分离的位置的掺杂剂绘制成紧邻形成两个导电区域（1380,1390），然后通过应用将所述忆阻装置（1300）切换到导电状态 编程电压，其迅速地合并两个导电区域（1380,1390）以在源电极（1310）和漏电极（1320）之间形成导电通路。
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