公开(公告)号：US20070168952A1

公开(公告)日：2007-07-19

申请号：US11291341

申请日：2005-11-30

申请人： Chong Lee ,  Nam Hwang ,  Myung Choi

发明人： Chong Lee ,  Nam Hwang ,  Myung Choi

IPC分类号： G06F9/44 ,  G06F9/45

CPC分类号： G06F9/45533 ,  G06F8/60

摘要： The present invention relates to a VM (Virtual Machine) application program that can be used in a wireless terminal having a VM. A generated flash file is converted to a flash file for a wireless terminal, and a VM application program is produced by incorporating the wireless terminal flash file into a VM frame including a flash engine for running the wireless terminal flash file and a flash-VM interface for exchanging data with a VM provided in the wireless terminal. By a method for producing the VM application program, a VM application program can be easily developed by generating the flash file and converting the same, a VM application program including the flash file can be executed in a wireless terminal having a VM therein, and a VM application program can be renewed by only downloading a flash file.

摘要翻译： 本发明涉及可以在具有VM的无线终端中使用的VM（虚拟机）应用程序。 生成的闪存文件被转换为无线终端的闪存文件，并且通过将无线终端闪存文件合并到包括用于运行无线终端闪存文件的闪存引擎的VM帧和闪存 - VM接口中来生成VM应用程序 用于与在无线终端中提供的VM交换数据。 通过生产VM应用程序的方法，可以通过生成闪存文件并进行转换来容易地开发VM应用程序，包括闪存文件的VM应用程序可以在其中具有VM的无线终端中执行，并且 可以通过下载Flash文件来更新VM应用程序。

公开(公告)号：US20050212556A1

公开(公告)日：2005-09-29

申请号：US11128916

申请日：2005-05-12

申请人： Chong Lee ,  Reza Asayesh

发明人： Chong Lee ,  Reza Asayesh

IPC分类号： H03K19/173 ,  H03K19/177

CPC分类号： H03K19/17744 ,  H03K19/17732

摘要： A programmable logic device (“PLD”) includes high speed serial interface (“HSSI”) circuitry that can support several high speed serial (“HSS”) standards. Examples of the standards that can be supported are XAUI, InfiniBand, 1G Ethernet, FibreChannel, and Serial RapidIO. The HSSI circuitry may be partly programmable to support these various standards. In some cases control may come from the associated PLD core circuitry. Also in some cases some of the interface functions may be performed in the PLD core circuitry.

摘要翻译： 可编程逻辑器件（“PLD”）包括可支持若干高速串行（“HSS”）标准的高速串行接口（“HSSI”）电路。 可以支持的标准的例子有XAUI，InfiniBand，1G以太网，FibreChannel和Serial RapidIO。 HSSI电路可以部分地可编程以支持这些各种标准。 在某些情况下，控制可能来自相关的PLD核心电路。 同样在某些情况下，一些接口功能可以在PLD核心电路中执行。

公开(公告)号：US20080043824A1

公开(公告)日：2008-02-21

申请号：US11736481

申请日：2007-04-17

申请人： Paul Jacobs ,  Chong Lee ,  David Julian ,  Kamran Moallemi ,  Manuel Jaime

发明人： Paul Jacobs ,  Chong Lee ,  David Julian ,  Kamran Moallemi ,  Manuel Jaime

IPC分类号： H04B1/38 ,  H03D1/04 ,  H04M1/02 ,  H04B1/10

CPC分类号： H03F3/217 ,  H04L67/10 ,  H04M1/7253 ,  H04M2250/12 ,  H04W88/02

摘要： Processing may be performed by a first device on behalf of a second device to offload processing from the second device. In some aspects a device from which processing has been offloaded may be advantageously adapted to consume less power, have a smaller size, and have less complexity. Offloaded processing may be employed to enable a first device to process data for transmission and then send the data to another device for processing. Offloaded processing may be employed to enable a first device to process data on behalf of a second device and then send the processed data to the second device. In some aspects the data may be waveform encoded for wireless transmission between the devices. Offloaded processing may be implemented in a static manner or in a dynamic manner.

摘要翻译： 处理可以由代表第二设备的第一设备执行以从第二设备卸载处理。 在一些方面，已经卸载处理的装置可以有利地适于消耗更少的功率，具有更小的尺寸并且具有较小的复杂性。 可以采用卸载处理以使第一设备能够处理用于传输的数据，然后将数据发送到另一设备进行处理。 可以采用卸载处理以使得第一设备能够代表第二设备处理数据，然后将处理的数据发送到第二设备。 在一些方面，数据可以被波形编码用于设备之间的无线传输。 卸载处理可以以静态方式或以动态方式实现。

公开(公告)号：US20070281721A1

公开(公告)日：2007-12-06

申请号：US11740118

申请日：2007-04-25

申请人： Chong Lee ,  Amal Ekbal ,  David Julian ,  Kamran Moallemi

发明人： Chong Lee ,  Amal Ekbal ,  David Julian ,  Kamran Moallemi

IPC分类号： H04B7/00

CPC分类号： H04W8/005 ,  H04W56/005 ,  H04W76/20 ,  H04W84/18

摘要： Aspects include methods and apparatuses for communicating in an ultra-wideband network. For example, some aspects include a method of wireless communications. The method may include receiving information identifying at least one resource of a second electronic device, transmitting resource information of the electronic device, comparing the resource information of the electronic device and the received resource information of the second electronic device. The method may also include transmitting a synchronization signal to the second device based on the comparing. The method may also include receiving a synchronization signal from the second device based on the comparing. Other aspects include apparatus and devices for wireless communications.

摘要翻译： 方面包括用于在超宽带网络中通信的方法和装置。 例如，一些方面包括无线通信的方法。 该方法可以包括接收标识第二电子设备的至少一个资源的信息，发送电子设备的资源信息，比较电子设备的资源信息和所接收的第二电子设备的资源信息。 该方法还可以包括基于该比较将同步信号发送到第二设备。 该方法还可以包括基于比较从第二设备接收同步信号。 其他方面包括用于无线通信的装置和装置。

公开(公告)号：US20070259662A1

公开(公告)日：2007-11-08

申请号：US11740681

申请日：2007-04-26

申请人： Chong Lee ,  Amal Ekbal ,  David Julian

发明人： Chong Lee ,  Amal Ekbal ,  David Julian

IPC分类号： H04Q7/20

CPC分类号： H04B1/7174 ,  H04B1/71632 ,  H04R25/554 ,  H04R25/558 ,  H04R27/00 ,  H04R2225/33 ,  H04R2225/55 ,  H04R2227/003 ,  H04R2420/07

摘要： Low power wireless communication techniques may be employed in devices that communicate via a wireless body area network, a wireless personal area network, or some other type of wireless communication link. In some implementations the devices may communicate via one or more impulse-based ultra-wideband channels. Inter-pulse duty cycling may be employed to reduce the power consumption of a device. Power may be provided for the transmissions and receptions of pulses by charging and discharging a capacitive element according to the inter-pulse duty cycling. Sub-packet data may be transmitted and received via a common frequency band. A cell phone may multicast to two or more peripherals via wireless communication links.

摘要翻译： 低功率无线通信技术可以用于经由无线体区域网络，无线个人区域网络或某种其他类型的无线通信链路进行通信的设备中。 在一些实现中，设备可以经由一个或多个基于脉冲的超宽带信道进行通信。 可以采用脉冲间占空比来降低器件的功耗。 可以通过根据脉冲间负载循环对电容元件进行充电和放电来为发射和接收脉冲提供功率。 可以经由公共频带发送和接收子分组数据。 蜂窝电话可以通过无线通信链路多播到两个或多个外围设备。

公开(公告)号：US07227918B2

公开(公告)日：2007-06-05

申请号：US09805843

申请日：2001-03-13

申请人： Edward Aung ,  Henry Lui ,  Paul Butler ,  John Turner ,  Rakesh Patel ,  Chong Lee

发明人： Edward Aung ,  Henry Lui ,  Paul Butler ,  John Turner ,  Rakesh Patel ,  Chong Lee

IPC分类号： H04L7/00

CPC分类号： G11C7/22 ,  G11C7/222 ,  H03K19/17732 ,  H03K19/17744 ,  H03L7/07 ,  H03L7/0802 ,  H03L7/0814 ,  H03L7/089 ,  H03L7/0891 ,  H03L7/0995 ,  H03L7/187 ,  H03L7/199 ,  H03M9/00 ,  H04L7/0025 ,  H04L7/02 ,  H04L7/0337

摘要： A programmable logic device (“PLD”) is augmented with programmable clock data recover (“CDR”) circuitry to allow the PLD to communicate via any of a large number of CDR signaling protocols. The CDR circuitry may be integrated with the PLD, or it may be wholly or partly on a separate integrated circuit. The circuitry may be capable of CDR input, CDR output, or both. The CDR capability may be provided in combination with other non-CDR signaling capability such as non-CDR low voltage differential signaling (“LVDS”). The circuitry may be part of a larger system.

摘要翻译： 可编程逻辑器件（“PLD”）用可编程时钟数据恢复（“CDR”）电路进行增强，以允许PLD通过大量CDR信令协议中的任何一个进行通信。 CDR电路可以与PLD集成，或者它可以全部或部分地在单独的集成电路上。 电路可能能够进行CDR输入，CDR输出或两者。 CDR能力可以与其他非CDR信令能力组合提供，例如非CDR低电压差分信号（“LVDS”）。 电路可以是较大系统的一部分。

公开(公告)号：US20060099305A1

公开(公告)日：2006-05-11

申请号：US11259174

申请日：2005-10-26

申请人： Chong Lee ,  Piezhi Lian

发明人： Chong Lee ,  Piezhi Lian

IPC分类号： A23L1/31

CPC分类号： C05F1/002 ,  A23K10/22 ,  A23K50/80 ,  A23L17/50 ,  A23L33/10 ,  Y02A40/202 ,  Y02P20/145

摘要： A bioproduction process of preparing an hydrolysate from squid processing byproducts. The process includes obtaining squid byproducts and hydrolyzing the byproducts. The hydrolyzed product are heated until the viscosity stabilizes. The hydrolyzed product is then filtered to form a filtrate and then concentrated to form the desired hydrolysate.

摘要翻译： 从鱿鱼加工副产物制备水解产物的生物生产过程。 该方法包括获得鱿鱼副产物并水解副产物。 加热水解产物直到粘度稳定。 然后将水解产物过滤以形成滤液，然后浓缩形成所需的水解产物。

公开(公告)号：US07028270B1

公开(公告)日：2006-04-11

申请号：US10621074

申请日：2003-07-15

申请人： John Lam ,  Arch Zaliznyak ,  Chong Lee ,  Rakesh Patel ,  Vinson Chan

发明人： John Lam ,  Arch Zaliznyak ,  Chong Lee ,  Rakesh Patel ,  Vinson Chan

IPC分类号： G06F17/50

CPC分类号： G06F17/5054 ,  G06F2217/66

摘要： A skew-tolerant, glitch-free reset distribution apparatus and method are provided in an intellectual property (IP) block that supports a multi-channel input/output protocol. During reset mode, synchronizers are used to create more predictable timing, to pipeline the propagation delay, and to tolerate RC-induced skews of up to a clock period in routing a reset signal to all the channels and within the channels in an IP block. Two control signals, which are available from programmable logic resource core circuitry, are used to control the input of the reset signal into the IP block. Because the control signals are designed to be glitch-free, the reset signal is therefore also glitch-free, thus preventing the IP block from inadvertently transitioning into or out of reset mode.

摘要翻译： 在支持多通道输入/输出协议的知识产权（IP）块中提供了容错，无毛刺的复位分配装置和方法。 在复位模式期间，使用同步器创建更可预测的时序，流水线传播延迟，并允许在将复位信号路由到IP模块中的所有通道和通道内的RC时钟周期的RC引起的偏差。 两个控制信号可从可编程逻辑资源核心电路获得，用于控制复位信号输入到IP模块。 由于控制信号被设计为无毛刺，因此复位信号也无毛刺，从而防止IP块无意中转换或复位。

公开(公告)号：US06985021B1

公开(公告)日：2006-01-10

申请号：US10652521

申请日：2003-08-29

申请人： Arch Zaliznyak ,  William Bereza ,  Henry Lui ,  Chong Lee ,  Rakesh Patel

发明人： Arch Zaliznyak ,  William Bereza ,  Henry Lui ,  Chong Lee ,  Rakesh Patel

IPC分类号： H03F3/45

CPC分类号： H03F3/45475 ,  H03F3/4521 ,  H03F3/45928 ,  H03F2200/513 ,  H03F2203/45088 ,  H03F2203/45101 ,  H03F2203/45136 ,  H03F2203/45236 ,  H03F2203/45366 ,  H03F2203/45544 ,  H03F2203/45561 ,  H03F2203/45586 ,  H03F2203/45592 ,  H03F2203/45594 ,  H03F2203/45616 ,  H03K19/003

摘要： Circuitry is provided that conditions a differential input signal such that when the signal is received by a multi-standard differential input buffer, the buffer is able to process the conditioned signal without pronounced increases in propagation delay, thereby keeping signal jitter to a minimum. The circuitry further enables input buffers to operate according to desired operating parameters even when the supply voltage powering the input buffer is relatively low. The circuitry operates by shifting the common-mode voltage to a range that puts the input buffer in a favorable common-mode voltage range of operation. The circuitry may be coupled with a programmably controlled amplifier that amplifies the amplitude of the conditioned differential signal prior to being received by the input buffer. Amplifying the signal prevents problems typically associated with data-dependent jitter and intersymbol interference by boosting the voltage amplitude to a level that is readily processed by the input buffer.

摘要翻译： 提供电路，其规定差分输入信号，使得当信号被多标准差分输入缓冲器接收时，缓冲器能够处理调节后的信号而传播延迟不会明显增加，从而将信号抖动保持在最小。 该电路还使输入缓冲器能够根据期望的操作参数进行操作，即使为输入缓冲器供电的电源电压相对较低。 电路通过将共模电压移动到使输入缓冲器处于有利的共模电压操作范围的范围来工作。 电路可以与可编程控制的放大器耦合，放大器在由输入缓冲器接收之前放大经调节的差分信号的幅度。 通过将电压幅度升高到输入缓冲器容易处理的电平，放大信号可防止通常与数据相关的抖动和符号间干扰相关的问题。

公开(公告)号：US20050267188A1

公开(公告)日：2005-12-01

申请号：US10523015

申请日：2003-07-30

申请人： Kyu Yi ,  Sun Lee ,  Sung-Eun Yoo ,  Jee Suh ,  Nak Kim ,  Sun Hwang ,  Byung-Ho Lee ,  Ho Seo ,  Chong Lee ,  Sang-Un Choi

发明人： Kyu Yi ,  Sun Lee ,  Sung-Eun Yoo ,  Jee Suh ,  Nak Kim ,  Sun Hwang ,  Byung-Ho Lee ,  Ho Seo ,  Chong Lee ,  Sang-Un Choi

IPC分类号： C07D405/12 ,  A61K31/4178 ,  C07D45/02

CPC分类号： C07D405/12

摘要： The present invention relates to benzopyran derivatives substituted with secondary amines including imidazole, their preparation, and pharmaceutical compositions containing them. The present invention is pharmacologically useful for the treatment of cancer, rheumatoid arthritis, and diabetic retinopathies through anti-angiogenic properties, and also pharmacologically useful in the protection of heart and neuronal cells against ischemia-reperfusion injury or preserving organs.

摘要翻译： 本发明涉及被仲胺包括咪唑取代的苯并吡喃衍生物，其制备方法和含有它们的药物组合物。 本发明在药理学上可用于通过抗血管生成特性治疗癌症，类风湿性关节炎和糖尿病性视网膜病变，并且还可用于保护心脏和神经细胞免受缺血再灌注损伤或保存器官的药理作用。