公开(公告)号：US20090103913A1

公开(公告)日：2009-04-23

申请号：US11874934

申请日：2007-10-19

申请人： Chih-Ming Huang

发明人： Chih-Ming Huang

IPC分类号： G03B17/00

CPC分类号： G03B17/00

摘要： A multifunctional supporting frame for a web camera, comprises a movable supporting clamping seat having a hollow rectangular receiving chamber; the rectangular receiving chamber being formed by an upper L shape sheet, a middle U shape sheet, and a lower enclosed rectangular sheet; one lateral side of the L shape sheet being extended with a sheet plate; at least one guide post being extended from one surface of the sheet plate; the guide posts being combined with springs so as to be formed as a telescopic structure which is adjustable to have a desire width for clamping an object; and a bendable shaft seat formed by an upper U shape plate and a lower U shape plate which are pivotally engaged. A lens set is installed above the movable supporting clamping seat by using a lens set pin seat.

摘要翻译： 一种用于网络摄像机的多功能支撑框架，包括具有中空矩形接收室的可移动支撑夹座; 矩形容纳室由上部L形片，中部U形片和下部封闭矩形片形成; L形片的一个侧面用片状板延伸; 至少一个引导柱从所述板的一个表面延伸; 引导柱与弹簧组合，以形成可伸缩结构，其可调节以具有用于夹紧物体的期望宽度; 以及由上U形板和下U形板形成的可枢转地接合的可弯曲的轴座。 通过使用镜头组座座将透镜组安装在可动支撑夹座上方。

公开(公告)号：US20080088011A1

公开(公告)日：2008-04-17

申请号：US11974441

申请日：2007-10-12

申请人： Han-Ping Hu ,  Chien-Ping Huang ,  Chih-Ming Huang ,  Yu-Po Wang ,  Cheng-Hsu Hsiao

发明人： Han-Ping Hu ,  Chien-Ping Huang ,  Chih-Ming Huang ,  Yu-Po Wang ,  Cheng-Hsu Hsiao

IPC分类号： H01L23/49 ,  H01L21/58

CPC分类号： H01L21/568 ,  H01L23/3128 ,  H01L24/16 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/16151 ,  H01L2924/16195 ,  H01L2924/18161 ,  H01L2924/19107 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A semiconductor package on which a semiconductor device can be stacked and fabrication method thereof are provided. The fabrication method includes the steps of mounting and electrically connecting at least one semiconductor chip on the substrate, mounting an electrical connecting structure consisting of an upper layer circuit board and a lower layer circuit board on the substrate and electrically connecting the electrical connecting structure to the substrate, where the semiconductor chip is received in a receiving space formed in the electrical connecting structure; forming an encapsulant on the substrate encapsulating the semiconductor chip and the electrical connecting structure, and after the encapsulant is formed, exposing top surface of the upper layer circuit board with a plurality of solder pads from the encapsulant to allow at least one semiconductor device to electrically connect the upper layer circuit board so as to form a stack structure.

摘要翻译： 提供半导体器件可堆叠的半导体封装件及其制造方法。 该制造方法包括以下步骤：在基板上安装和电连接至少一个半导体芯片，将由上层电路板和下层电路板组成的电连接结构安装在基板上，并将电连接结构电连接到 衬底，其中所述半导体芯片被容纳在形成在所述电连接结构中的接收空间中; 在封装半导体芯片和电连接结构的基板上形成密封剂，并且在形成密封剂之后，用来自密封剂的多个焊盘将上层电路板的顶表面曝光，以允许至少一个半导体器件电 连接上层电路板，形成堆叠结构。

公开(公告)号：US20070181990A1

公开(公告)日：2007-08-09

申请号：US11591974

申请日：2006-11-01

申请人： Chien-Ping Huang ,  Chih-Ming Huang ,  Han-Ping Pu ,  Yu-Po Wang ,  Cheng-Hsu Hsiao

发明人： Chien-Ping Huang ,  Chih-Ming Huang ,  Han-Ping Pu ,  Yu-Po Wang ,  Cheng-Hsu Hsiao

IPC分类号： H01L23/02 ,  H01L21/00

CPC分类号： H01L23/3128 ,  H01L21/561 ,  H01L21/565 ,  H01L23/16 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/97 ,  H01L25/0657 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06572 ,  H01L2225/06586 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19107 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A stacked semiconductor structure and fabrication method thereof are provided. The method includes mounting and connecting electrically a semiconductor chip to a first substrate, mounting on the first substrate a plurality of supporting members corresponding in position to a periphery of the semiconductor chip, mounting a second substrate having a first surface partially covered with a tape and a second surface opposite to the first surface on the supporting members via the second surface, connecting electrically the first and second substrates by bonding wires, forming on the first substrate an encapsulant for encapsulating the semiconductor chip, the supporting members, the second substrate, the bonding wires, and the tape with an exposed top surface, and removing the tape to expose the first surface of the second substrate and allow an electronic component to be mounted thereon. The present invention prevents reflow-induced contamination, spares a special mold, and eliminates flash.

摘要翻译： 提供了堆叠半导体结构及其制造方法。 该方法包括将半导体芯片电连接到第一基板上，在第一基板上安装多个对应于半导体芯片的周边的支撑部件，安装第二基板，该第二基板具有部分被带覆盖的第一表面， 经由第二表面与支撑构件上的第一表面相对的第二表面，通过接合线电连接第一和第二基板，在第一基板上形成用于封装半导体芯片的密封剂，支撑构件，第二基板， 接合线和具有暴露的顶表面的带，并且移除带以露出第二基板的第一表面并允许电子部件安装在其上。 本发明防止回流引起的污染，备有特殊的模具，并消除闪光。

公开(公告)号：US20060270089A1

公开(公告)日：2006-11-30

申请号：US11163310

申请日：2005-10-13

申请人： Chien-Ping Huang ,  Chih-Ming Huang ,  Cheng-Yi Chang

发明人： Chien-Ping Huang ,  Chih-Ming Huang ,  Cheng-Yi Chang

IPC分类号： H01L21/00

CPC分类号： H01L27/14683 ,  H01L23/49816 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/81 ,  H01L24/82 ,  H01L24/97 ,  H01L27/14618 ,  H01L27/14634 ,  H01L2224/81801 ,  H01L2224/82 ,  H01L2224/85 ,  H01L2224/86 ,  H01L2924/14 ,  H01L2924/00

摘要： A sensor semiconductor device and a method for fabricating the same are proposed. A plurality of metal bumps and a sensor chip are mounted on a substrate. A dielectric layer and a circuit layer are formed on the substrate, wherein the circuit layer is electrically connected to the metal bumps and the sensor chip. Thus, the sensor chip is electrically connected to the substrate via the circuit layer and the metal bumps. The dielectric layer is formed with an opening for exposing a sensor region of the sensor chip. A light-penetrable lid covers the opening of the dielectric layer, such that light is able to penetrate the light-penetrable lid to reach the sensor region and activate the sensor chip. A plurality of solder balls are mounted on a surface of the substrate free of mounting the sensor chip, for electrically connecting the sensor chip to an external device.

摘要翻译： 提出了一种传感器半导体器件及其制造方法。 多个金属凸块和传感器芯片安装在基板上。 在基板上形成电介质层和电路层，其中电路层电连接到金属凸块和传感器芯片。 因此，传感器芯片经由电路层和金属凸块电连接到基板。 电介质层形成有用于暴露传感器芯片的传感器区域的开口。 透光盖子覆盖电介质层的开口，使得光线能够穿透透光盖子到达传感器区域并激活传感器芯片。 多个焊球安装在基板的表面上，无需安装传感器芯片，用于将传感器芯片电连接到外部设备。

公开(公告)号：US06972216B2

公开(公告)日：2005-12-06

申请号：US10768307

申请日：2004-01-29

申请人： Chien-Ping Huang ,  Chih-Ming Huang

发明人： Chien-Ping Huang ,  Chih-Ming Huang

IPC分类号： H01L23/31 ,  H01L23/433 ,  H01L23/495 ,  H01L23/50 ,  H01L21/50

CPC分类号： H01L23/552 ,  H01L23/3128 ,  H01L23/4334 ,  H01L23/49568 ,  H01L23/50 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/91 ,  H01L2224/05554 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/4813 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/49 ,  H01L2224/73221 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/014 ,  H01L2924/10161 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A BGA (ball grid array) package with enhanced electrical and thermal performance, and a method for fabricating the BGA package, are proposed. This BGA package is characterized by the use of a power-connecting heat spreader and a ground-connecting heat spreader, which are respectively used to electrically connect power pad and ground pad to a packaged chip as well as to dissipate heat generated by the chip during operation. The ground-connecting heat spreader is arranged to entirely cover the chip, and thereby provides good shielding effect for the chip, which helps improve electrical performance of the chip during operation. Further, the ground-connecting heat spreader is partly exposed to outside of an encapsulation body that encapsulates the chip, by which satisfactory heat-dissipation efficiency can be achieved.

摘要翻译： 提出了具有增强的电气和热性能的BGA（球栅阵列）封装以及制造BGA封装的方法。 该BGA封装的特征在于使用功率连接散热器和接地连接散热器，其分别用于将电源焊盘和接地焊盘电连接到封装芯片，以及散发由芯片产生的热量 操作。 地面连接散热器布置成完全覆盖芯片，从而为芯片提供良好的屏蔽效果，有助于提高芯片在运行过程中的电气性能。 此外，地连接散热器部分地暴露于封装芯片的封装体的外部，由此可以实现令人满意的散热效率。

公开(公告)号：US20050202590A1

公开(公告)日：2005-09-15

申请号：US10846460

申请日：2004-05-14

申请人： Chien-Ping Huang ,  Cheng-Hsu Hsiao ,  Chih-Ming Huang

发明人： Chien-Ping Huang ,  Cheng-Hsu Hsiao ,  Chih-Ming Huang

IPC分类号： H01L21/44

CPC分类号： H01L21/6835 ,  H01L21/568 ,  H01L24/19 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/19 ,  H01L2224/20 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/97 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/351 ,  H01L2924/3511 ,  H01L2224/82 ,  H01L2924/00

摘要： A wafer level semiconductor package with a build-up layer is provided, which includes a glass frame having a through hole for receiving a semiconductor chip therein, a low-modulus buffer material filled within the space formed between the semiconductor chip and the glass frame, a build-up layer formed on the glass frame and the semiconductor chip such that the build-up layer is electrically connected to the semiconductor chip, and a plurality of conductive elements mounted on the build-up layer so that the semiconductor chip is electrically connected to external devices. With the use of the glass frame and low-modulus buffer material, the wafer level semiconductor package thus-obtained is free from warpage, chip-crack, and delamination problems and the reliability thereof is enhanced. A method for fabricating the wafer level semiconductor package is also provided.

摘要翻译： 提供具有积层的晶片级半导体封装，其包括具有用于接收其中的半导体芯片的通孔的玻璃框架，填充在形成在半导体芯片和玻璃框架之间的空间内的低模量缓冲材料， 形成在所述玻璃框架和所述半导体芯片上的堆积层，使得所述积层层电连接到所述半导体芯片，以及安装在所述积层层上的多个导电元件，使得所述半导体芯片电连接 到外部设备。 通过使用玻璃框架和低模量缓冲材料，由此获得的晶片级半导体封装没有翘曲，芯片裂纹和分层问题，并且其可靠性得到提高。 还提供了一种用于制造晶片级半导体封装的方法。

公开(公告)号：US20050189659A1

公开(公告)日：2005-09-01

申请号：US11112145

申请日：2005-04-21

申请人： Chien Huang ,  Yu-Po Wang ,  Chih-Ming Huang

发明人： Chien Huang ,  Yu-Po Wang ,  Chih-Ming Huang

IPC分类号： H01L21/48 ,  H01L21/56 ,  H01L21/68 ,  H01L23/31 ,  H01L23/58

CPC分类号： H01L21/4857 ,  H01L21/4832 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3121 ,  H01L23/58 ,  H01L24/48 ,  H01L24/49 ,  H01L24/97 ,  H01L2221/68345 ,  H01L2224/05554 ,  H01L2224/16 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/15183 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H05K3/007 ,  H05K3/3457 ,  H05K3/4682 ,  H05K2203/0152 ,  H01L2224/85 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package and a fabrication method thereof are provided in which a dielectric material layer formed with a plurality of openings is used and a solder material is applied into each of the openings. A first copper layer and a second copper layer are in turn deposited over the dielectric material layer and solder materials, and the first and second copper layers are patterned to form a plurality of conductive traces each of which has a terminal coated with a metal layer. A chip is mounted on the conductive traces and electrically connected to the terminals by bonding wires, with the dielectric material layer and solder materials being exposed to the outside. This package structure can flexibly arrange the conductive traces and effectively shorten the bonding wires, thereby improve trace routability and quality of electrical connection for the semiconductor package.

公开(公告)号：US06703698B2

公开(公告)日：2004-03-09

申请号：US10157069

申请日：2002-05-29

申请人： Chien-Ping Huang ,  Chih-Ming Huang

发明人： Chien-Ping Huang ,  Chih-Ming Huang

IPC分类号： H01L2322

CPC分类号： H01L23/552 ,  H01L23/3128 ,  H01L23/4334 ,  H01L23/49568 ,  H01L23/50 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/91 ,  H01L2224/05554 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/4813 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/49 ,  H01L2224/73221 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/014 ,  H01L2924/10161 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A BGA (ball grid array) package with enhanced electrical and thermal performance, and a method for fabricating the BGA package, are proposed. This BGA package is characterized by the use of a power-connecting heat spreader and a ground-connecting heat spreader, which are respectively used to electrically connect power pad and ground pad to a packaged chip as well as to dissipate heat generated by the chip during operation. The ground-connecting heat spreader is arranged to entirely cover the chip, and thereby provides good shielding effect for the chip, which helps improve electrical performance of the chip during operation. Further, the ground-connecting heat spreader is partly exposed to outside of an encapsulation body that encapsulates the chip, by which satisfactory heat-dissipation efficiency can be achieved.

公开(公告)号：US06380587B1

公开(公告)日：2002-04-30

申请号：US09706527

申请日：2000-11-03

申请人： Shing-Ren Sheu ,  Chung-Hsien Wu ,  Chih-Ming Huang

发明人： Shing-Ren Sheu ,  Chung-Hsien Wu ,  Chih-Ming Huang

IPC分类号： H01L2976

CPC分类号： H01L27/1126 ,  H01L27/105 ,  H01L27/11293

摘要： A semiconductor read-only memory (ROM) and a method of fabricating the same are provided. The ROM device is structured in such a manner that allows the fabrication to include a fewer number of mask processes. This makes it more cost effective and allows a cycle time that is shorter than that of the prior art. Moreover, the particular structure of the ROM device makes punchthrough less likely to occur between any neighboring pairs of the buried bit lines when the ROM device is further scaled down. The ROM device is constructed on a semiconductor substrate which is partitioned into a peripheral region and a cell region. A plurality of STI structures are formed at predefined locations in both the peripheral region and the cell region. Immediately after this, a first ion-implantation process can be performed on the cell region to form a plurality of buried bit lines. Subsequently, the dielectric isolation layers in all of the STI structures in the cell region are removed, leaving a plurality of empty trenches behind. A conformal insulating layer and a conductive layer are then successively formed over the wafer, and the conductive layer is further selectively removed to form a word line in the cell region and a gate in the peripheral region. In the code implantation process, selected channel regions between the buried bit lines are doped with impurities for code implantation of data into the ROM device.

公开(公告)号：US08241059B2

公开(公告)日：2012-08-14

申请号：US12792910

申请日：2010-06-03

申请人： Wei-Chao Huang ,  Chih-Ming Huang

发明人： Wei-Chao Huang ,  Chih-Ming Huang

IPC分类号： H01R13/621

CPC分类号： H01R12/7047

摘要： A connector and printed circuit board assembly includes a printed circuit board, a connector fixed on the printed circuit board, and a fixing board fixed on the connector, the fixing board defining a through hole, a connecting member fixed on the printed circuit board adjacent to the connector, a threaded retainer, and a threaded post securely connected with the connecting member. The threaded post passes through the through hole and seats the threaded retainer to lock the connector onto the printed circuit board.

摘要翻译： 连接器和印刷电路板组件包括印刷电路板，固定在印刷电路板上的连接器和固定在连接器上的固定板，固定板限定通孔，固定在印刷电路板上的连接件 连接器，螺纹保持器和与连接构件牢固连接的螺纹柱。 螺纹柱穿过通孔并安装螺纹固定器以将连接器锁定到印刷电路板上。