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公开(公告)号:US06380587B1
公开(公告)日:2002-04-30
申请号:US09706527
申请日:2000-11-03
申请人: Shing-Ren Sheu , Chung-Hsien Wu , Chih-Ming Huang
发明人: Shing-Ren Sheu , Chung-Hsien Wu , Chih-Ming Huang
IPC分类号: H01L2976
CPC分类号: H01L27/1126 , H01L27/105 , H01L27/11293
摘要: A semiconductor read-only memory (ROM) and a method of fabricating the same are provided. The ROM device is structured in such a manner that allows the fabrication to include a fewer number of mask processes. This makes it more cost effective and allows a cycle time that is shorter than that of the prior art. Moreover, the particular structure of the ROM device makes punchthrough less likely to occur between any neighboring pairs of the buried bit lines when the ROM device is further scaled down. The ROM device is constructed on a semiconductor substrate which is partitioned into a peripheral region and a cell region. A plurality of STI structures are formed at predefined locations in both the peripheral region and the cell region. Immediately after this, a first ion-implantation process can be performed on the cell region to form a plurality of buried bit lines. Subsequently, the dielectric isolation layers in all of the STI structures in the cell region are removed, leaving a plurality of empty trenches behind. A conformal insulating layer and a conductive layer are then successively formed over the wafer, and the conductive layer is further selectively removed to form a word line in the cell region and a gate in the peripheral region. In the code implantation process, selected channel regions between the buried bit lines are doped with impurities for code implantation of data into the ROM device.
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2.
公开(公告)号:US06350654B1
公开(公告)日:2002-02-26
申请号:US09215618
申请日:1998-12-17
申请人: Shing-Ren Sheu , Chung-Hsien Wu , Chih-Ming Huang
发明人: Shing-Ren Sheu , Chung-Hsien Wu , Chih-Ming Huang
IPC分类号: H01L21336
CPC分类号: H01L27/1126 , H01L27/105 , H01L27/11293
摘要: A semiconductor read-only memory (ROM) and a method of fabricating the same are provided. The ROM device is structured in such a manner that allows the fabrication to include a fewer number of mask processes. This makes it more cost effective and allows a cycle time that is shorter than that of the prior art. Moreover, the particular structure of the ROM device makes punchthrough less likely to occur between any neighboring pairs of the buried bit lines when the ROM device is further scaled down. The ROM device is constructed on a semiconductor substrate which is partitioned into a peripheral region and a cell region. A plurality of STI structures are formed at predefined locations in both the peripheral region and the cell region. Immediately after this, a first ion-implantation process can be performed on the cell region to form a plurality of buried bit lines. Subsequently, the dielectric isolation layers in all of the STI structures in the cell region are removed, leaving a plurality of empty trenches behind. A conformal insulating layer and a conductive layer are then successively formed over the wafer, and the conductive layer is further selectively removed to form a word line in the cell region and a gate in the peripheral region. In the code implantation process, selected channel regions between the buried bit lines are doped with impurities for code implantation of data into the ROM device.
摘要翻译: 提供半导体只读存储器(ROM)及其制造方法。 ROM器件以允许制造包括更少数量的掩模处理的方式构造。 这使得它更具成本效益并且允许比现有技术更短的循环时间。 此外,当ROM器件进一步缩小时,ROM器件的特定结构使得在任何相邻的掩埋位线对之间不太可能发生穿透。 ROM器件被构造在被划分成周边区域和单元区域的半导体衬底上。 在周边区域和单元区域中的预定位置处形成多个STI结构。 此后,可以在单元区域上进行第一离子注入工艺以形成多个掩埋位线。 随后,去除单元区域中所有STI结构中的介电隔离层,留下多个空槽。 然后在晶片上连续地形成保形绝缘层和导电层,并且进一步选择性地去除导电层,以在单元区域中形成字线,并在外围区域形成栅极。 在代码注入过程中,掩埋位线之间的选定沟道区域掺杂有用于将数据代码注入到ROM器件中的杂质。
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公开(公告)号:US08618641B2
公开(公告)日:2013-12-31
申请号:US12228379
申请日:2008-08-11
申请人: Chang-Yueh Chan , Chih-Ming Huang , Chun-Yuan Li , Chih-Hsin Lai
发明人: Chang-Yueh Chan , Chih-Ming Huang , Chun-Yuan Li , Chih-Hsin Lai
IPC分类号: H01L23/495
CPC分类号: H01L24/89 , H01L21/561 , H01L23/49531 , H01L24/48 , H01L24/49 , H01L24/85 , H01L2224/05554 , H01L2224/32014 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/48257 , H01L2224/49109 , H01L2224/4911 , H01L2224/73265 , H01L2224/85 , H01L2924/00014 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/07802 , H01L2924/15311 , H01L2924/181 , H01L2924/19105 , H01L2924/351 , H01L2924/00 , H01L2224/45099 , H01L2924/00012
摘要: A semiconductor package and a method for fabricating the same are provided. A leadframe including a die pad and a plurality of peripheral leads is provided. A carrier, having a plurality of connecting pads formed thereon, is attached to the die pad, wherein a planar size of the carrier is greater than that of the die pad, allowing the connecting pads on the carrier to be exposed from the die pad. At least a semiconductor chip is attached to a side of an assembly including the die pad and the carrier, and is electrically connected to the connecting pads of the carrier and the leads via bonding wires. A package encapsulant encapsulates the semiconductor chip, the bonding wires, a part of the carrier and a part of the leadframe, allowing a bottom surface of the carrier and a part of the leads to be exposed from the package encapsulant.
摘要翻译: 提供半导体封装及其制造方法。 提供了包括管芯焊盘和多个外围引线的引线框架。 具有形成在其上的多个连接焊盘的载体被附接到管芯焊盘,其中载体的平面尺寸大于管芯焊盘的平面尺寸,允许载体上的连接焊盘从裸片焊盘露出。 至少一个半导体芯片附着到包括芯片焊盘和载体的组件的一侧,并通过接合线电连接到载体和引线的连接焊盘。 封装密封剂封装半导体芯片,接合线,载体的一部分和引线框架的一部分,允许载体的底表面和引线的一部分从封装密封剂暴露。
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公开(公告)号:US20110177643A1
公开(公告)日:2011-07-21
申请号:US12769087
申请日:2010-04-28
申请人: Chi-Hsin Chiu , Chih-Ming Huang , Chang-Yueh Chan , Hsin-Yi Liao , Chun-Chi Ke
发明人: Chi-Hsin Chiu , Chih-Ming Huang , Chang-Yueh Chan , Hsin-Yi Liao , Chun-Chi Ke
CPC分类号: B81B7/0064 , B81B7/007 , B81B2207/095 , H01L21/56 , H01L23/315 , H01L23/552 , H01L24/48 , H01L2224/48227 , H01L2224/48465 , H01L2924/00014 , H01L2924/01013 , H01L2924/01029 , H01L2924/01046 , H01L2924/01079 , H01L2924/09701 , H01L2924/12042 , H01L2924/1461 , H01L2924/181 , H01L2924/3025 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要: A fabrication method of a package structure having at least an MEMS element is provided, including: preparing a wafer having electrical connection pads and the at least an MEMS element; disposing lids for covering the at least an MEMS element, the lids having a metal layer formed thereon; electrically connecting the electrical connection pads and the metal layer with bonding wires; forming an encapsulant for covering the lids, bonding wires, electrical connection pads and metal layer; removing portions of the encapsulant to separate the bonding wires each into first and second sub-bonding wires, wherein top ends of the first and second sub-bonding wires are exposed, the first sub-bonding wires electrically connecting to the electrical connection pads, and the second sub-bonding wires electrically connecting to the metal layer; forming metallic traces on the encapsulant for electrically connecting to the first sub-bonding wires; forming bumps on the metallic traces; and performing a singulation process.
摘要翻译: 提供具有至少MEMS元件的封装结构的制造方法,包括:制备具有电连接焊盘和所述至少MEMS元件的晶片; 设置用于覆盖所述至少一个MEMS元件的盖,所述盖具有在其上形成的金属层; 电连接焊盘和金属层与接合线; 形成用于覆盖盖子,接合线,电连接垫和金属层的密封剂; 去除所述密封剂的部分以将所述接合线分别分离成第一和第二子接合线,其中所述第一和第二次接合线的顶端被暴露,所述第一子接合线电连接到所述电连接焊盘,以及 所述第二子接合线电连接到所述金属层; 在所述密封剂上形成用于电连接到所述第一子接合线的金属迹线; 在金属痕迹上形成凸块; 并执行单独处理。
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公开(公告)号:US20110175179A1
公开(公告)日:2011-07-21
申请号:US12769993
申请日:2010-04-29
申请人: Chi-Hsin Chiu , Chih-Ming Huang , Chang-Yueh Chan , Hsin-Yi Liao , Chun-Chi Ke
发明人: Chi-Hsin Chiu , Chih-Ming Huang , Chang-Yueh Chan , Hsin-Yi Liao , Chun-Chi Ke
CPC分类号: B81B7/0064 , B81B7/007 , B81B2207/095 , H01L21/56 , H01L23/315 , H01L23/552 , H01L24/48 , H01L2224/48227 , H01L2224/48465 , H01L2924/00014 , H01L2924/01013 , H01L2924/01029 , H01L2924/01046 , H01L2924/01079 , H01L2924/09701 , H01L2924/12042 , H01L2924/1461 , H01L2924/181 , H01L2924/3025 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要: A package structure having at least an MEMS element is provided, including a chip having electrical connecting pads and the MEMS element; a lid disposed on the chip to cover the MEMS element and having a metal layer provided thereon; first sub-bonding wires electrically connecting to the electrical connecting pads; second sub-bonding wires electrically connecting to the metal layer; an encapsulant disposed on the chip, wherein the top ends of the first and second sub-bonding wires are exposed from the encapsulant; and metallic traces disposed on the encapsulant and electrically connecting to the first sub-bonding wires. The package structure advantageously features reduced size, relatively low costs, diverse bump locations, and an enhanced EMI shielding effect.
摘要翻译: 提供具有至少MEMS元件的封装结构,其包括具有电连接焊盘和MEMS元件的芯片; 设置在所述芯片上以覆盖所述MEMS元件并且具有设置在其上的金属层的盖; 电连接到电连接焊盘的第一子接合线; 电连接到金属层的第二子接合线; 设置在所述芯片上的密封剂,其中所述第一和第二子接合线的顶端从所述密封剂露出; 以及设置在密封剂上并电连接到第一子接合线的金属迹线。 封装结构有利地具有减小的尺寸,相对低的成本,不同的凸起位置和增强的EMI屏蔽效果。
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公开(公告)号:US07939383B2
公开(公告)日:2011-05-10
申请号:US11928708
申请日:2007-10-30
申请人: Chien Ping Huang , Yu-Po Wang , Chih-Ming Huang
发明人: Chien Ping Huang , Yu-Po Wang , Chih-Ming Huang
IPC分类号: H01L21/00
CPC分类号: H01L21/4857 , H01L21/4832 , H01L21/561 , H01L21/568 , H01L23/3121 , H01L23/58 , H01L24/48 , H01L24/49 , H01L24/97 , H01L2221/68345 , H01L2224/05554 , H01L2224/16 , H01L2224/48091 , H01L2224/48247 , H01L2224/49171 , H01L2224/97 , H01L2924/00014 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/15183 , H01L2924/15311 , H01L2924/181 , H01L2924/18161 , H05K3/007 , H05K3/3457 , H05K3/4682 , H05K2203/0152 , H01L2224/85 , H01L2224/81 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要: A semiconductor package and a fabrication method thereof are provided in which a dielectric material layer formed with a plurality of openings is used and a solder material is applied into each of the openings. A first copper layer and a second copper layer are in turn deposited over the dielectric material layer and solder materials, and the first and second copper layers are patterned to form a plurality of conductive traces each of which has a terminal coated with a metal layer. A chip is mounted on the conductive traces and electrically connected to the terminals by bonding wires, with the dielectric material layer and solder materials being exposed to the outside. This package structure can flexibly arrange the conductive traces and effectively shorten the bonding wires, thereby improve trace routability and quality of electrical connection for the semiconductor package.
摘要翻译: 提供一种半导体封装及其制造方法,其中使用形成有多个开口的电介质材料层,并且将焊料材料施加到每个开口中。 第一铜层和第二铜层又沉积在介电材料层和焊料材料上,并且第一和第二铜层被图案化以形成多个导电迹线,每个导电迹线具有涂覆有金属层的端子。 芯片安装在导电迹线上,并通过接合线电连接到端子,电介质材料层和焊料材料暴露于外部。 该封装结构可以灵活地布置导电迹线并有效地缩短接合线,从而提高半导体封装的迹线布线性和电连接质量。
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公开(公告)号:US20100170709A1
公开(公告)日:2010-07-08
申请号:US12727307
申请日:2010-03-19
申请人: Fang-Lin Tsai , Ho-Yi Tsai , Chih-Ming Huang , Chien-Ping Huang
发明人: Fang-Lin Tsai , Ho-Yi Tsai , Chih-Ming Huang , Chien-Ping Huang
CPC分类号: H01L23/3121 , H01L2924/0002 , H01L2924/19041 , H01L2924/3025 , H05K3/284 , H05K3/3442 , H05K3/3452 , H05K2201/0989 , H05K2201/10636 , Y02P70/611 , H01L2924/00
摘要: An electronic carrier board and a package structure thereof are provided. The electronic carrier board includes a carrier, at least one pair of bond pads formed on the carrier, and a protective layer covering the carrier. The protective layer is formed with openings for exposing the bond pads. A groove is formed between the paired bond pads and has a length larger than a width of an electronic component mounted on the paired bond pads. The groove is adjacent to one of the paired bond pads and communicates with a corresponding one of the openings where this bond pad is exposed. Accordingly, a clearance between the electronic component and the electronic carrier board can be effectively filled with an insulating resin for encapsulating the electronic component, thereby preventing voids and undesirable electrical bridging between the paired bond pads from occurrence.
摘要翻译: 提供电子载体板及其封装结构。 电子载板包括载体,形成在载体上的至少一对接合焊盘和覆盖载体的保护层。 保护层形成有用于暴露接合焊盘的开口。 在成对的接合焊盘之间形成有一个沟槽,其长度大于安装在成对接合焊盘上的电子部件的宽度。 该沟槽与一对接合焊盘相邻,并与该接合焊盘露出的相应的一个开口连通。 因此,电子部件和电子载体板之间的间隙可以有效地填充用于封装电子部件的绝缘树脂,从而防止成对焊盘之间的空隙和不期望的电桥发生。
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公开(公告)号:US07696623B2
公开(公告)日:2010-04-13
申请号:US11643147
申请日:2006-12-20
申请人: Fang-Lin Tsai , Ho-Yi Tsai , Chih-Ming Huang , Chien-Ping Huang
发明人: Fang-Lin Tsai , Ho-Yi Tsai , Chih-Ming Huang , Chien-Ping Huang
CPC分类号: H01L23/3121 , H01L2924/0002 , H01L2924/19041 , H01L2924/3025 , H05K3/284 , H05K3/3442 , H05K3/3452 , H05K2201/0989 , H05K2201/10636 , Y02P70/611 , H01L2924/00
摘要: An electronic carrier board and a package structure thereof are provided. The electronic carrier board includes a carrier, at least one pair of bond pads formed on the carrier, and a protective layer covering the carrier. The protective layer is formed with openings for exposing the bond pads. A groove is formed between the paired bond pads and has a length larger than a width of an electronic component mounted on the paired bond pads. The groove is adjacent to one of the paired bond pads and communicates with a corresponding one of the openings where this bond pad is exposed. Accordingly, a clearance between the electronic component and the electronic carrier board can be effectively filled with an insulating resin for encapsulating the electronic component, thereby preventing voids and undesirable electrical bridging between the paired bond pads from occurrence.
摘要翻译: 提供电子载体板及其封装结构。 电子载板包括载体,形成在载体上的至少一对接合焊盘和覆盖载体的保护层。 保护层形成有用于暴露接合焊盘的开口。 在成对的接合焊盘之间形成有一个沟槽,其长度大于安装在成对接合焊盘上的电子部件的宽度。 该沟槽与一对接合焊盘相邻,并与该接合焊盘露出的相应的一个开口连通。 因此,电子部件和电子载体板之间的间隙可以有效地填充用于封装电子部件的绝缘树脂,从而防止成对焊盘之间的空隙和不期望的电桥发生。
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公开(公告)号:US20090103913A1
公开(公告)日:2009-04-23
申请号:US11874934
申请日:2007-10-19
申请人: Chih-Ming Huang
发明人: Chih-Ming Huang
IPC分类号: G03B17/00
CPC分类号: G03B17/00
摘要: A multifunctional supporting frame for a web camera, comprises a movable supporting clamping seat having a hollow rectangular receiving chamber; the rectangular receiving chamber being formed by an upper L shape sheet, a middle U shape sheet, and a lower enclosed rectangular sheet; one lateral side of the L shape sheet being extended with a sheet plate; at least one guide post being extended from one surface of the sheet plate; the guide posts being combined with springs so as to be formed as a telescopic structure which is adjustable to have a desire width for clamping an object; and a bendable shaft seat formed by an upper U shape plate and a lower U shape plate which are pivotally engaged. A lens set is installed above the movable supporting clamping seat by using a lens set pin seat.
摘要翻译: 一种用于网络摄像机的多功能支撑框架,包括具有中空矩形接收室的可移动支撑夹座; 矩形容纳室由上部L形片,中部U形片和下部封闭矩形片形成; L形片的一个侧面用片状板延伸; 至少一个引导柱从所述板的一个表面延伸; 引导柱与弹簧组合,以形成可伸缩结构,其可调节以具有用于夹紧物体的期望宽度; 以及由上U形板和下U形板形成的可枢转地接合的可弯曲的轴座。 通过使用镜头组座座将透镜组安装在可动支撑夹座上方。
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公开(公告)号:US20080283971A1
公开(公告)日:2008-11-20
申请号:US12102213
申请日:2008-04-14
IPC分类号: H01L23/488 , H01L21/304
CPC分类号: H01L21/568 , H01L21/6835 , H01L23/3128 , H01L24/27 , H01L24/48 , H01L24/97 , H01L25/0657 , H01L25/105 , H01L25/50 , H01L2221/68345 , H01L2224/274 , H01L2224/48091 , H01L2224/97 , H01L2225/06513 , H01L2225/06551 , H01L2225/06562 , H01L2225/1035 , H01L2225/1058 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/07802 , H01L2924/15184 , H01L2924/15311 , H01L2924/15331 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要: A semiconductor device and a fabrication method thereof are disclosed. The method includes attaching a wafer with a plurality of chips on a carrier board having an insulating layer, a plurality of conductive circuits and a bottom board; forming a plurality of first grooves between solder pads of adjacent chips to expose the conductive circuits, and filling the first grooves with an insulating adhesive layer; forming second grooves in the insulating adhesive layer; and cutting among the chips to separate the chips from one another.
摘要翻译: 公开了一种半导体器件及其制造方法。 该方法包括在具有绝缘层,多个导电电路和底板的载体板上附着具有多个芯片的晶片; 在相邻芯片的焊盘之间形成多个第一凹槽以暴露导电电路,并用绝缘粘合剂层填充第一凹槽; 在所述绝缘粘合剂层中形成第二槽; 并在芯片之间切割以将芯片彼此分离。
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