Abstract:
In some embodiments, a PPM interface may be provided with functionality to facilitate to an OS memory power state management for one or more memory nodes, regardless of a particular platform hardware configuration, as long as the platform hardware is in conformance with the PPM interface.
Abstract:
The present invention relates to a method (50) for controlling an integrated circuit (20) comprising a microprocessor, in which the integrated circuit (20) is configured to execute by default a general program, said integrated circuit being controlled by activation of a mode of operation of the integrated circuit, called “bootstrap mode”, in which said integrated circuit (20) executes a program for loading a specific program to be executed. The method (50) comprises: i) a step (51) of sending at least one bootstrap mode activation message to a test module (200) of the integrated circuit (20) via a test bus (310), ii) a step (52) of activating the bootstrap mode of the integrated circuit (20), executed by the test module (200) of the integrated circuit (20), and iii) a step (53) of loading the specific program via a communication bus (320) different from the test bus (310). The present invention also relates to an integrated circuit (20) and a computer (30) including such an integrated circuit (20).
Abstract:
A conversion system that converts a standard executable program according to a predetermined ISA into a custom executable program executable by a general purpose processor. The processor includes a PEU that is programmable to execute a UDI. The conversion system includes a PEU programming tool that converts a functional description of a processing operation to be performed by the PEU of the processor into programming information for the PEU to perform the processing operation in response to the UDI. A converter converts the standard executable program into the custom executable program and includes an optimization routine that replaces a portion of the standard executable program with the specified UDI and that inserts the UDI into the custom executable program, and that further inserts a UDI load instruction that specifies the UDI and a location of the programming information in the custom executable program.
Abstract:
The present invention relates to a platform power management scheme. In some embodiments, a platform provides a relative performance scale using one or more parameters to be requested by an OSPM system.
Abstract:
Described is a processor comprising: a plurality of radiation detectors; a first logic unit to receive outputs from the plurality of radiation detectors, the logic unit to generate an output according to the received outputs, the output of the first logic unit indicating whether the processor was exposed to incoming radiations; and a second logic unit to receive the output from the first logic unit, and to cause the processor to perform an action according to the output from the first logic unit.
Abstract:
A device for real-time correction of set-point signals intended to receive at the input set-point signals and to deliver at its output set-point signals that are modified to compensate for defects, negative effects or the like subsequently encountered during the processing and/or the application of the set-point signals. This device (1) includes at least one circuit (1′) that is based on a microprogrammed structure and composed of several subassemblies (3, 4, 5, 6, 6′) that work with digital components essentially including a micro-sequencer (3) forming a counter, a memory (4) for storing micro-instructions, and a processing unit (5) combined with at least one working memory (6, 6′) and integrating arithmetic calculation modules (7,7′), whereby the processing unit (5) modifies the data of set-point signals in accordance with the micro-instructions that are addressed by the micro-sequencer (3) and by taking into account the correction coefficients that are provided.
Abstract:
In some embodiments, a PPM interface may be provided with functionality to facilitate an OS memory power state management for one or more memory nodes, regardless of a particular platform hardware configuration, as long as the platform hardware is in conformance with the PPM interface.
Abstract:
In some embodiments, a PPM interface for a computing platform may be provided with functionality to facilitate, to an OS through the PPM interface, hardware component error injection.
Abstract:
A method and circuit arrangement utilize a programmable microcode unit that is capable of being programmed via software to modify the instruction sequences output by the microcode unit in response to microcode instructions issued to the microcode unit. Among other benefits, a programmable microcode unit consistent with the invention enables customization of a processor design to handle specific applications or tasks, as well as to support specific hardware configurations such as specific execution units. In addition, a programmable microcode unit may be updatable, e.g., to correct bugs or faults found in previous instruction sequences supported by the unit.
Abstract:
A data writing method and a micro-operation processing system are provided. The micro-operation processing system is adapted to access a plurality of registers and each of the registers defines at least one logic storing area. The data writing method comprises the following steps: executing a first micro-operation; selecting a target area of the first micro-operation, which has been updated by the second micro-operation before, as one of the logic storing areas; assigning each of the first micro-operation and the second micro-operation a respective identification number; determining that a execution order of the first micro-operation is later than a execution order of the second micro-operation according to the identification numbers of the first micro-operation and the second micro-operation; and recording that the target area has been updated by the first micro-operation.