公开(公告)号：US20250140566A1

公开(公告)日：2025-05-01

申请号：US18495493

申请日：2023-10-26

Applicant: Applied Materials, Inc.

Inventor： Aykut Aydin ,  Rajesh Prasad ,  Fenglin Wang ,  Rui Cheng ,  Karthik Janakiraman ,  Kyu-Ha Shim

IPC: H01L21/3115 ,  H01L21/033 ,  H01L21/311 ,  H10B12/00

Abstract: Thicker hardmasks are typically needed for etching deeper capacitor holes in a DRAM structure. Instead of increasing the hardmask thickness, hardmasks may instead be formed with an increased etch selectivity relative to the underlying semiconductor structure. For example, boron-based hardmasks may be formed that include a relatively high percentage of boron (e.g., greater than 90%). The etch selectivity of the hardmask may be improved by performing an ion implant process using different types of ions. The ion implant may take place before or after opening the hardmask with the pattern for the DRAM capacitor holes. Some designs may also tilt the semiconductor substrate relative to the ion implant process and rotate the substrate to provide greater ion penetration throughout a depth of the openings in the hardmask.

公开(公告)号：US20250112046A1

公开(公告)日：2025-04-03

申请号：US18980163

申请日：2024-12-13

Applicant: Applied Materials, Inc.

Inventor： Yi Yang ,  Krishna Nittala ,  Rui Cheng ,  Karthik Janakiraman ,  Diwakar Kedlaya ,  Zubin Huang ,  Aykut Aydin

IPC: H01L21/033 ,  C23C16/38

Abstract: Exemplary semiconductor processing methods may include flowing a silicon-containing precursor into a substrate processing region of a semiconductor processing chamber. The methods may include flowing a boron-containing precursor into the substrate processing region of the semiconductor processing chamber. The methods may include depositing a boron-and-silicon-containing layer on a substrate in the substrate processing region of the semiconductor processing chamber. The boron-and-silicon-containing layer may be characterized by an increasing ratio of boron-to-silicon from a first surface in contact with the substrate to a second surface of the boron-and-silicon-containing layer opposite the first surface. A flow rate of the boron-containing precursor may be increased during the deposition of the boron-and-silicon-containing layer.

公开(公告)号：US12183578B2

公开(公告)日：2024-12-31

申请号：US17459839

申请日：2021-08-27

Applicant: Applied Materials, Inc.

Inventor： Takehito Koshizawa ,  Rui Cheng ,  Tejinder Singh ,  Hidetaka Oshio

IPC: H01L21/033 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/768

Abstract: In an embodiment, a method for forming features for semiconductor processing. A first mandrel and a second mandrel are formed on a substrate. A first spacer is formed along a first sidewall of the first mandrel, and a second spacer is formed along a second sidewall of the second mandrel. A gap is defined between the first spacer and the second spacer. The gap is filled by a gap-filling material. In some examples, the gap-filling material includes a doped silicon material. In some examples, the first spacer and the second spacer each include a doped silicon material.

公开(公告)号：US20240332003A1

公开(公告)日：2024-10-03

申请号：US18128049

申请日：2023-03-29

Applicant: Applied Materials, Inc.

Inventor： Qinghua Zhao ,  Guoqing Li ,  Rui Cheng

IPC: H01L21/02 ,  C23C16/14 ,  H01J37/32

CPC classification number: H01L21/02175 ,  C23C16/14 ,  H01J37/32146 ,  H01J37/32155 ,  H01J2237/332

Abstract: Exemplary semiconductor processing methods may include providing one or more deposition precursors to a processing region of a semiconductor processing chamber, the deposition precursors may be or include a tungsten-containing precursor. A substrate may be disposed within the processing region of the semiconductor processing chamber. The methods may include forming a plasma of the one or more deposition precursors in the processing region. The plasma may be at least partially formed by an RF power operating at less than or about 3,000 W and at a pulsing frequency less than or about 100,000 Hz. The methods may include forming a layer of material on the substrate. The layer of material may be or include a tungsten-containing material.

公开(公告)号：US12077852B2

公开(公告)日：2024-09-03

申请号：US17240395

申请日：2021-04-26

Applicant: Applied Materials, Inc.

Inventor： Aykut Aydin ,  Rui Cheng ,  Karthik Janakiraman

IPC: C23C16/04 ,  C23C16/18 ,  C23C16/40 ,  C23C22/77 ,  C23C22/82

CPC classification number: C23C16/042 ,  C23C16/18 ,  C23C16/402 ,  C23C22/77 ,  C23C22/82

Abstract: Exemplary deposition methods may include delivering a boron-containing precursor to a processing region of a semiconductor processing chamber. The methods may include delivering a dopant-containing precursor with the boron-containing precursor. The dopant-containing precursor may include a metal. The methods may include forming a plasma of all precursors within the processing region of the semiconductor processing chamber. The methods may include depositing a doped-boron material on a substrate disposed within the processing region of the semiconductor processing chamber. The doped-boron material may include greater than or about 80 at. % of boron in the doped-boron material.

公开(公告)号：US12033848B2

公开(公告)日：2024-07-09

申请号：US17352039

申请日：2021-06-18

Applicant: Applied Materials, Inc.

Inventor： Aykut Aydin ,  Rui Cheng ,  Karthik Janakiraman ,  Abhijit B. Mallick ,  Takehito Koshizawa ,  Bo Qi

IPC: H01L21/02

CPC classification number: H01L21/02123 ,  H01L21/02211 ,  H01L21/02271

Abstract: Embodiments of the present disclosure generally relate to processes for forming silicon- and boron-containing films for use in, e.g., spacer-defined patterning applications. In an embodiment, a spacer-defined patterning process is provided. The process includes disposing a substrate in a processing volume of a processing chamber, the substrate having patterned features formed thereon, and flowing a first process gas into the processing volume, the first process gas comprising a silicon-containing species, the silicon-containing species having a higher molecular weight than SiH4. The process further includes flowing a second process gas into the processing volume, the second process gas comprising a boron-containing species, and depositing, under deposition conditions, a conformal film on the patterned features, the conformal film comprising silicon and boron.

公开(公告)号：US11939675B2

公开(公告)日：2024-03-26

申请号：US16636659

申请日：2018-08-10

Applicant: Applied Materials, Inc.

Inventor： Rui Cheng ,  Karthik Janakiraman ,  Zubin Huang

IPC: C23C16/455 ,  C23C16/458 ,  C23C16/46

CPC classification number: C23C16/45565 ,  C23C16/4585 ,  C23C16/46

Abstract: In one aspect, an apparatus includes a chamber body, a blocker plate for delivering process gases into a gas mixing volume, and a face plate having holes through which the mixed gas is distributed to a substrate. In another aspect, the face plate may include a first region with a recess relative to a second region. In another aspect, the blocker plate may include a plurality of regions, each region having different hole patterns/geometries and/or flow profiles. In another aspect, the apparatus may include a radiation shield disposed below a bottom of the substrate support. A shaft or stem of the substrate support includes holes at an upper end thereof near the substrate support.

公开(公告)号：US20230298892A1

公开(公告)日：2023-09-21

申请号：US18016926

申请日：2021-07-21

Applicant: Applied Materials, Inc.

Inventor： Rui Cheng ,  Rajesh Prasad ,  Karthik Janakiraman ,  Gautam K. Hemani ,  Krishna Nittala ,  Shan Tang ,  Qi Gao

IPC: H01L21/265 ,  H01L21/02

CPC classification number: H01L21/26506 ,  H01L21/02532 ,  H01L21/02592

Abstract: Exemplary methods of semiconductor processing may include forming a layer of amorphous silicon on a semiconductor substrate. The layer of amorphous silicon may be characterized by a first amount of hydrogen incorporation. The methods may include performing a beamline ion implantation process or plasma doping process on the layer of amorphous silicon. The methods may include removing hydrogen from the layer of amorphous silicon to a second amount of hydrogen incorporation less than the first amount of hydrogen incorporation.

公开(公告)号：US11640905B2

公开(公告)日：2023-05-02

申请号：US17125349

申请日：2020-12-17

Applicant: Applied Materials, Inc.

Inventor： Aykut Aydin ,  Rui Cheng ,  Karthik Janakiraman

IPC: H01L21/02 ,  C23C16/455

Abstract: Exemplary deposition methods may include flowing a silicon-containing precursor into a processing region of a semiconductor processing chamber. The method may include striking a plasma in the processing region between a faceplate and a pedestal of the semiconductor processing chamber. The pedestal may support a substrate including a patterned photoresist. The method may include maintaining a temperature of the substrate less than or about 200° C. The method may also include depositing a silicon-containing film along the patterned photoresist.

公开(公告)号：US11527408B2

公开(公告)日：2022-12-13

申请号：US16867095

申请日：2020-05-05

Applicant: Applied Materials, Inc.

Inventor： Tzu-shun Yang ,  Rui Cheng ,  Karthik Janakiraman ,  Zubin Huang ,  Diwakar Kedlaya ,  Meenakshi Gupta ,  Srinivas Guggilla ,  Yung-chen Lin ,  Hidetaka Oshio ,  Chao Li ,  Gene Lee

IPC: H01L21/033 ,  H01L21/311 ,  H01L21/3213

Abstract: The present disclosure provides forming nanostructures utilizing multiple patterning process with good profile control and feature transfer integrity. In one embodiment, a method for forming features on a substrate includes forming a first mandrel layer on a material layer disposed on a substrate. A first spacer layer is conformally formed on sidewalls of the first mandrel layer, wherein the first spacer layer comprises a doped silicon material. The first mandrel layer is selectively removed while keeping the first spacer layer. A second spacer layer is conformally formed on sidewalls of the first spacer layer and selectively removing the first spacer layer while keeping the second spacer layer.