Extensible three dimensional circuit having parallel array channels
    51.
    发明授权
    Extensible three dimensional circuit having parallel array channels 有权
    具有并行阵列通道的可扩展三维电路

    公开(公告)号:US08351234B2

    公开(公告)日:2013-01-08

    申请号:US12770539

    申请日:2010-04-29

    IPC分类号: G11C5/06

    CPC分类号: G11C5/06

    摘要: An extensible three dimensional circuit having parallel array channels includes an access layer and crossbar array layers overlying the access layer and being electrically connected to the access layer. The crossbar array layers include parallel channels, the parallel channels being formed from two classes of vias, the first class being pillar vias connected to relatively short stub lines, and the second class being traveling-line vias connected to long lines that travel away from the via; pillar vias and traveling-line vias being configured to connect to crossing lines such that each crossing point between the lines is uniquely addressed by one pillar via and one traveling-line via. Programmable crosspoint devices are disposed between the crossing lines.

    摘要翻译: 具有并行阵列通道的可扩展三维电路包括覆盖接入层并且与电路连接到接入层的接入层和交叉开关阵列层。 交叉开关阵列层包括并行通道,并行通道由两类通孔形成,第一类是连接到相对短的短线的支柱通孔,第二类是连接到远离线的长线的行进通路 通过; 支柱通孔和行进通路被配置为连接到交叉线,使得线之间的每个交叉点由一个支柱通孔和一个行进通路唯一地寻址。 可编程交叉点装置设置在交叉线之间。

    INTERCONNECTION ARCHITECTURE FOR MEMORY STRUCTURES
    52.
    发明申请
    INTERCONNECTION ARCHITECTURE FOR MEMORY STRUCTURES 审中-公开
    内存结构互连架构

    公开(公告)号:US20120327698A1

    公开(公告)日:2012-12-27

    申请号:US13384004

    申请日:2010-03-12

    申请人: Frederick Perner

    发明人: Frederick Perner

    IPC分类号: G11C5/06

    摘要: An interconnect architecture for connecting read/write circuitry to a memory structure, the interconnect architecture includes a switching layer having a number of access switches arranged in at least one set of two offset switch blocks, the access switches being connected to a first set of parallel wire tracks and a second set of parallel wire tracks intersecting the first set of parallel wire tracks; and a routing layer connecting the switches to a number of access vias of the memory structure; in which four wire tracks are used to select a programmable device of the memory structure.

    摘要翻译: 一种用于将读/写电路连接到存储器结构的互连架构,所述互连架构包括具有布置在至少一组两个偏移开关块中的多个接入交换机的交换层,所述接入交换机连接到第一组并行 线轨道和与第一组平行线轨道相交的第二组平行线轨道; 以及将交换机连接到存储器结构的多个接入通路的路由层; 其中使用四条线轨来选择存储器结构的可编程器件。

    SENSE AMPLIFIER FOR READING A CROSSBAR MEMORY ARRAY
    53.
    发明申请
    SENSE AMPLIFIER FOR READING A CROSSBAR MEMORY ARRAY 有权
    用于读取交叉记忆体阵列的感测放大器

    公开(公告)号:US20110305063A1

    公开(公告)日:2011-12-15

    申请号:US12813003

    申请日:2010-06-10

    申请人: Frederick Perner

    发明人: Frederick Perner

    IPC分类号: G11C11/00 G11C7/06

    摘要: A sense amplifier for reading the data stored in a crossbar array includes a storage transistor to store a first voltage resulting from an electric current from a column line connected to a target memory element while the target memory element is half-selected, the first voltage resulting from bias voltages applied to row lines not connected to the target memory element; a mirror transistor to store a second voltage resulting from an electric current from the column line while the target memory element is fully selected; a cross-coupled inverter circuit having a first branch connected to the storage transistor and a second branch connected to the mirror transistor; and an output node to output a signal from the first branch of the cross-coupled inverter circuit, the signal based on a comparison between the first voltage stored in the storage transistor and the second voltage across the mirror transistor.

    摘要翻译: 用于读取存储在交叉开关阵列中的数据的读出放大器包括一个存储晶体管,用于在目标存储器元件被半选择时存储来自连接到目标存储元件的列线的电流产生的第一电压,产生第一电压 从施加到未连接到目标存储元件的行线的偏置电压; 反射镜晶体管,用于在目标存储元件完全选择时存储来自列线的电流产生的第二电压; 交叉耦合的反相器电路,具有连接到存储晶体管的第一分支和连接到反射镜晶体管的第二分支; 以及输出节点,用于输出来自交叉耦合的反相器电路的第一分支的信号,该信号基于存储在存储晶体管中的第一电压与镜面晶体管两端的第二电压之间的比较。

    Reading Memory Elements Within a Crossbar Array
    54.
    发明申请
    Reading Memory Elements Within a Crossbar Array 有权
    读取Crossbar数组内的内存元素

    公开(公告)号:US20110286259A1

    公开(公告)日:2011-11-24

    申请号:US12786073

    申请日:2010-05-24

    申请人: Frederick Perner

    发明人: Frederick Perner

    IPC分类号: G11C11/00 G11C7/06

    摘要: A method for reading the state of a memory element within a crossbar memory array includes storing a first electric current sensed from a half-selected target memory element within the crossbar memory array; and outputting a final electric current based on the stored first electric current and a second electric current sensed from the target memory element when the target memory element is fully selected.

    摘要翻译: 用于读取交叉开关存储器阵列中的存储器元件的状态的方法包括将从半选择的目标存储器元件感测的第一电流存储在所述横向存储器阵列内; 并且当所述目标存储器元件被完全选择时,基于所存储的第一电流和从所述目标存储元件感测的第二电流输出最终电流。

    Controllably connectable strings of MRAM cells
    55.
    发明申请
    Controllably connectable strings of MRAM cells 有权
    可控连接的MRAM单元串

    公开(公告)号:US20070097733A1

    公开(公告)日:2007-05-03

    申请号:US11264539

    申请日:2005-11-01

    IPC分类号: G11C11/00

    CPC分类号: G11C11/16

    摘要: A memory device and method of reading the memory device is disclosed. The memory device includes a first string of MRAM cells and a second string of MRAM cells. The first string of MRAM cells include a plurality of MRAM cells connected in series and the second string of MRAM cells include another plurality of MRAM cells connected in series. A common connection is controllably connectable to one end of the first string of MRAM cells, and to one end of the second string of MRAM cells.

    摘要翻译: 公开了一种读取存储器件的存储器件和方法。 存储器件包括MRAM单元的第一串和MRAM单元的第二串。 MRAM单元的第一串包括串联连接的多个MRAM单元,并且第二串MRAM单元包括串联连接的另外多个MRAM单元。 公共连接可控地连接到MRAM单元的第一串的一端,并连接到第二串MRAM单元的一端。

    Method and system for minimizing differential amplifier power supply sensitivity
    56.
    发明授权
    Method and system for minimizing differential amplifier power supply sensitivity 有权
    最小化差分放大器电源灵敏度的方法和系统

    公开(公告)号:US07023277B1

    公开(公告)日:2006-04-04

    申请号:US11129115

    申请日:2005-05-12

    IPC分类号: H03F3/45

    摘要: The invention includes an apparatus and a method for minimizing power supply sensitivity of a differential amplifier. The apparatus includes a current source providing a differential amplifier bias current to a common source node of the differential amplifier. A voltage sensor senses variations of a power supply associated with the current source. Variations sensed by the voltage sensor control a magnitude of the differential amplifier bias current. The method includes a current source providing the source current. A voltage potential of the common source node is sensed. The current source is adjusted depending upon the sensed voltage potential of the common source node, thereby adjusting a magnitude of the source current.

    摘要翻译: 本发明包括一种用于最小化差分放大器的电源灵敏度的装置和方法。 该装置包括电流源,其向差分放大器的公共源节点提供差分放大器偏置电流。 电压传感器感测与电流源相关联的电源的变化。 由电压传感器检测的变化控制差动放大器偏置电流的幅度。 该方法包括提供源电流的电流源。 感测到公共源节点的电压电位。 电流源根据感测到的公共源节点的电压电位进行调节,从而调节源极电流的幅度。

    Method and apparatus for a sense amplifier

    公开(公告)号:US20060050582A1

    公开(公告)日:2006-03-09

    申请号:US10934719

    申请日:2004-09-03

    申请人: Frederick Perner

    发明人: Frederick Perner

    IPC分类号: G11C7/00

    摘要: A gain stage in a sense amplifier receives an input signal representing a stored value and senses if the input signal is less than or not less than a reference signal and generates an output signal indicative of a first state when the input signal is less than the reference signal and an output signal indicative of a second state when the input signal is not less than the reference signal. The gain stage further comprises an integrated latch configured to latch the output signal in either the first or second state. Additionally, a controller operates a sense amplifier having multiple operating modes. Sample mode switch logic causes the sense amplifier to sample a first voltage applied to the sense amplifier's input and hold and compare mode switch logic causes the sense amplifier to hold the first voltage for comparison with a second voltage applied to the sense amplifier's input.

    Two conductor thermally assisted magnetic memory
    58.
    发明申请
    Two conductor thermally assisted magnetic memory 有权
    两导体热辅助磁存储器

    公开(公告)号:US20050237795A1

    公开(公告)日:2005-10-27

    申请号:US10832912

    申请日:2004-04-26

    IPC分类号: G11C11/16 G11C11/14

    CPC分类号: G11C11/16 G11C11/1675

    摘要: A method of performing a thermally assisted write operation on a selected two conductor spin valve memory (SVM) cell having a material wherein the coercivity is decreased upon an increase in temperature. In a particular embodiment, a first write magnetic field is established by a first write current flowing from a first voltage potential to a second voltage potential as applied to the first conductor. A second write magnetic field is established by a second write current flowing from a third voltage potential to a fourth voltage potential as applied to the second conductor. The voltage potential of the first conductor is greater than the voltage potential of the second conductor. As a result, a third current, flows from the first conductor through the SVM cell to the second conductor. The SVM cell has an internal resistance such that the flowing current generates heat within the SVM cell. As the SVM cell is self heated, the coercivity of the SVM cell falls below the combined write magnetic fields.

    摘要翻译: 在具有其中矫顽力在温度升高时减小的材料的所选择的两个导体自旋阀存储器(SVM)单元上进行热辅助写入操作的方法。 在特定实施例中,当施加到第一导体时,通过从第一电压电位流向第二电压电位的第一写入电流建立第一写入磁场。 第二写入磁场通过施加到第二导体的从第三电压电位流向第四电压电位的第二写入电流来建立。 第一导体的电压电位大于第二导体的电压电位。 结果,第三电流从第一导体流过SVM电池流到第二导体。 SVM单元具有内部电阻,使得流动电流在SVM单元内产生热量。 由于SVM单元是自加热的,所以SVM单元的矫顽力低于组合的写入磁场。

    Soft-reference three conductor magnetic memory storage device
    59.
    发明申请
    Soft-reference three conductor magnetic memory storage device 有权
    软参考三芯磁存储器

    公开(公告)号:US20050213375A1

    公开(公告)日:2005-09-29

    申请号:US10806709

    申请日:2004-03-23

    CPC分类号: G11C11/16

    摘要: A soft-reference three conductor magnetic memory storage device is disclosed. In a particular embodiment, there are a plurality of parallel electrically conductive first sense/write conductors and a plurality of parallel electrically conductive second sense conductors. The first sense/write and second sense conductors may provide a cross point array. Soft-reference magnetic memory cells are provided in electrical contact with and located at each intersection. In addition there are a plurality of parallel electrically conductive third write column conductors substantially proximate to and electrically isolated from the second sense conductors. Sense magnetic fields orient the soft-reference layer but do not alter the data stored within the cell. An associated method of use is also provided.

    摘要翻译: 公开了一种软参考三导体磁存储器。 在特定实施例中,存在多个平行导电的第一读/写导体和多个平行导电的第二感测导体。 第一感测/写入和第二感测导体可以提供交叉点阵列。 软参考磁存储单元与每个交叉点电接触并位于其中。 此外,还存在多个平行导电的第三写列导体,其基本上接近第二感测导体并与第二感测导体电隔离。 感应磁场定向软参考层,但不改变存储在单元内的数据。 还提供了相关联的使用方法。

    Thin film device and a method of providing thermal assistance therein
    60.
    发明申请
    Thin film device and a method of providing thermal assistance therein 审中-公开
    薄膜装置及其中提供热辅助的方法

    公开(公告)号:US20050185456A1

    公开(公告)日:2005-08-25

    申请号:US11112691

    申请日:2005-04-21

    摘要: A thin film device and a method of providing thermal assistance therein is disclosed. Accordingly, a heater material is utilized to thermally assist in the operation of the thin film device. By utilizing a heater material to thermally assist in the operation of the thin film device, a substantial improvement in the accuracy and performance of the thin film device is achieved. A first aspect of the present invention is a thin film device. The thin film device includes at least one patterned thin film layer, a heater material coupled to the at least one patterned thin film layer for providing thermal assistance to the at least one of the patterned thin film layers and a conductor coupled to the heater material for supplying energy to the heater material.

    摘要翻译: 公开了薄膜装置及其中提供热辅助的方法。 因此,使用加热器材料来热辅助薄膜器件的操作。 通过利用加热材料热辅助薄膜器件的操作,实现了薄膜器件的精度和性能的显着提高。 本发明的第一方面是一种薄膜器件。 所述薄膜器件包括至少一个图案化薄膜层,耦合到所述至少一个图案化薄膜层的加热器材料,用于向所述图案化薄膜层中的至少一个提供热辅助,以及耦合到所述加热器材料的导体, 向加热器材料供应能量。