公开(公告)号：US10748823B2

公开(公告)日：2020-08-18

申请号：US16145143

申请日：2018-09-27

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Yann Mignot ,  Alan Thomas ,  Daniel Sanders ,  Dario Goldfarb ,  Nelson Felix ,  Chi-Chun Liu ,  John Arnold

IPC: H01L21/00 ,  H01L21/66 ,  H01L21/02 ,  H01L21/311

Abstract: An exemplary semiconductor wafer includes a lower sublayer of a first organic planarization layer (OPL) material; an upper sublayer of a second OPL material deposited onto the lower sublayer; and a detectable interface between the lower sublayer and the upper sublayer. The exemplary wafer is fabricated by depositing the lower sublayer; curing the lower sublayer; and after curing the lower sublayer, depositing the upper sublayer directly onto the lower sublayer.

公开(公告)号：US10656527B2

公开(公告)日：2020-05-19

申请号：US15850192

申请日：2017-12-21

Applicant: International Business Machines Corporation

Inventor： Ekmini Anuja De Silva ,  Indira Seshadri ,  Jing Guo ,  Ashim Dutta ,  Nelson Felix

IPC: G03F7/40 ,  G03F7/20 ,  H01L21/308 ,  H01L21/027 ,  G03F1/22 ,  H01L21/033 ,  G03F1/54

Abstract: A lithographic patterning method includes forming a multi-layer patterning material film stack on a semiconductor substrate. Forming the patterning material film stack more particularly includes forming a hard mask layer and forming a resist layer over the hard mask layer. The hard mask layer is configured to support selective deposition of a metal-containing layer on the resist layer, the selective deposition of the metal-containing layer on the resist layer occurring after pattern development. The method further includes exposing the multi-layer patterning material film stack to patterning radiation to form a desired pattern in the resist layer, developing the pattern formed in the resist layer, and selectively depositing the metal-containing layer on the developed pattern in the resist layer. The selective deposition avoids deposition of the metal-containing layer on portions of the hard mask layer corresponding to respective openings in the resist layer.

公开(公告)号：US20190391481A1

公开(公告)日：2019-12-26

申请号：US16015994

申请日：2018-06-22

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Yongan Xu ,  Zhenxing Bi ,  Yann Mignot ,  Nelson Felix ,  Ekmini A. De Silva

IPC: G03F1/22 ,  G03F7/20 ,  G03F7/42

Abstract: A method of removing layers of an extreme ultraviolet (EUV) pattern stack is provided. The method includes forming one or more resist templates on an upper hardmask layer. The method further includes exposing portions of the surface of the upper hardmask layer to a dry etch process to produce modified and activated surfaces. The method further includes etching the modified and activated surfaces to expose an underlying organic planarization layer.

公开(公告)号：US20190295841A1

公开(公告)日：2019-09-26

申请号：US16424950

申请日：2019-05-29

Applicant: International Business Machines Corporation

Inventor： Ekmini A. De Silva ,  Nelson Felix ,  Jing Guo ,  Indira Seshadri

IPC: H01L21/02 ,  G03F7/09 ,  H01L21/28 ,  H01L29/49 ,  H01L21/321

Abstract: Embodiments of the present invention are directed to the wet stripping of an organic planarization layer (OPL) using reversible UV crosslinking and de-crosslinking. In a non-limiting embodiment of the invention, an interlayer dielectric is formed over a substrate. A trench is formed in the interlayer dielectric. A work function metal is formed over the interlayer dielectric such that a portion of the work function metal partially fills the trench. A UV sensitive OPL is formed over the work function metal such that a portion of the UV sensitive OPL fills the trench. The UV sensitive OPL can be crosslinked by applying light at a first UV frequency and de-crosslinked by applying light at a second UV frequency.

公开(公告)号：US20190267234A1

公开(公告)日：2019-08-29

申请号：US16404312

申请日：2019-05-06

Applicant: International Business Machines Corporation

Inventor： Ekmini Anuja De Silva ,  Dario Goldfarb ,  Nelson Felix ,  Daniel Corliss ,  Rudy J. Wojtecki

IPC: H01L21/027 ,  H01L21/308 ,  H01L21/3213 ,  H01L21/033 ,  G03F7/09 ,  G03F7/20 ,  G03F7/26

Abstract: A lithographic patterning method includes forming a multi-layer patterning material film stack on a semiconductor substrate, the patterning material film stack including a resist layer formed over one or more additional layers, and forming a metal-containing top coat over the resist layer. The method further includes exposing the multi-layer patterning material film stack to patterning radiation through the metal-containing top coat to form a desired pattern in the resist layer, removing the metal-containing top coat, developing the pattern formed in the resist layer, etching at least one underlying layer in accordance with the developed pattern, and removing remaining portions of the resist layer. The metal-containing top coat can be formed, for example, by atomic layer deposition or spin-on deposition over the resist layer, or by self-segregation from the resist layer.

公开(公告)号：US10388510B2

公开(公告)日：2019-08-20

申请号：US15869258

申请日：2018-01-12

Applicant: International Business Machines Corporation

Inventor： Ekmini A. De Silva ,  Nelson Felix ,  Jing Guo ,  Indira Seshadri

IPC: H01L21/8234 ,  H01L21/02 ,  H01L21/321 ,  H01L29/49 ,  G03F7/09 ,  H01L21/28 ,  H01L29/06 ,  H01L29/78

Abstract: Embodiments of the present invention are directed to the wet stripping of an organic planarization layer (OPL) using reversible UV crosslinking and de-crosslinking. In a non-limiting embodiment of the invention, an interlayer dielectric is formed over a substrate. A trench is formed in the interlayer dielectric. A work function metal is formed over the interlayer dielectric such that a portion of the work function metal partially fills the trench. A UV sensitive OPL is formed over the work function metal such that a portion of the UV sensitive OPL fills the trench. The UV sensitive OPL can be crosslinked by applying light at a first UV frequency and de-crosslinked by applying light at a second UV frequency.

公开(公告)号：US20190221423A1

公开(公告)日：2019-07-18

申请号：US15869258

申请日：2018-01-12

Applicant: International Business Machines Corporation

Inventor： Ekmini A. De Silva ,  Nelson Felix ,  Jing Guo ,  Indira Seshadri

IPC: H01L21/02 ,  H01L21/28 ,  H01L21/321 ,  H01L29/49 ,  G03F7/09

CPC classification number: H01L21/02074 ,  G03F7/091 ,  G03F7/094 ,  H01L21/28088 ,  H01L21/32115 ,  H01L29/0649 ,  H01L29/4966 ,  H01L29/7851

Abstract: Embodiments of the present invention are directed to the wet stripping of an organic planarization layer (OPL) using reversible UV crosslinking and de-crosslinking. In a non-limiting embodiment of the invention, an interlayer dielectric is formed over a substrate. A trench is formed in the interlayer dielectric. A work function metal is formed over the interlayer dielectric such that a portion of the work function metal partially fills the trench. A UV sensitive OPL is formed over the work function metal such that a portion of the UV sensitive OPL fills the trench. The UV sensitive OPL can be crosslinked by applying light at a first UV frequency and de-crosslinked by applying light at a second UV frequency.

公开(公告)号：US10354922B1

公开(公告)日：2019-07-16

申请号：US15855383

申请日：2017-12-27

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Ekmini Anuja De Silva ,  Indira Seshadri ,  Romain Lallement ,  Nelson Felix

IPC: H01L21/324 ,  H01L21/8238 ,  H01L21/265 ,  H01L29/66 ,  H01L29/32 ,  H01L21/8234 ,  H01L21/266 ,  H01L21/311 ,  H01L21/3105 ,  H01L21/308 ,  H01L21/3065

Abstract: Semiconductor devices and methods of forming the same include forming a wet-strippable hardmask over semiconductor fins. The wet-strippable hardmask is anisotropically etched away in a first device region. At least one semiconductor fin is doped in the first device region. The wet-strippable hardmask is isotropically etched away in a second device region. Semiconductor devices are formed from the fins in the first and second device regions.

公开(公告)号：US20190198398A1

公开(公告)日：2019-06-27

申请号：US15855383

申请日：2017-12-27

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Ekmini Anuja De Silva ,  Indira Seshadri ,  Romain Lallement ,  Nelson Felix

IPC: H01L21/8234 ,  H01L21/266 ,  H01L21/311 ,  H01L21/3105 ,  H01L21/265 ,  H01L21/308

CPC classification number: H01L21/823431 ,  H01L21/26513 ,  H01L21/266 ,  H01L21/3065 ,  H01L21/3081 ,  H01L21/31058 ,  H01L21/31111 ,  H01L21/823418 ,  H01L21/823437 ,  H01L21/823475

Abstract: Semiconductor devices and methods of forming the same include forming a wet-strippable hardmask over semiconductor fins. The wet-strippable hardmask is anisotropically etched away in a first device region. At least one semiconductor fin is doped in the first device region. The wet-strippable hardmask is isotropically etched away in a second device region. Semiconductor devices are formed from the fins in the first and second device regions.

公开(公告)号：US12261044B2

公开(公告)日：2025-03-25

申请号：US17759896

申请日：2021-02-23

Applicant: Lam Research Corporation ,  International Business Machines Corporation

Inventor： Bhaskar Nagabhirava ,  Phillip Friddle ,  Ekimini Anuja De Silva ,  Jennifer Church ,  Dominik Metzler ,  Nelson Felix

IPC: H01L21/033 ,  H01J37/32 ,  H01L21/311

Abstract: Various embodiments herein relate to methods, apparatus, and systems that utilize a multi-layer hardmask in the context of patterning a semiconductor substrate using extreme ultraviolet photoresist. The multi-layer hardmask includes (1) an upper layer that includes a metal-containing material such as a metal oxide, a metal nitride, or a metal oxynitride, and (2) a lower layer that includes an inorganic dielectric silicon-containing material. Together, these layers of the multi-layer hardmask provide excellent etch selectivity and reduce formation of defects such as microbridges and line breaks. Certain embodiments relate to deposition of the multi-layer hardmask. Other embodiments relate to etching of the multi-layer hardmask. Some embodiments involve both deposition and etching of the multi-layer hardmask.