公开(公告)号：US20130161780A1

公开(公告)日：2013-06-27

申请号：US13335329

申请日：2011-12-22

申请人： Isik C. Kizilyalli ,  Hui Nie ,  Andrew P. Edwards ,  Richard J. Brown ,  Donald R. Disney

发明人： Isik C. Kizilyalli ,  Hui Nie ,  Andrew P. Edwards ,  Richard J. Brown ,  Donald R. Disney

IPC分类号： H01L29/868 ,  H01L21/20

CPC分类号： H01L29/868 ,  H01L29/0615 ,  H01L29/0649 ,  H01L29/2003 ,  H01L29/66204 ,  H01L29/66212 ,  H01L29/6631 ,  H01L29/66924

摘要： A III-nitride semiconductor device includes an active region for supporting current flow during forward-biased operation of the III-nitride semiconductor device. The active region includes a first III-nitride epitaxial material having a first conductivity type, and a second III-nitride epitaxial material having a second conductivity type. The III-nitride semiconductor device further includes an edge-termination region physically adjacent to the active region and including an implanted region comprising a portion of the first III-nitride epitaxial material. The implanted region of the first III-nitride epitaxial material has a reduced electrical conductivity in relation to portions of the first III-nitride epitaxial material adjacent to the implanted region

公开(公告)号：US20130161634A1

公开(公告)日：2013-06-27

申请号：US13335383

申请日：2011-12-22

申请人： Donald R. Disney ,  Isik C. Kizilyalli ,  Linda Romano ,  Andrew Edwards ,  Hui Nie

发明人： Donald R. Disney ,  Isik C. Kizilyalli ,  Linda Romano ,  Andrew Edwards ,  Hui Nie

IPC分类号： H01L29/18 ,  H01L21/302

CPC分类号： H01L29/872 ,  H01L21/0495 ,  H01L21/2654 ,  H01L21/76224 ,  H01L29/0611 ,  H01L29/0619 ,  H01L29/0649 ,  H01L29/0692 ,  H01L29/2003 ,  H01L29/402

摘要： A method for fabricating an edge termination, which can be used in conjunction with GaN-based materials, includes providing a substrate of a first conductivity type. The substrate has a first surface and a second surface. The method also includes forming a first GaN epitaxial layer of the first conductivity type coupled to the first surface of the substrate and forming a second GaN epitaxial layer of a second conductivity type opposite to the first conductivity type. The second GaN epitaxial layer is coupled to the first GaN epitaxial layer. The substrate, the first GaN epitaxial layer and the second GaN epitaxial layer can be referred to as an epitaxial structure.

摘要翻译： 可以与GaN基材料一起使用的用于制造边缘终端的方法包括提供第一导电类型的衬底。 基板具有第一表面和第二表面。 该方法还包括形成耦合到衬底的第一表面的第一导电类型的第一GaN外延层，并形成与第一导电类型相反的第二导电类型的第二GaN外延层。 第二GaN外延层耦合到第一GaN外延层。 衬底，第一GaN外延层和第二GaN外延层可以被称为外延结构。

公开(公告)号：US20130161633A1

公开(公告)日：2013-06-27

申请号：US13334742

申请日：2011-12-22

申请人： Hui Nie ,  Andrew P. Edwards ,  Donald R. Disney ,  Richard J. Brown ,  Isik C. Kizilyalli

发明人： Hui Nie ,  Andrew P. Edwards ,  Donald R. Disney ,  Richard J. Brown ,  Isik C. Kizilyalli

IPC分类号： H01L29/20 ,  H01L21/20

CPC分类号： H01L21/0254 ,  H01L21/2654 ,  H01L21/266 ,  H01L29/0611 ,  H01L29/0642 ,  H01L29/0692 ,  H01L29/2003 ,  H01L29/66204 ,  H01L29/66212 ,  H01L29/66924 ,  H01L29/8083 ,  H01L29/861 ,  H01L29/872

摘要： A semiconductor structure includes a GaN substrate having a first surface and a second surface opposing the first surface. The GaN substrate is characterized by a first conductivity type and a first dopant concentration. The semiconductor structure also includes a first GaN epitaxial layer of the first conductivity type coupled to the second surface of the GaN substrate and a second GaN epitaxial layer of a second conductivity type coupled to the first GaN epitaxial layer. The second GaN epitaxial layer includes an active device region, a first junction termination region characterized by an implantation region having a first implantation profile, and a second junction termination region characterized by an implantation region having a second implantation profile.

摘要翻译： 半导体结构包括具有第一表面和与第一表面相对的第二表面的GaN衬底。 GaN衬底的特征在于第一导电类型和第一掺杂剂浓度。 半导体结构还包括耦合到GaN衬底的第二表面的第一导电类型的第一GaN外延层和耦合到第一GaN外延层的第二导电类型的第二GaN外延层。 第二GaN外延层包括有源器件区，第一结端接区，其特征在于具有第一注入分布的注入区，以及第二结终端区，其特征在于具有第二注入分布的注入区。

公开(公告)号：US09691921B2

公开(公告)日：2017-06-27

申请号：US12904047

申请日：2010-10-13

申请人： Harry Atwater ,  Brendan Kayes ,  Isik C. Kizilyalli ,  Hui Nie

发明人： Harry Atwater ,  Brendan Kayes ,  Isik C. Kizilyalli ,  Hui Nie

IPC分类号： H01L31/00 ,  H01L21/00 ,  H01L31/0232 ,  H01L31/056 ,  H01L31/0304 ,  H01L31/0236 ,  H01L31/18 ,  H01L31/20 ,  H01L31/0693

CPC分类号： H01L31/02327 ,  H01L31/0236 ,  H01L31/02366 ,  H01L31/0304 ,  H01L31/03046 ,  H01L31/056 ,  H01L31/0693 ,  H01L31/18 ,  H01L31/184 ,  H01L31/1844 ,  H01L31/1852 ,  H01L31/208 ,  Y02E10/50 ,  Y02E10/52 ,  Y02E10/544

摘要： Embodiments of the invention generally relate to device fabrication of thin films used as solar devices or other electronic devices, and include textured back reflectors utilized in solar applications. In one embodiment, a method for forming a textured metallic back reflector which includes depositing a metallic layer on a gallium arsenide material within a thin film stack, forming an array of metallic islands from the metallic layer during an annealing process, removing or etching material from the gallium arsenide material to form apertures between the metallic islands, and depositing a metallic reflector layer to fill the apertures and cover the metallic islands. In another embodiment, a textured metallic back reflector includes an array of metallic islands disposed on a gallium arsenide material, a plurality of apertures disposed between the metallic islands and extending into the gallium arsenide material, a metallic reflector layer disposed over the metallic islands, and a plurality of reflector protrusions formed between the metallic islands and extending from the metallic reflector layer and into the apertures formed in the gallium arsenide material.

公开(公告)号：US09178099B2

公开(公告)日：2015-11-03

申请号：US13451439

申请日：2012-04-19

申请人： Hui Nie ,  Brendan M. Kayes ,  Isik C. Kizilyalli

发明人： Hui Nie ,  Brendan M. Kayes ,  Isik C. Kizilyalli

IPC分类号： H01L31/0304 ,  H01L31/0735 ,  H01L31/0224 ,  H01L31/18

CPC分类号： H01L31/0735 ,  H01L31/022441 ,  H01L31/1896 ,  Y02E10/52 ,  Y02E10/544

摘要： Embodiments generally relate to optoelectronic semiconductor devices such as photovoltaic cells. In one aspect, a method for forming a device includes forming an absorber layer made of gallium arsenide (GaAs) and having one type of doping, and forming an emitter layer made of a different material and having a higher bandgap than the absorber layer. An intermediate layer can be formed between emitter and absorber layers. A heterojunction and p-n junction are formed between the emitter layer and the absorber layer, where the p-n junction is formed at least partially within the different material at a location offset from the heterojunction. A majority of the absorber layer can be outside of a depletion region formed by the p-n junction. The p-n junction causes a voltage to be generated in the cell in response to the cell being exposed to light at a front side.

摘要翻译： 实施例通常涉及诸如光伏电池的光电半导体器件。 一方面，用于形成器件的方法包括形成由砷化镓（GaAs）制成并具有一种类型的掺杂的吸收层，并形成由不同材料制成并具有比吸收层更高的带隙的发射极层。 可以在发射极和吸收层之间形成中间层。 在发射极层和吸收层之间形成异质结和p-n结，其中在与异质结偏离的位置处至少部分地在不同的材料内形成p-n结。 吸收层的大部分可以在由p-n结形成的耗尽区的外部。 p-n结导致电池响应于电池暴露于正面的光而产生电压。

公开(公告)号：US09082919B2

公开(公告)日：2015-07-14

申请号：US13451439

申请日：2012-04-19

申请人： Hui Nie ,  Brendan M. Kayes ,  Isik C. Kizilyalli

发明人： Hui Nie ,  Brendan M. Kayes ,  Isik C. Kizilyalli

IPC分类号： H01L31/0304 ,  H01L31/0735 ,  H01L31/0224 ,  H01L31/18

摘要： Embodiments generally relate to optoelectronic semiconductor devices such as photovoltaic cells. In one aspect, a method for forming a device includes forming an absorber layer made of gallium arsenide (GaAs) and having one type of doping, and forming an emitter layer made of a different material and having a higher bandgap than the absorber layer. An intermediate layer can be formed between emitter and absorber layers. A heterojunction and p-n junction are formed between the emitter layer and the absorber layer, where the p-n junction is formed at least partially within the different material at a location offset from the heterojunction. A majority of the absorber layer can be outside of a depletion region formed by the p-n junction. The p-n junction causes a voltage to be generated in the cell in response to the cell being exposed to light at a front side.

公开(公告)号：US09048366B2

公开(公告)日：2015-06-02

申请号：US13451439

申请日：2012-04-19

申请人： Hui Nie ,  Brendan M. Kayes ,  Isik C. Kizilyalli

发明人： Hui Nie ,  Brendan M. Kayes ,  Isik C. Kizilyalli

IPC分类号： H01L31/0304 ,  H01L31/0735 ,  H01L31/0224 ,  H01L31/18

摘要： Embodiments generally relate to optoelectronic semiconductor devices such as photovoltaic cells. In one aspect, a method for forming a device includes forming an absorber layer made of gallium arsenide (GaAs) and having one type of doping, and forming an emitter layer made of a different material and having a higher bandgap than the absorber layer. An intermediate layer can be formed between emitter and absorber layers. A heterojunction and p-n junction are formed between the emitter layer and the absorber layer, where the p-n junction is formed at least partially within the different material at a location offset from the heterojunction. A majority of the absorber layer can be outside of a depletion region formed by the p-n junction. The p-n junction causes a voltage to be generated in the cell in response to the cell being exposed to light at a front side.

公开(公告)号：US08981432B2

公开(公告)日：2015-03-17

申请号：US13572408

申请日：2012-08-10

申请人： Hui Nie ,  Donald R. Disney ,  Isik C. Kizilyalli

发明人： Hui Nie ,  Donald R. Disney ,  Isik C. Kizilyalli

IPC分类号： H01L29/80

CPC分类号： H01L21/0254 ,  H01L21/02645 ,  H01L21/6835 ,  H01L24/83 ,  H01L29/2003 ,  H01L29/66204 ,  H01L29/66212 ,  H01L29/66356 ,  H01L29/66446 ,  H01L29/739 ,  H01L29/8083 ,  H01L29/861 ,  H01L29/872 ,  H01L2221/68327 ,  H01L2224/04026 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/32245 ,  H01L2224/83801 ,  H01L2224/8384 ,  H01L2924/12032 ,  H01L2924/13062 ,  H01L2924/00014 ,  H01L2924/00

摘要： A method for fabricating an electronic device includes providing an engineered substrate structure comprising a III-nitride seed layer, forming GaN-based functional layers coupled to the III-nitride seed layer, and forming a first electrode structure electrically coupled to at least a portion of the GaN-based functional layers. The method also includes joining a carrier substrate opposing the GaN-based functional layers and removing at least a portion of the engineered substrate structure. The method further includes forming a second electrode structure electrically coupled to at least another portion of the GaN-based functional layers and removing the carrier substrate.

摘要翻译： 一种制造电子器件的方法包括提供包括III族氮化物种子层的工程化衬底结构，形成与III族氮化物种子层耦合的GaN基功能层，以及形成电耦合到至少一部分 GaN基功能层。 该方法还包括将与GaN基功能层相对的载体衬底接合并去除工程衬底结构的至少一部分。 该方法还包括形成电耦合到GaN基功能层的至少另一部分并去除载体衬底的第二电极结构。

公开(公告)号：US08716716B2

公开(公告)日：2014-05-06

申请号：US13334742

申请日：2011-12-22

申请人： Hui Nie ,  Andrew P. Edwards ,  Donald R. Disney ,  Richard J. Brown ,  Isik C. Kizilyalli

发明人： Hui Nie ,  Andrew P. Edwards ,  Donald R. Disney ,  Richard J. Brown ,  Isik C. Kizilyalli

IPC分类号： H01L21/335 ,  H01L29/20

CPC分类号： H01L21/0254 ,  H01L21/2654 ,  H01L21/266 ,  H01L29/0611 ,  H01L29/0642 ,  H01L29/0692 ,  H01L29/2003 ,  H01L29/66204 ,  H01L29/66212 ,  H01L29/66924 ,  H01L29/8083 ,  H01L29/861 ,  H01L29/872

摘要： A semiconductor structure includes a GaN substrate having a first surface and a second surface opposing the first surface. The GaN substrate is characterized by a first conductivity type and a first dopant concentration. The semiconductor structure also includes a first GaN epitaxial layer of the first conductivity type coupled to the second surface of the GaN substrate and a second GaN epitaxial layer of a second conductivity type coupled to the first GaN epitaxial layer. The second GaN epitaxial layer includes an active device region, a first junction termination region characterized by an implantation region having a first implantation profile, and a second junction termination region characterized by an implantation region having a second implantation profile.

摘要翻译： 半导体结构包括具有第一表面和与第一表面相对的第二表面的GaN衬底。 GaN衬底的特征在于第一导电类型和第一掺杂剂浓度。 半导体结构还包括耦合到GaN衬底的第二表面的第一导电类型的第一GaN外延层和耦合到第一GaN外延层的第二导电类型的第二GaN外延层。 第二GaN外延层包括有源器件区，第一结端接区，其特征在于具有第一注入分布的注入区，以及第二结终端区，其特征在于具有第二注入分布的注入区。

公开(公告)号：US08822311B2

公开(公告)日：2014-09-02

申请号：US13335329

申请日：2011-12-22

申请人： Isik C. Kizilyalli ,  Hui Nie ,  Andrew P. Edwards ,  Richard J. Brown ,  Donald R. Disney

发明人： Isik C. Kizilyalli ,  Hui Nie ,  Andrew P. Edwards ,  Richard J. Brown ,  Donald R. Disney

IPC分类号： H01L29/20 ,  H01L29/24

CPC分类号： H01L29/868 ,  H01L29/0615 ,  H01L29/0649 ,  H01L29/2003 ,  H01L29/66204 ,  H01L29/66212 ,  H01L29/6631 ,  H01L29/66924

摘要： A III-nitride semiconductor device includes an active region for supporting current flow during forward-biased operation of the III-nitride semiconductor device. The active region includes a first III-nitride epitaxial material having a first conductivity type, and a second III-nitride epitaxial material having a second conductivity type. The III-nitride semiconductor device further includes an edge-termination region physically adjacent to the active region and including an implanted region comprising a portion of the first III-nitride epitaxial material. The implanted region of the first III-nitride epitaxial material has a reduced electrical conductivity in relation to portions of the first III-nitride epitaxial material adjacent to the implanted region.

摘要翻译： III族氮化物半导体器件包括用于在III族氮化物半导体器件的正向偏置操作期间支持电流的有源区域。 有源区包括具有第一导电类型的第一III族氮化物外延材料和具有第二导电类型的第二III族氮化物外延材料。 III族氮化物半导体器件还包括物理地邻近有源区的边缘终端区，并且包括包含第一III族氮化物外延材料的一部分的注入区。 第一III族氮化物外延材料的注入区域相对于与注入区域相邻的第一III族氮化物外延材料的部分具有降低的导电性。