公开(公告)号：US20050218965A1

公开(公告)日：2005-10-06

申请号：US11144695

申请日：2005-06-06

申请人： Hiroyuki Mizuno ,  Koichiro Ishibashi ,  Takanori Shimura ,  Toshihiro Hattori

发明人： Hiroyuki Mizuno ,  Koichiro Ishibashi ,  Takanori Shimura ,  Toshihiro Hattori

IPC分类号： G11C11/413 ,  G11C5/14 ,  G11C11/408 ,  H01L21/822 ,  H01L23/58 ,  H01L27/02 ,  H01L27/04 ,  H01L27/092

CPC分类号： H01L27/0207 ,  G11C5/14 ,  G11C5/146 ,  G11C5/147 ,  H01L27/0928 ,  H01L27/11807 ,  H01L2924/0002 ,  H03K19/0016 ,  H01L2924/00

摘要： In order to provide a semiconductor IC unit such as a microprocessor, etc., which satisfies both fast operation and lower power consumption properties with its high quality kept, the semiconductor IC unit of the present invention is composed so as to include a main circuit (LOG) provided with transistors, which is formed on a semiconductor substrate, and a substrate bias controlling circuit (VBC) used for controlling a voltage to be applied to the substrate, and the main circuit includes switching transistors (MN1 and MP1) used for controlling a voltage to be applied to the substrate and control signals output from the substrate bias controlling circuit is entered to the gate of each of the switching transistors and the control signal is returned to the substrate bias controlling circuit.

摘要翻译： 为了提供满足快速操作和低功耗特性的诸如微处理器等的半导体IC单元，保持其高质量，本发明的半导体IC单元被构成为包括主电路（ LOG），其形成在半导体衬底上的晶体管和用于控制施加到衬底的电压的衬底偏置控制电路（VBC），并且主电路包括使用的开关晶体管（MN 1和MP 1） 用于控制施加到衬底的电压，并且从衬底偏置控制电路输出的控制信号被输入到每个开关晶体管的栅极，并且控制信号返回到衬底偏置控制电路。

公开(公告)号：US06246277B1

公开(公告)日：2001-06-12

申请号：US09209006

申请日：1998-12-11

申请人： Yusuke Nitta ,  Toshihiro Hattori

发明人： Yusuke Nitta ,  Toshihiro Hattori

IPC分类号： H03K19096

CPC分类号： G06F1/10 ,  H03L7/00

摘要： A semiconductor integrated circuit device for minimizing clock skew over clock wiring shortened for reduced wiring delays. A plurality of stages of clock drivers are provided on clock wiring paths ranging from a clock generator to flip-flops. Clock lines connecting upper stage clock drivers are equalized in length in the form of a tree structure, and clock lines connecting lower stage clock drivers are made as short as possible.

摘要翻译： 用于最小化时钟布线的半导体集成电路器件缩短了布线延迟。 在从时钟发生器到触发器的时钟布线路径上提供多级时钟驱动器。 连接上级时钟驱动器的时钟线以树结构的形式被长度均衡化，并且连接下级时钟驱动器的时钟线尽可能短。

公开(公告)号：US5279893A

公开(公告)日：1994-01-18

申请号：US800015

申请日：1991-11-29

申请人： Toshihiro Hattori ,  Takashi Murata ,  Kazuya Goto ,  Takeshi Kato ,  Shigetsugu Hayashi ,  Hisashi Tada ,  Masahiro Sugimori

发明人： Toshihiro Hattori ,  Takashi Murata ,  Kazuya Goto ,  Takeshi Kato ,  Shigetsugu Hayashi ,  Hisashi Tada ,  Masahiro Sugimori

IPC分类号： B29C70/20 ,  B29C70/50 ,  C08J5/24 ,  C08L63/00 ,  C08L79/08 ,  B32B5/12 ,  B32B5/22 ,  B32B27/38

CPC分类号： C08L63/00 ,  B29C70/20 ,  B29C70/506 ,  C08J5/24 ,  C08L79/085 ,  Y10S428/902 ,  Y10T428/24124 ,  Y10T428/24132 ,  Y10T428/249949 ,  Y10T428/30

摘要： A prepreg for fiber-reinforced composite materials comprising (A) a reinforcing fiber having a modulus of elasticity of 200 GPa or more, (B) a fibrous thermoplastic resin having a modulus of elasticity of 100 GPa or less, and (C) a thermosetting matrix resin. The prepreg of the present invention does not only have excellent handling property equivalent to that of the prepreg with the conventional thermosetting resin as a matrix, but also gives excellent toughness to the resulting molded product without injuring the thermal and mechanical properties. Particularly, it has a high resistance to interlaminar fracture when exposed to impact, so that it is preferably used as a structural material for airplanes, etc.

摘要翻译： 1.一种纤维增强复合材料用预浸料，其特征在于：（A）弹性模量为200GPa以上的增强纤维，（B）弹性模量为100GPa以下的纤维状热塑性树脂，（C） 基质树脂。 本发明的预浸料不仅具有与以往的热固性树脂为基质的预浸料相当的优异的处理性，而且对所得的成型体产生优异的韧性，而不损害热和机械性能。 特别地，当暴露于冲击时，其具有高的层间断裂性，因此优选用作飞机等的结构材料。

公开(公告)号：US4685051A

公开(公告)日：1987-08-04

申请号：US686523

申请日：1984-12-26

申请人： Toshihiro Hattori ,  Katsuya Shishido ,  Hitoshi Kasai ,  Shigeki Moride ,  Noriaki Ogawa

发明人： Toshihiro Hattori ,  Katsuya Shishido ,  Hitoshi Kasai ,  Shigeki Moride ,  Noriaki Ogawa

IPC分类号： F16H59/36 ,  F16H59/44 ,  F16H61/12 ,  B60K41/08

CPC分类号： F16H61/12 ,  F16H59/36 ,  F16H2061/1208 ,  F16H2061/122 ,  F16H2061/1284 ,  F16H59/44 ,  Y10T477/688

摘要： Herein disclosed is a revolution signal processing system for an electronic controller to ensure safe operation of a vehicle having an automatic transmission. The system includes: an input shaft revolution sensor for outputting an input shaft r.p.m. signal; a vehicle speed sensor for outputting a vehicle speed signal; signal processors for determining the r.p.m.'s of the two sensors in response to the two output signals of the same; a gear position sensor for outputting a gear position signal; a gear position detector for detecting the gear position of the automatic transmission; and a self-testing backup. When the gear position detector detects that the transmission is in a gear position other than the neutral position, and if one of the output signals of the two sensors exhibits an r.p.m. equal to or higher than a predetermined value, whereas the other of the same exhibits an abnormally lower value or an r.p.m. lower than the predetermined value, then the self-testing back up determines that the sensor having the output signal exhibiting the abnormally low value is malfunctioning. Thus, the revolution signal processing system self-tests and backs up the vehicle speed sensor and the input shaft revolution sensor.

摘要翻译： 这里公开了一种用于电子控制器的旋转信号处理系统，以确保具有自动变速器的车辆的安全操作。 该系统包括：输入轴转速传感器，用于输出输入轴r.p.m。 信号; 用于输出车速信号的车速传感器; 信号处理器，用于响应于两个传感器的两个输出信号来确定两个传感器的r.p.m.; 用于输出档位信号的档位传感器; 用于检测自动变速器的档位的档位检测器; 和自检备份。 当齿轮位置检测器检测到变速器处于除中立位置之外的档位时，并且如果两个传感器的输出信号之一呈现r.p.m。 等于或高于预定值，而另一个表现出异常较低的值或r.p.m。 低于预定值，则自检备份确定具有异常低值的输出信号的传感器发生故障。 因此，转速信号处理系统对车速传感器和输入轴转速传感器进行自检和备份。

公开(公告)号：US4677880A

公开(公告)日：1987-07-07

申请号：US685543

申请日：1984-12-24

申请人： Toshihiro Hattori ,  Makoto Uriuhara ,  Hitoshi Kasai ,  Yasuyoshi Asagi

发明人： Toshihiro Hattori ,  Makoto Uriuhara ,  Hitoshi Kasai ,  Yasuyoshi Asagi

IPC分类号： B60W10/06 ,  B60W10/10 ,  B60W30/18 ,  B60K41/18 ,  B60K41/10

CPC分类号： B60W10/06 ,  B60W10/02 ,  B60W10/11 ,  B60W30/18 ,  B60W2510/0657 ,  B60W2520/10 ,  B60W2540/10 ,  B60W2540/16 ,  B60W2710/021 ,  B60W2710/0627 ,  B60W2710/0666 ,  B60W2710/1005 ,  Y10T477/6403 ,  Y10T477/677 ,  Y10T477/6933

摘要： A method of controlling a shifting operation of a synchro mesh type automatic transmission in a vehicle, such as an automobile. The method includes the steps of (i) detecting the running state of the vehicle, (ii) determining an optimum gear position from the vehicle running condition, (iii) determining if the optimum gear position is higher than a gear position of the transmission, (iv) determining if the engine torque is greater than or equal to a predetermined value and reducing the engine torque below the predetermined value, if the optimum gear position is higher than the gear position of the transmission, (v) disengaging a clutch to disconnect an engine and the transmission, (vi) shifting the transmission to the optimum gear position, and (vii) engaging the clutch. Moreover, the engine torque is reduced before the clutch is released--by reducing the fuel supply to the engine--so that abrupt decelerations and declutching shocks caused by conventional shifting methods are not felt by the driver.

摘要翻译： 一种控制诸如汽车的车辆中的同步网状自动变速器的换档操作的方法。 该方法包括以下步骤：（i）检测车辆的行驶状态，（ii）从车辆行驶状态确定最佳档位，（iii）确定最佳档位是否高于变速器档位， （iv）如果最佳档位高于变速器的档位，则确定发动机扭矩是否大于或等于预定值并将发动机转矩降低到预定值以下，（v）使离合器脱离以断开 发动机和变速器，（vi）将变速器换档到最佳档位，和（vii）接合离合器。 此外，通过减少对发动机的燃料供给，发动机转矩在释放离合器之前降低，使得由传统换档方法引起的突然减速和降档冲击不被驾驶员感觉到。

公开(公告)号：US4601369A

公开(公告)日：1986-07-22

申请号：US566324

申请日：1983-12-28

申请人： Toshihiro Hattori ,  Masaki Ishihara

发明人： Toshihiro Hattori ,  Masaki Ishihara

IPC分类号： B60K23/02 ,  B60W10/02 ,  F16H61/00 ,  F16H61/02 ,  F16H61/04 ,  F16H61/08 ,  F16H61/10 ,  F16H63/02 ,  F16H63/30 ,  F16H63/46 ,  B60K41/22

CPC分类号： F16H61/0403 ,  B60W10/02 ,  B60W10/10 ,  B60W10/11 ,  B60W30/18 ,  B60W30/1819 ,  F16H61/0246 ,  B60W30/18036 ,  F16H2061/307 ,  F16H63/302 ,  F16H63/3023 ,  F16H63/46 ,  Y10T477/6414 ,  Y10T74/2003

摘要： A method of electronically controlling a vehicle according to which, when a transmission is shifted into the reverse gear position, a clutch is disengaged followed by switching the transmission to a neutral position. With the clutch in the disengaged state, the transmission is then temporarily switched to a gear position having a synchromesh mechanism, whereby a disk clutch pressing against a pressure plate or flywheel is separated from the same. After the clutch is completely disengaged, the transmission is switched to the reverse gear position.

摘要翻译： 一种电子控制车辆的方法，根据该方法，当变速器转换到倒档时，离合器被分离，随后将变速器切换到中立位置。 当离合器处于分离状态时，变速器然后临时切换到具有同步啮合机构的档位，由此压靠压板或飞轮的盘式离合器与其分离。 离合器完全脱离后，变速器切换到倒档位置。

公开(公告)号：US08671504B2

公开(公告)日：2014-03-18

申请号：US13093975

申请日：2011-04-26

申请人： Manabu Ono ,  Toshihiro Hattori

发明人： Manabu Ono ,  Toshihiro Hattori

IPC分类号： B08B3/00

CPC分类号： B60S1/0848 ,  B60R11/04 ,  B60S1/52 ,  B60S1/54 ,  B60S1/56

摘要： A vehicle optical sensor device has a snow/ice removal orifice for jetting the cleansing fluid toward an upper space of a lens and an optical sensor cleansing orifice for jetting the cleaning fluid toward a lens surface of the lens of a camera. The jetted fluid from the snow/ice removal orifice and the optical sensor cleansing orifice removes snow/ice protruding from a sensor top cover of a case into a front upper space of the lens in an eaves shape and foreign matter on the lens surface of the lens of the camera.

摘要翻译： 车辆光学传感器装置具有用于将清洁流体朝着透镜的上部空间喷射的除雪孔，以及用于将清洁流体朝向照相机的透镜的透镜表面喷射的光学传感器清洁孔。 来自雪/冰清除孔和光学传感器清洁孔的喷射流体将从壳体的传感器顶盖突出的雪/冰以檐形状放置在透镜的前上部空间中，并且在透镜表面上的异物 相机镜头。

公开(公告)号：US08670034B2

公开(公告)日：2014-03-11

申请号：US12222560

申请日：2008-08-12

申请人： Kazushige Hattori ,  Toshihiro Hattori ,  Bingchen Wang

发明人： Kazushige Hattori ,  Toshihiro Hattori ,  Bingchen Wang

IPC分类号： H04N7/18

CPC分类号： B60R1/00 ,  B60R2300/102 ,  B60R2300/207 ,  B60R2300/301 ,  B60R2300/305 ,  B60R2300/306 ,  B60R2300/406 ,  B60R2300/8033 ,  B60R2300/8093 ,  G06K9/00805

摘要： An image processor outputs an image containing relatively much information of a central area in the horizontal direction. A mask composed of an upper mask and a lower mask is superimposed on the image. The upper mask is concave on the lower side thereof and disposed along the upper side of the image. The lower mask is concave on the upper side thereof and disposed along the lower side of the image. When the image is masked with this mask, the peripheral portion of the image that is prone to be distorted becomes invisible. Therefore, discomfort a user feels because of distortion can be reduced. In addition, the user can view the image with the much information of the central area of the image in the horizontal direction.

摘要翻译： 图像处理器输出在水平方向上包含中央区域的相对多的信息的图像。 由上掩模和下掩模组成的掩模叠加在图像上。 上掩模在其下侧是凹形的，并且沿着图像的上侧设置。 下掩模在其上侧是凹形的，并且沿着图像的下侧设置。 当用该掩模掩蔽图像时，易于变形的图像的周边部分变得不可见。 因此，可以减少用户因失真而感觉到的不适。 此外，用户可以在水平方向上以图像的中心区域的大量信息来观看图像。

公开(公告)号：US08108660B2

公开(公告)日：2012-01-31

申请号：US12358233

申请日：2009-01-22

申请人： Hironori Kasahara ,  Keiji Kimura ,  Masayuki Ito ,  Tatsuya Kamei ,  Toshihiro Hattori

发明人： Hironori Kasahara ,  Keiji Kimura ,  Masayuki Ito ,  Tatsuya Kamei ,  Toshihiro Hattori

IPC分类号： G06F1/04

CPC分类号： G06F15/16

摘要： Each of processors has a barrier write register and a barrier read register. Each barrier write register is wired to each barrier read register by a dedicated wiring block. For example, a 1-bit barrier write register of a processor is connected, via the wiring block, to a first bit of each 8-bit barrier read register contained in the processors, and a 1-bit barrier write register of another processor is connected, via a wiring block, to a second bit of each 8-bit barrier read register contained in the processors. For example, a processor writes information to its own barrier write register, thereby notifying synchronization stand-by to the other processors and reads its own barrier read register, thereby recognizing whether the other processors are in synchronization stand-by or not. Therefore, a special dedicated instruction is not required along barrier synchronization processing, and the processing can be made at a high speed.

摘要翻译： 每个处理器都有一个屏障写入寄存器和一个屏障读取寄存器。 每个屏障写入寄存器通过专用接线块连接到每个屏障读取寄存器。 例如，处理器的1位屏障写入寄存器经由布线块连接到处理器中包含的每个8位屏障读取寄存器的第一位，而另一个处理器的1位屏障写入寄存器是 通过接线块连接到处理器中包含的每个8位屏障读取寄存器的第二位。 例如，处理器将信息写入其自己的屏障写入寄存器，从而通知其他处理器的同步待机并读取其自己的障碍读取寄存器，从而识别其他处理器是否处于同步待机状态。 因此，沿着屏障同步处理不需要特殊的专用指令，并且可以高速进行处理。

公开(公告)号：US07975077B2

公开(公告)日：2011-07-05

申请号：US12470988

申请日：2009-05-22

申请人： Junichi Nishimoto ,  Takuichiro Nakazawa ,  Koji Yamada ,  Toshihiro Hattori

发明人： Junichi Nishimoto ,  Takuichiro Nakazawa ,  Koji Yamada ,  Toshihiro Hattori

IPC分类号： G06F13/38

CPC分类号： G06F1/32 ,  G06F1/325 ,  G06F1/3265 ,  G06F9/4403 ,  G06F9/4416 ,  G06F13/24 ,  G06F13/4022 ,  G06F13/4027 ,  G06F13/4045 ,  G06F13/4068 ,  Y02D10/14 ,  Y02D10/151

摘要： One data processor is provided with an interface for realizing connection with the other data processor. This interface is provided with a function for connecting the other data processor as a bus master to an internal bus of the one data processor, and the relevant other data processor is capable of directly operating peripheral functions that are memory mapped to the internal bus from an external side via the interface. Accordingly, the data processor can utilize the peripheral functions of the other data processor without interruption of the program being executed. In short, one data processor can use in common the peripheral resources of the other data processor.

摘要翻译： 一个数据处理器设置有用于实现与其他数据处理器的连接的接口。 该接口具有将作为总线主机的其他数据处理器连接到一个数据处理器的内部总线的功能，并且相关的其他数据处理器能够直接从存储器映射到内部总线的外围功能 外部通过接口。 因此，数据处理器可以利用其他数据处理器的外围功能，而不中断执行的程序。 简而言之，一个数据处理器可以共同使用其他数据处理器的外围资源。