-
51.发明授权Device for converting unbalanced analog electric signals into fully differential signals 失效将不平衡模拟电信号转换为完全差分信号的设备
公开(公告)号：US5070305A
公开(公告)日：1991-12-03
申请号：US560428
申请日：1990-07-31
摘要： An all-differential operational amplifier (20) has a first input (22) and a second input (24) and correspondingly has a first output (26) and a second output (28), fed back on its own input respectively through a first (34) and second (36) impedance which are generally resistive and have identical values. The first output is connected to the second input of the operational amplifier across a third impedance (32). A fourth impedance (30), equal in value to the third impedance, is connected in series to the first input and acts as input terminal of the converter. The resistive components of the impedance can be implemented as switched capacitors.
-
52.发明授权Apparatus and method for offset voltage correction in an analog to digital converter 失效用于模数转换器中偏移电压校正的装置和方法
公开(公告)号：US4799042A
公开(公告)日：1989-01-17
申请号：US936368
申请日：1986-12-01
CPC分类号： H03M1/1047 , H03M1/464 , H03M1/804
摘要： A charge redistribution analog-to-digital converter is described that permits their ncorporation of offset voltage correction to provide an accurate reflection in the digitalized output signal of the analog input signal. In a distributed capacitor successive approximation device, additional capacitors are added both to a most significant bit array group of capacitors and to a least significant array group of capacitors that are used in conjunction with the offset voltage. The value of the offset voltage is stored in a register and the register determines various switch positions that determine the value of the offset voltage incorporated in the final output voltage.
摘要翻译： 描述了一种电荷再分配模数转换器，其允许其偏移电压校正的组合在模拟输入信号的数字化输出信号中提供准确的反射。 在分布式电容器逐次逼近装置中，附加电容器被添加到最高有效比特阵列组的电容器和与偏移电压结合使用的最不重要的阵列组的电容器。 偏移电压的值存储在寄存器中，并且寄存器确定确定最终输出电压中所包含的偏移电压的值的各种开关位置。
-
53.发明申请ELECTRONIC DEVICE FOR REGULATING A VARIABLE CAPACITANCE OF AN INTEGRATED CIRCUIT 有权用于调整集成电路的可变电容的电子设备公开(公告)号：US20110074221A1
公开(公告)日：2011-03-31
申请号：US12891409
申请日：2010-09-27
CPC分类号： H03H5/12
摘要： The present disclosure relates to an electronic regulation device of a variable capacitance of an integrated circuit having a time parameter depending on the variable capacitance. The regulation device includes a regulation loop, and is configured to generate in output a plurality of binary regulation signals.
摘要翻译： 本公开涉及具有取决于可变电容的时间参数的集成电路的可变电容的电子调节装置。 调节装置包括调节回路，并且被配置为在输出中产生多个二进制调节信号。
-
公开(公告)号：US20090051401A1
公开(公告)日：2009-02-26
申请号：US12035235
申请日：2008-02-21
IPC分类号： H03L5/00
CPC分类号： H03H7/0153 , H03H1/02 , H03H2210/021 , H03H2210/043
摘要： A calibration circuit for calibrating an adjustable capacitance of a circuit having a time constant depending on the adjustable capacitance, the calibration circuit generating a calibration signal for calibrating the capacitance and including a calibration loop, suitable to carry out a calibration cycle in several sequential steps. The calibration circuit includes a controllable capacitance for receiving a control signal and including an array of switched capacitors selectively activated by the control signal to connect to a first common node that conducts a voltage value depending on the total capacitance value of the activated capacitors; an assessment unit for comparing this voltage value with a reference voltage to output a logic signal that can transition between first and second logic levels; a control and timing unit to receive the logic signal and change the control signal to carry out a subsequent calibration step that is provided at the end of the integration interval during a comparison interval of a preset duration, which allows a transition of the logic signal to occur prior to the beginning of the consecutive calibration step.
摘要翻译： 一种用于校准具有取决于可调电容的时间常数的电路的可调电容的校准电路，所述校准电路产生用于校准电容的校准信号，并且包括适于在几个连续步骤中执行校准循环的校准环路。 校准电路包括用于接收控制信号并包括由控制信号选择性激活的开关电容阵列的可控电容，以连接到第一公共节点，该第一公共节点根据所激活的电容器的总电容值传导电压值; 评估单元，用于将该电压值与参考电压进行比较，以输出可在第一和第二逻辑电平之间转换的逻辑信号; 控制和定时单元，用于接收逻辑信号并改变控制信号，以执行在预设持续时间的比较间隔期间在积分间隔结束时提供的随后的校准步骤，这允许将逻辑信号转换为 在连续校准步骤开始之前发生。
-
公开(公告)号：US5712777A
公开(公告)日：1998-01-27
申请号：US414277
申请日：1995-03-31
IPC分类号： H01L27/04 , H01L21/822 , H02M3/07
CPC分类号： H02M3/07 , H02M2001/0045
摘要： A voltage multiplier includes a first charge transfer capacitor designed to take and transfer electrical charges from the input terminal to the output terminal, a second capacitor for charge storage connected between the output terminal and ground and an output voltage stabilization circuit. The output voltage stabilization circuit includes an integrator designed to generate a continuous voltage corresponding to the difference between a reference voltage and the output voltage of the voltage multiplier. The continuous voltage is applied to one terminal of said charge transfer capacitor so that the potential at the other terminal of the capacitor changes proportionally to the output voltage of the voltage multiplier.
摘要翻译： 电压倍增器包括：第一电荷转移电容器，被设计用于从输入端子到输出端子接收和传送电荷;第二电容器，用于连接在输出端子和地之间的电荷存储器;以及输出电压稳定电路。 输出电压稳定电路包括积分器，其被设计为产生对应于参考电压和电压倍增器的输出电压之间的差的连续电压。 将连续电压施加到所述电荷转移电容器的一个端子，使得电容器另一端的电位与电压倍增器的输出电压成比例地变化。
-
公开(公告)号：US5606625A
公开(公告)日：1997-02-25
申请号：US249316
申请日：1994-05-26
CPC分类号： H03G3/3089
摘要： A digital circuit for controlling the gain of an amplifier stage of a coded signal receiving channel is provided. The circuit includes a peak detector coupled to the input terminal of the receiving channel through a coded signal rectifying circuit and a gain control stage. The gain control stage includes a digital comparator having two input terminals respectively connected to an output terminal of the peak detector and to a memory, and an output terminal coupled to a gain control terminal of the amplifier stage. The address selectable contents of the memory contain predetermined peak values in coded form.
摘要翻译： 提供了一种用于控制编码信号接收通道的放大器级的增益的数字电路。 电路包括通过编码信号整流电路和增益控制级耦合到接收信道的输入端的峰值检测器。 增益控制级包括数字比较器，其具有分别连接到峰值检测器的输出端子和存储器的两个输入端子，以及耦合到放大器级的增益控制端子的输出端子。 存储器的地址可选择内容包含编码形式的预定峰值。
-
公开(公告)号：US5552747A
公开(公告)日：1996-09-03
申请号：US457759
申请日：1995-06-01
IPC分类号： H03K17/06 , H03K17/687 , G05F1/10 , G05F3/02
CPC分类号： H03K17/063
摘要： A driver circuit, for an electronic switch which is to be operated from a clock signal, comprises an inverter driven by the clock signal, and a voltage doubler which is connected to supply the inverter and connected to be driven by the complementary clock signal.
摘要翻译： 用于从时钟信号操作的电子开关的驱动电路包括由时钟信号驱动的反相器，以及连接以提供反相器并连接以由互补时钟信号驱动的倍压器。
-
公开(公告)号：US5349244A
公开(公告)日：1994-09-20
申请号：US982288
申请日：1992-11-25
CPC分类号： H03K3/356008 , G11C7/20 , G11C7/22 , H03K17/223
摘要： An initialization circuit, particularly for memory registers, being of a type which comprises a signal input to which a supply voltage is applied, and an initialization output at which a voltage signal is produced which is equal to the supply voltage up to a predetermined tripping value for the circuit, further comprises a second output connected to the register and being also an initialization output driven to a null voltage value upon the supply voltage dropping below the tripping value.
摘要翻译： 特别是用于存储器寄存器的初始化电路是包括施加电源电压的信号输入的类型，以及产生电压信号的初始化输出，该电压信号等于高达预定跳闸值的电源电压 对于电路，还包括连接到寄存器的第二输出端，并且还是当电源电压下降到跳闸值以下时被驱动为零电压值的初始化输出。
-
59.发明授权Circuit for PCM conversion of an analog signal, with improvement in gain-tracking 失效模拟信号的PCM转换电路，具有增益跟踪的改进
公开(公告)号：US5287106A
公开(公告)日：1994-02-15
申请号：US187507
申请日：1988-04-28
CPC分类号： H03M1/0604 , H03M1/12
摘要： The circuit includes a filter to which an analog signal is applied, a quantizer driven by the filter, a sampler at a desired frequency driven by the quantizer and a PCM encoder driven by the sampler. The quantizer generates a quantize signal according to the received analog signal and further generates a difference signal according to the difference between a quantized signal and the analog signal. A feedback circuit feeds back the difference signal from the quantizer to a stage of the filter so that the overall transfer function from the input of the feedback circuit to the output of the filter is equivalent to a low pass filtering.
摘要翻译： 电路包括施加模拟信号的滤波器，由滤波器驱动的量化器，由量化器驱动的期望频率的采样器和由采样器驱动的PCM编码器。 量化器根据接收到的模拟信号生成量化信号，并根据量化信号和模拟信号之间的差产生差分信号。 反馈电路将差分信号从量化器反馈到滤波器的级，使得从反馈电路的输入到滤波器的输出的整体传递函数等效于低通滤波。
-
公开(公告)号：US4965468A
公开(公告)日：1990-10-23
申请号：US417588
申请日：1989-10-05
CPC分类号： H03K3/356034 , H03F3/45192 , H03F3/45475 , H03F3/45659 , H03F3/45977 , H03F2203/45406 , H03F2203/45644 , H03F2203/45651 , H03F2203/45652 , H03F2203/45728
摘要： A high resolution, fully differential, CMOS comparator advantageously employs a single high-gain, "folded cascode", fully differential operational amplifier and an output latch circuit and the output common mode control of the high-gain amplifier is implemented without requiring the use of a conventional control circuit, thus improving layout economy. The common mode control is performed by providing the latch with a differential input stage through which a common mode feedback network is realized which acts upon a pair of output transistors of the operational amplifier for effectively controlling the output common mode thereof. The comparator has a simplified layout and is remarkably faster because it has no additional capacitances loading the outputs of the amplifier.
-
-
-
-
-
-
-
-
-
搜索结果
62 条记录 (耗时 0.033 秒)
