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公开(公告)号：US10198203B2
公开(公告)日：2019-02-05
申请号：US15352037
申请日：2016-11-15
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Michael Erlihson , Shmuel Dashevsky , Elona Erez , Guy Inbar , Jun Jin Kong , Keon Soo Ha
IPC: G06F13/00 , G06F3/06 , G06F12/02 , G06F12/0866
Abstract: A memory system includes a table storing a plurality of entries, where each entry is associated with a different logical block address (LBA), a plurality of memory devices, channels, and ways, where each memory device is connected to one of the channels ways and to one of the ways, and a memory controller configured to receive an LBA and data from a host, execute a plurality of pseudo-random functions on the received LBA to generate a plurality of slot indexes, select one of the slot indexes, write the data to one of the memory devices identified by the selected one slot index, and update a corresponding one of the entries to include the selected one slot index.
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公开(公告)号：US10097348B2
公开(公告)日：2018-10-09
申请号：US15080070
申请日：2016-03-24
Applicant: Samsung Electronics Co., Ltd.
Inventor： Michael Kara-Ivanov , Dvir Schirman , Shmuel Dashevsky , Jun Jin Kong
Abstract: A method of encrypting unencrypted digital content includes measuring an analog value associated with a physical property of interested cells of a memory array; digitizing the measured analog value to generate a response key; generating an encryption key based at least on the response key; encrypting the unencrypted digital content to generated encrypted digital content based on the encryption key; and storing the encrypted digital content.
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53.发明授权公开(公告)号：US09881671B2
公开(公告)日：2018-01-30
申请号：US15044301
申请日：2016-02-16
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Eun Chu Oh , Young-Geon Yoo , Jun Jin Kong , Hong-Rak Son , Han-Shin Shin
CPC classification number: G11C13/004 , G06F11/1048 , G11C11/1655 , G11C11/1673 , G11C11/5607 , G11C11/5657 , G11C11/5664 , G11C11/5678 , G11C11/5685 , G11C13/0026 , G11C13/0069 , G11C2013/0054 , G11C2213/72
Abstract: A method is for operating a resistive memory system including a resistive memory device implemented as multi-level memory cells. The method includes setting levels of reference voltages used to determine resistance states of the multi-level memory cells, and reading data of the multi-level memory cells based on the reference voltages. A difference between the reference voltages used to determine a relatively high resistance state is greater than a difference between the reference voltages used to determine a relatively low resistance state.
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公开(公告)号：US09841918B2
公开(公告)日：2017-12-12
申请号：US14956715
申请日：2015-12-02
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Elona Erez , Avner Dor , Jun Jin Kong
IPC: G06F3/06
CPC classification number: G06F3/0641 , G06F3/0604 , G06F3/0679 , G06F12/00 , G11C7/1006 , G11C16/0483 , G11C16/10
Abstract: A flash memory device includes physical pages that store data sectors therein. The method of operating the flash memory device includes receiving write data sectors to be stored in the flash memory device, pairing the write data sectors with write data sectors and with written data sectors previously stored in physical pages of the flash memory device based upon a matching and deduplication operation to define data sector pairs and a difference therebetween, and rewriting to the physical pages of the flash memory device, in a partial-page writing mode, to store the difference between the write data sector and its respective paired data sector. The partial-page writing mode is performed on a respective physical page after a previous programming and before erasing. The written data sectors included in the data sector pairs only partially occupy the corresponding physical page of the flash memory device. The difference between the write data sector and its respective paired data sector is stored in an unoccupied portion of the corresponding physical page of the flash memory device.
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公开(公告)号：US09690512B2
公开(公告)日：2017-06-27
申请号：US14949458
申请日：2015-11-23
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Yaron Shany , Avner Dor , Elona Erez , Jun Jin Kong
CPC classification number: G06F3/0641 , G06F3/0608 , G06F11/1453 , G06F17/30156 , H03M13/136 , H03M13/1515 , H03M13/152 , H03M13/1525 , H03M13/1575 , H03M13/19 , H03M13/611
Abstract: A method, executed by a processor, for determining similarity between messages includes calculating a syndrome of each of first and second messages with respect to a linear code. A difference between the syndromes of the first and second messages is calculated, and a vector that minimizes a metric in a coset defined by the syndrome difference is identified. A compact representation of the second message that is based upon the first message is generated when a metric of the identified vector is less than or equal to a predetermined threshold. The compact representation of the second message is stored in a location of a memory device assigned for storing the second message, when the metric of the identified vector is less than or equal to the predetermined threshold.
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Patent Agency Ranking
公开(公告)号：US09613664B2
公开(公告)日：2017-04-04
申请号：US14600754
申请日：2015-01-20
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Amit Berman , Uri Beitler , Jun Jin Kong
CPC classification number: G11C7/1006 , G11C16/0483 , G11C16/10 , G11C2207/102
Abstract: A method of operating a memory device is provided. The memory device includes a plurality of multi-level memory cells of which each memory cell includes L levels. Data which is expressed in a binary number is received. A P-length string is generated from the data. The P-length string is converted to a Q-length string. The Q-length string is distributed using I levels by eliminating at least one level from the L levels. P and Q represent binary bit lengths of the P-length string and the Q-length string. Q is greater than P. L represents a maximum number of levels which each multi-level memory cell has. I is smaller than L. The Q-length string is programmed into the plurality of memory cells.
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57.发明授权Nonvolatile memory systems configured to use deduplication and methods of controlling the same 有权配置为使用重复数据消除的非易失性存储器系统及其控制方法公开(公告)号：US09575661B2
公开(公告)日：2017-02-21
申请号：US14463129
申请日：2014-08-19
Applicant: Samsung Electronics Co., Ltd.
Inventor： Avner Dor , Elona Erez , Jun Jin Kong
CPC classification number: G06F3/0608 , G06F3/0641 , G06F3/0679 , G06F3/0688 , G06F11/1453 , G06F17/30159
Abstract: Systems and methods of determining a similarity between data units in a nonvolatile memory are disclosed. One method includes obtaining first and second data units and dividing the first and second data units into a first plurality of non-overlapping chunks of data and a second plurality of non-overlapping chunks of data. The method further includes determining a first plurality of values and a second plurality of values associated with the chunks, and determining a similarity between the first second data units based on the first plurality values and of the second plurality of values. In one example embodiment, a similarity between an incoming data unit and another data unit is determined based on the number of buckets storing an incoming index value and another index value associated with the another data unit. A plurality of buckets in a table is determined based on a selected plurality of hash values.
Abstract translation: 公开了确定非易失性存储器中的数据单元之间的相似性的系统和方法。 一种方法包括获得第一和第二数据单元，并将第一和第二数据单元划分成第一多个非重叠的数据块和第二多个非重叠的数据块。 所述方法还包括确定与所述块相关联的第一多个值和第二多个值，以及基于所述第一多个值和所述第二多个值来确定所述第一第二数据单元之间的相似度。 在一个示例实施例中，基于存储输入索引值的桶数和与另一数据单元相关联的另一索引值，确定输入数据单元与另一数据单元之间的相似度。 基于所选择的多个散列值来确定表中的多个桶。
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58.发明授权Joint source-channel encoding and decoding for compressed and uncompressed data 有权用于压缩和未压缩数据的联合源通道编码和解码公开(公告)号：US09391646B2
公开(公告)日：2016-07-12
申请号：US14224572
申请日：2014-03-25
Applicant: Samsung Electronics Co., Ltd.
Inventor： Iddo Naiss , Uri Beitler , Jun Jin Kong
CPC classification number: H03M13/6312 , G06F11/1004 , H03M13/09 , H03M13/1102 , H03M13/152
Abstract: A memory controller includes a joint source-channel encoder circuit and a joint source-channel decoder circuit. The joint source-channel encoder circuit source encodes received data independent of whether the received data is compressible data, performs error correction coding on the source encoded data, and stores the source encoded data in a memory device. The joint source-channel decoder circuit performs source decoding of the data read from the memory device between iterations of error correction coding of the read data, and outputs the read data to at least one of a buffer memory and a storage device interface. The joint source-channel decoder circuit performs the source decoding of the read data independent of whether the read data is compressed data.
Abstract translation: 存储器控制器包括联合源通道编码器电路和联合源通道解码器电路。 联合源信道编码器电路源对接收到的数据进行编码，独立于接收到的数据是否是可压缩数据，对源编码数据执行纠错编码，并将源编码数据存储在存储器件中。 联合源信道解码器电路在读取数据的纠错编码的迭代之间对从存储器件读取的数据执行源解码，并将读取的数据输出到缓冲存储器和存储设备接口中的至少一个。 联合源信道解码器电路执行读取数据的源解码，与读数据是否为压缩数据无关。
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59.发明授权Memory controller, method of operating the same, and system including the same 有权内存控制器，操作方法以及包含其的系统公开(公告)号：US09354969B2
公开(公告)日：2016-05-31
申请号：US14208340
申请日：2014-03-13
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Moshe Twitto , Avner Dor , Jun Jin Kong , Chang Kyu Seol , Hong Rak Son
CPC classification number: G06F11/1072 , G06F11/108
Abstract: A method of processing data using a memory controller includes determining at least one cell state to which each of a plurality of multi-level cells can be changed to based on a current cell state of each multi-level cell, where each multi-level cell includes a plurality of data pages; determining one of the data pages as having a stuck bit when a value of the data page has a single mapping value based on mapping values mapped to the at least one cell state and generating stuck bit data regarding the stuck bit; and encoding write data to be stored in the multi-level cells based on the stuck bit data.
Abstract translation: 使用存储器控制器处理数据的方法包括基于每个多级单元的当前单元状态来确定可以改变多个多电平单元中的每一个的至少一个单元状态，其中每个多电平单元 包括多个数据页; 当数据页的值基于映射到所述至少一个单元状态的映射值具有单个映射值并且生成关于所述卡位的卡位位数据时，将所述数据页之一确定为具有卡住位; 以及基于所述卡住的位数据对要存储在所述多级单元中的写入数据进行编码。
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公开(公告)号：US11128321B2
公开(公告)日：2021-09-21
申请号：US16882627
申请日：2020-05-25
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Dong Min Shin , Beom Kyu Shin , Heon Hwa Cheong , Jun Jin Kong , Hong Rak Son , Yeong Geol Song , Se Jin Lim
Abstract: A method of operating a decoder, which has variable nodes and check nodes, includes receiving variable-to-check (V2C) messages from the variable nodes using a first check node among the check nodes. The number of messages having a specific magnitude among the V2C messages is counted. The magnitude of a check-to-variable (C2V) message to be transmitted to a first variable node, among the variable nodes, is determined based on the count value and the magnitude of a V2C message of the first variable node.
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