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    Systems and methods for managing multipathing configurations for virtual machines
    52.
    发明授权
    Systems and methods for managing multipathing configurations for virtual machines 有权
    用于管理虚拟机的多路径配置的系统和方法

    公开(公告)号：US08935695B1

    公开(公告)日：2015-01-13

    申请号：US13548195

    申请日：2012-07-12

    Applicant: Subash Rajaa ,  Sanjay Kumar ,  Hari Krishna Vemuri

    Inventor： Subash Rajaa ,  Sanjay Kumar ,  Hari Krishna Vemuri

    IPC: G06F9/455

    CPC classification number: G06F9/45558 ,  G06F2009/45579

    Abstract: A computer-implemented method for managing multipathing configurations for virtual machines may include 1) identifying a virtual machine configured to store virtual machine data on a storage system, 2) identifying a service level specification that stipulates a minimum number of input/output paths between the virtual machine and the virtual machine data, 3) determining that a number of available input/output paths between the virtual machine and the virtual machine data has fallen below the minimum number of input/output paths between the virtual machine and the virtual machine data stipulated by the service level specification, and 4) migrating at least one of the virtual machine and the virtual machine data in response to determining that the number of available input/output paths has fallen below the minimum number of input/output paths. Various other methods, systems, and computer-readable media are also disclosed.

    Abstract translation: 用于管理虚拟机的多路径配置的计算机实现的方法可以包括：1）识别被配置为将虚拟机数据存储在存储系统上的虚拟机，2）识别服务级别规范，其规定最小数量的输入/输出路径 虚拟机和虚拟机数据，3）确定虚拟机与虚拟机数据之间的可用输入/输出路径数量已经低于虚拟机与虚拟机数据规定的最小输入/输出路径数 响应于确定可用输入/输出路径的数量已经低于输入/输出路径的最小数目，并且4）迁移虚拟机和虚拟机数据中的至少一个数据。 还公开了各种其它方法，系统和计算机可读介质。

    Dynamic Storage Tiering In A Virtual Environment
    54.
    发明申请
    Dynamic Storage Tiering In A Virtual Environment 有权
    虚拟环境中的动态存储分层

    公开(公告)号：US20130159359A1

    公开(公告)日：2013-06-20

    申请号：US13327366

    申请日：2011-12-15

    Applicant: Sanjay Kumar ,  Venkatesha M.G.

    Inventor： Sanjay Kumar ,  Venkatesha M.G.

    IPC: G06F17/30

    CPC classification number: G06F3/0649 ,  G06F3/0605 ,  G06F3/0685

    Abstract: Various systems and methods for performing dynamic storage tiering in a virtual environment. For example, one method can involve identifying a location of a storage object within a virtual machine file, where the virtual machine file includes multiple storage objects. The method then involves detecting whether the storage object meets a criterion of a tiering policy. If the storage object meets the criterion, the storage object is moved from one tier of a multi-tier storage system to another tier of the multi-tier storage system.

    Abstract translation: 用于在虚拟环境中执行动态存储分层的各种系统和方法。 例如，一种方法可以涉及识别虚拟机文件内的存储对象的位置，其中虚拟机文件包括多个存储对象。 该方法然后涉及检测存储对象是否满足分层策略的标准。 如果存储对象满足标准，则存储对象从多层存储系统的一层移动到多层存储系统的另一层。

    Low overhead and timing improved architecture for performing error checking and correction for memories and buses in system-on-chips, and other circuits, systems and processes
    55.
    发明授权
    Low overhead and timing improved architecture for performing error checking and correction for memories and buses in system-on-chips, and other circuits, systems and processes 有权
    低开销和时序改进的架构，用于对片上系统以及其他电路，系统和过程中的存储器和总线执行错误检查和校正

    公开(公告)号：US08438344B2

    公开(公告)日：2013-05-07

    申请号：US12774861

    申请日：2010-05-06

    Applicant: Sanjay Kumar ,  Amit Kumar Dutta ,  Rubin A. Parekhji ,  Srivaths Ravi

    Inventor： Sanjay Kumar ,  Amit Kumar Dutta ,  Rubin A. Parekhji ,  Srivaths Ravi

    IPC: G06F21/00

    CPC classification number: G06F11/1008 ,  G06F11/1052 ,  G11C8/06 ,  G11C8/16 ,  G11C29/42 ,  G11C2029/0411 ,  H03M13/19

    Abstract: An electronic circuit (200) for use with an accessing circuit (110) that supplies a given address and a partial write data portion and also has dummy cycles. The electronic circuit (200) includes a memory circuit (230) accessible at addresses, an address buffer (410), a data buffer (440) coupled to the memory circuit (230), and a control circuit (246) operable in the dummy cycles to read data from the memory circuit (230) to the data buffer (440) from a next address location in the memory circuit (230) and to store that next address in the address buffer (410). The electronic circuit further includes a multiplexer (430), a comparing circuit (420) responsive to the given address and a stored address in the address buffer (410), to operate the multiplexer (430) to pass data from the data buffer (440) or to pass data from the memory circuit (230) instead; and a mixer circuit (450) operable to put the partial write data portion into the data taken from the selected one of the data buffer (440) or memory circuit (230). Other circuits, devices, systems, processes of operation and processes of manufacture are also disclosed.

    Abstract translation: 一种与提供给定地址和部分写入数据部分并且还具有虚拟周期的访问电路（110）一起使用的电子电路（200）。 电子电路（200）包括可在地址处访问的存储器电路（230），地址缓冲器（410），耦合到存储器电路（230）的数据缓冲器（440）和可在虚拟器件中操作的控制电路 循环，从存储器电路（230）中的下一个地址位置将数据从存储器电路（230）读取到数据缓冲器（440），并将该下一个地址存储在地址缓冲器（410）中。 电子电路还包括多路复用器（430），响应给定地址的比较电路（420）和地址缓冲器（410）中存储的地址，以操作多路复用器（430）以从数据缓冲器（440）传送数据 ）或者从存储器电路（230）传递数据; 以及混合器电路（450），其可操作以将所述部分写入数据部分放入从所述数据缓冲器（440）或存储器电路（230）中选择的数据采集的数据中。 还公开了其它电路，设备，系统，操作过程和制造过程。

    Methods and Systems to Permit Multiple Virtual Machines to Separately Configure and Access a Physical Device
    59.
    发明申请
    Methods and Systems to Permit Multiple Virtual Machines to Separately Configure and Access a Physical Device 有权
    允许多个虚拟机单独配置和访问物理设备的方法和系统

    公开(公告)号：US20110321042A1

    公开(公告)日：2011-12-29

    申请号：US12978555

    申请日：2010-12-25

    Applicant: Xue Yang ,  Hsin-Yuo Liu ,  Praveen Gopalakrishnan ,  Sebastian Schoenberg ,  Sanjay Kumar

    Inventor： Xue Yang ,  Hsin-Yuo Liu ,  Praveen Gopalakrishnan ,  Sebastian Schoenberg ,  Sanjay Kumar

    IPC: G06F9/455

    CPC classification number: G06F9/4411 ,  G06F9/45558 ,  G06F9/545 ,  G06F13/387 ,  G06F2009/45579 ,  G06F2009/45595

    Abstract: Methods and systems to permit multiple virtual machines (VMs) to separately configure and access a physical resource, substantially outside of a virtual machine monitor (VMM) that hosts the VMs. Each of a plurality of virtual machines (VMs) may access and configure the physical device through corresponding instances of a device driver that exposes controllable functions of the physical device within the VMs. VM-specific configuration parameters and connection information may be maintained for each of the VMs, outside of a VMM, to reconfigure or virtualize the physical device for each of the VMs with the corresponding VM-specific configuration parameters and connection information. Physical device virtualization augmentation features may be implemented within a combination of a physical device controller and a host device driver that executes outside of the VM.

    Abstract translation: 允许多个虚拟机（VM）单独配置和访问物理资源的方法和系统，基本上位于托管虚拟机的虚拟机监视器（VMM）之外。 多个虚拟机（VM）中的每一个可以通过暴露VM内的物理设备的可控功能的设备驱动器的相应实例来访问和配置物理设备。 可以为VMM之外的每个VM维护VM特定的配置参数和连接信息，以使用具有相应的VM特定配置参数和连接信息为每个VM重新配置或虚拟化物理设备。 物理设备虚拟化增强功能可以在物理设备控制器和在VM之外执行的主机设备驱动器的组合中实现。

    Polynucleotides encoding modified DNA cleavage enzymes and host cells therefor
    60.
    发明授权
    Polynucleotides encoding modified DNA cleavage enzymes and host cells therefor 有权
    编码修饰的DNA切割酶的多核苷酸及其宿主细胞

    公开(公告)号：US08048664B2

    公开(公告)日：2011-11-01

    申请号：US12949182

    申请日：2010-11-18

    Applicant: Chudi Guan ,  Sanjay Kumar ,  Rebecca Kucera

    Inventor： Chudi Guan ,  Sanjay Kumar ,  Rebecca Kucera

    IPC: C12N15/00 ,  C12N5/10 ,  C12N1/21 ,  C07H21/00 ,  C07K14/00 ,  C12N9/16 ,  C12N9/24 ,  C12P21/00

    CPC classification number: C12N9/22

    Abstract: Compositions and methods are provided that relate to a modified DNA cleaving enzyme having at least 35% amino acid sequence identity with T7 Endo I. The modified enzyme includes two catalytic centers separated by a β-bridge where the β-bridge contains at least one mutation having an effect of altering enzyme cleavage activity compared to the unmodified enzyme. Activities associated with the modified DNA cleaving enzyme that can be modulated in different reaction conditions include at least one of: (a) non-sequence specific nicking activity; (b) cleaving the second strand of a duplex DNA at a preexisting nick site to produce a linear duplex with a single strand overhang; (c) non-sequence specific DNA cleavage; (d) cleaving DNA flanking a mismatch; and (e) cleavage at a cruciform structure in a DNA duplex.

    Abstract translation: 提供了与T7 Endo I具有至少35％的氨基酸序列同一性的修饰的DNA切割酶的组合物和方法。修饰的酶包括两个由“桥”分开的催化中心，其中“桥”至少包含 一个突变与未修饰的酶相比具有改变酶裂解活性的作用。 与可以在不同反应条件下调节的修饰的DNA切割酶相关的活性包括以下至少一个：（a）非序列特异性切口活性; （b）在预先存在的切口位点切割双链体DNA的第二链以产生具有单链突出端的线性双链体; （c）非序列特异性DNA切割; （d）切断位于不对称侧翼的DNA; 和（e）在DNA双链体中的十字形结构处的切割。

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