公开(公告)号：US20050224359A1

公开(公告)日：2005-10-13

申请号：US10814175

申请日：2004-04-01

申请人： Hung-Wen Su ,  Chien-Hsueh Shih ,  Ming-Hsing Tsai

发明人： Hung-Wen Su ,  Chien-Hsueh Shih ,  Ming-Hsing Tsai

IPC分类号： C25D5/00 ,  C25D7/12 ,  C25D17/00 ,  C25D17/02 ,  H01L21/288

CPC分类号： H01L21/2885 ,  C25D7/123 ,  C25D17/001 ,  C25D17/02 ,  C25D21/02

摘要： Apparatus and method for metal electroplating. The apparatus for metal electroplating includes an electroplating tank for containing an electrolyte at a first temperature, a substrate holder for holding a semiconductor substrate, and a heater for heating the portion of the electrolyte adjacent to the substrate holder to a second temperature higher than the first temperature.

摘要翻译： 金属电镀设备及方法 用于金属电镀的设备包括用于在第一温度下容纳电解质的电镀槽，用于保持半导体衬底的衬底保持器和用于将邻近衬底保持器的部分电解质加热至高于第一温度的第二温度的加热器 温度。

公开(公告)号：US06649513B1

公开(公告)日：2003-11-18

申请号：US10146286

申请日：2002-05-15

申请人： Ming-Hsing Tsai ,  Shih-Wei Chou ,  Winston Shue ,  Mong-Song Liang

发明人： Ming-Hsing Tsai ,  Shih-Wei Chou ,  Winston Shue ,  Mong-Song Liang

IPC分类号： H01L214763

CPC分类号： H01L21/76831 ,  H01L21/3212 ,  H01L21/32134 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76855 ,  H01L21/76873 ,  H01L21/76877

摘要： A method of fabricating a planarized metal structure comprising the following steps. A structure is provided. A patterned dielectric layer is formed over the structure. The patterned dielectric layer having an opening formed therein and exposing at least a portion of the structure. A first-metal layer is formed over the patterned dielectric layer filling the opening. The first-metal layer including at least a doped metal portion adjacent the patterned dielectric layer. The doped metal portion being doped with a second-metal. The structure is annealed to form a second-metal oxide layer adjacent the patterned dielectric layer. The first-metal layer and the second-metal oxide layer are planarized using only a electropolishing process to remove the excess of the first-metal layer and the second-metal oxide layer from over the patterned dielectric layer and leaving a planarized metal structure within the opening.

摘要翻译： 一种制造平面化金属结构的方法，包括以下步骤。 提供了一种结构。 在该结构上形成图案化的介电层。 所述图案化介电层具有形成在其中的开口并暴露所述结构的至少一部分。 在填充开口的图案化电介质层上形成第一金属层。 第一金属层至少包括邻近图案化介电层的掺杂金属部分。 掺杂金属部分掺杂有第二金属。 将该结构退火以形成邻近图案化介电层的第二金属氧化物层。 第一金属层和第二金属氧化物层仅使用电解抛光工艺进行平面化，以从图案化的介电层上除去过量的第一金属层和第二金属氧化物层，并在其内部留下平坦化的金属结构 开放

公开(公告)号：US06573187B1

公开(公告)日：2003-06-03

申请号：US09378458

申请日：1999-08-20

申请人： Sheng-Hsiung Chen ,  Ming-Hsing Tsai

发明人： Sheng-Hsiung Chen ,  Ming-Hsing Tsai

IPC分类号： H01L21302

CPC分类号： H01L21/76835 ,  H01L21/76807

摘要： A new method is provided for creating a dual damascene structure. Two layers of dielectric are deposited in sequence. The lower layer of dielectric is the via dielectric and is selected such that it has a low etching rate (when compared with the upper layer of dielectric) and results in different volatile gas during the etch of the via. A first photoresist is patterned for the via, the etch for the via etches through both layers of dielectric. A second layer of photoresist is patterned for the trench etch, due to the difference in etch rate between the two layers of dielectric, the trench of the dual damascene structure is etched without further affecting the via etch in the lower layer of dielectric.

摘要翻译： 提供了一种创建双镶嵌结构的新方法。 依次沉积两层电介质。 电介质的下层是通孔电介质，并且被选择为使得其具有低蚀刻速率（当与电介质的上层相比时），并且在蚀刻通孔期间导致不同的挥发性气体。 对于通孔图案化第一光致抗蚀剂，蚀刻通过两个电介质层的通孔蚀刻。 为了沟槽蚀刻，第二层光致抗蚀剂被图案化，由于两层电介质之间的蚀刻速率差异，双镶嵌结构的沟槽被蚀刻，而不会进一步影响电介质的下层中的通孔蚀刻。

公开(公告)号：US06303498B1

公开(公告)日：2001-10-16

申请号：US09378497

申请日：1999-08-20

申请人： Sheng-Hsiung Chen ,  Ming-Hsing Tsai

发明人： Sheng-Hsiung Chen ,  Ming-Hsing Tsai

IPC分类号： H01L2144

CPC分类号： H01L21/76873 ,  H01L21/76843

摘要： A new method is provided whereby a copper seed layer is deposited over a barrier layer of TaN. Under the first embodiment of the invention, a doped seed layer is deposited over the barrier layer. Under the second embodiment of the invention a thin layer of metal is deposited over a seed layer of pure copper thereby preventing oxidation of the copper seed layer.

摘要翻译： 提供了一种新的方法，其中铜籽晶层沉积在TaN的阻挡层上。 在本发明的第一实施例中，在阻挡层上沉积掺杂种子层。 在本发明的第二实施例中，在纯铜的种子层上沉积薄层金属，从而防止铜籽晶层的氧化。

公开(公告)号：US06235637B1

公开(公告)日：2001-05-22

申请号：US09396518

申请日：1999-09-15

申请人： Sheng-Hsiung Chen ,  Ming-Hsing Tsai

发明人： Sheng-Hsiung Chen ,  Ming-Hsing Tsai

IPC分类号： H01L21311

CPC分类号： H01L23/544 ,  H01L2223/54493 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method for marking a semiconductor wafer without inducing flat edge particles, using a laser scribing technique. The process begins by providing a semiconductor wafer having a marking area with a silicon top layer. The semiconductor wafer is coated with a photoresist layer. A volume of the photoresist layer and a volume of silicon top layer are removed corresponding to the intended marking. Optionally, the marking pattern can be further etched into the silicon top layer by anisotropic etching, using the photoresist layer as an etching mask. In another option, the laser scribing process can be set to scribe the marking pattern in the photoresist layer without scribing the silicon top layer. The marking pattern can then be anisotropically etched into the silicon top layer, using the photoresist layer as an etching mask. Alternatively, the photoresist layer can be patterned to form an opening in the photoresist layer over a marking area, thereby exposing the silicon top layer. The silicon top layer is then marked using a laser scribing technique, and the photoresist layer prevents contamination of the device areas of the wafer by the silicon particles generated by the laser scribing technique.

摘要翻译： 使用激光划线技术来标记半导体晶片而不引起平坦边缘颗粒的方法。 该过程开始于提供具有带硅顶层的标记区域的半导体晶片。 半导体晶片被涂覆有光致抗蚀剂层。 根据预期的标记去​​除光致抗蚀剂层的体积和硅顶层的体积。 可选地，使用光致抗蚀剂层作为蚀刻掩模，可以通过各向异性蚀刻将标记图案进一步蚀刻到硅顶层中。 在另一种选择中，可以设置激光划线工艺以划刻光致抗蚀剂层中的标记图案，而无需划线硅顶层。 然后可以使用光致抗蚀剂层作为蚀刻掩模将标记图案各向异性地蚀刻到硅顶层中。 或者，光致抗蚀剂层可以被图案化以在标记区域上在光致抗蚀剂层中形成开口，从而暴露硅顶层。 然后使用激光划线技术标记硅顶层，并且光致抗蚀剂层防止由激光划线技术产生的硅颗粒对晶片的器件区域的污染。

公开(公告)号：US08785321B2

公开(公告)日：2014-07-22

申请号：US13249823

申请日：2011-09-30

申请人： Ting-Chu Ko ,  Ming-Hsing Tsai ,  Chien-Hsueh Shih

发明人： Ting-Chu Ko ,  Ming-Hsing Tsai ,  Chien-Hsueh Shih

IPC分类号： H01L21/4763

CPC分类号： H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method and system is provided for efficiently varying the composition of the metal interconnects for a semiconductor device. A metal interconnect according to the present disclosure has an intermediate layer on a dielectric material, the intermediate layer having a relatively higher concentration of an impurity metal along with a primary metal, the impurity metal having a lower reduction potential than the primary metal. The metal interconnect has a main layer of the metal alloy interconnect on top of the intermediate layer and surrounded by the intermediate layer, the main layer having a relatively higher concentration of the primary metal than the intermediate layer, wherein the intermediate and main layers of the metal alloy interconnect each maintains a material uniformity.

摘要翻译： 提供了一种方法和系统，用于有效地改变半导体器件的金属互连的组成。 根据本公开的金属互连在电介质材料上具有中间层，中间层与主金属一起具有较高浓度的杂质金属，杂质金属具有比初级金属低的还原电位。 金属互连件在中间层的顶部具有金属合金互连的主层，被中间层包围，主层具有比中间层更高的一次金属浓度，其中，中间层和中间层的中间层和主要层 金属合金互连件均保持材料均匀性。

公开(公告)号：US07544281B2

公开(公告)日：2009-06-09

申请号：US11119183

申请日：2005-04-28

申请人： Ming-Wei Lin ,  Ming-Hsing Tsai

发明人： Ming-Wei Lin ,  Ming-Hsing Tsai

IPC分类号： C25D5/02

CPC分类号： C25D17/06 ,  C25D5/18 ,  C25D7/123 ,  C25D17/001 ,  C25D17/005 ,  H01L21/2885

摘要： An electrochemical plating apparatus and method for facilitating uniform current distribution across a wafer during loading into an ECP (electrochemical plating) apparatus is disclosed. The apparatus includes a bath container for containing a bath solution, an anode provided in the bath container, a cathode ring for supporting a wafer in the bath container and a current source electrically connected to the anode and the cathode ring. According to the method, a voltage potential is applied to the cathode ring as it is immersed into the solution and prior to immersion of the wafer in the solution, thereby facilitating a substantially uniform plating current across the wafer upon immersion of the wafer.

摘要翻译： 公开了一种用于在装载到ECP（电化学电镀）装置中时促进在晶片上均匀分布电流的电化学电镀装置和方法。 该装置包括用于容纳浴溶液的浴容器，设置在浴容器中的阳极，用于在浴容器中支撑晶片的阴极环和与阳极和阴极环电连接的电流源。 根据该方法，当阴极环浸入溶液中并且在将晶片浸入溶液之前，电压电势被施加到阴极环上，从而有助于在晶片浸入时跨晶片的基本均匀的电镀电流。

公开(公告)号：US20070054488A1

公开(公告)日：2007-03-08

申请号：US11341827

申请日：2006-01-27

申请人： Ting-Chu Ko ,  Ming-Hsing Tsai ,  Chien-Hsueh Shih

发明人： Ting-Chu Ko ,  Ming-Hsing Tsai ,  Chien-Hsueh Shih

IPC分类号： H01L21/4763

CPC分类号： H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method and system is provided for efficiently varying the composition of the metal interconnects for a semiconductor device. A metal interconnect according to the present disclosure has an intermediate layer on a dielectric material, the intermediate layer having a relatively higher concentration of an impurity metal along with a primary metal, the impurity metal having a lower reduction potential than the primary metal. The metal interconnect has a main layer of the metal alloy interconnect on top of the intermediate layer and surrounded by the intermediate layer, the main layer having a relatively higher concentration of the primary metal than the intermediate layer, wherein the intermediate and main layers of the metal alloy interconnect each maintains a material uniformity.

摘要翻译： 提供了一种方法和系统，用于有效地改变半导体器件的金属互连的组成。 根据本公开的金属互连在电介质材料上具有中间层，中间层与主金属一起具有较高浓度的杂质金属，杂质金属具有比初级金属低的还原电位。 金属互连件在中间层的顶部具有金属合金互连的主层，被中间层包围，主层具有比中间层更高的一次金属浓度，其中，中间层和中间层的中间层和主要层 金属合金互连件均保持材料均匀性。

公开(公告)号：US20070048991A1

公开(公告)日：2007-03-01

申请号：US11209891

申请日：2005-08-23

申请人： Chien-Hsueh Shih ,  Ming-Hsing Tsai ,  Hung-Wen Su

发明人： Chien-Hsueh Shih ,  Ming-Hsing Tsai ,  Hung-Wen Su

IPC分类号： H01L21/44

CPC分类号： H01L21/76849 ,  H01L21/76883

摘要： Copper interconnect structures for interconnection. The interconnect structure has a copper recess in a damascene structure with copper filled in a via/trench of a dielectric layer. Furthermore, the interconnect structure can also have a metal cap filled the copper recess.

摘要翻译： 用于互连的铜互连结构。 互连结构具有镶嵌结构中的铜凹槽，铜填充在电介质层的通孔/沟槽中。 此外，互连结构还可以具有填充铜凹部的金属盖。

公开(公告)号：US20060196775A1

公开(公告)日：2006-09-07

申请号：US11072137

申请日：2005-03-04

申请人： Hung-Wen Su ,  Ming-Hsing Tsai

发明人： Hung-Wen Su ,  Ming-Hsing Tsai

IPC分类号： C25D3/00 ,  C25D17/04

CPC分类号： C25D17/001 ,  C25D17/005 ,  H01L21/2885 ,  H01L21/76841

摘要： Methods and apparatuses for electrochemically depositing a metal layer onto a substrate. An electrochemical deposition apparatus comprises a substrate holder assembly including a substrate chuck and a relatively soft cathode contact ring. The cathode contact ring comprises an inner portion and an outer portion, wherein the inner portion directly contacts the substrate. An anode is disposed in an electrolyte container. A power supply connects the substrate holder assembly and the anode.