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56 条记录 (耗时 0.062 秒)

    Semiconductor device
    51.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US08637922B1

    公开(公告)日：2014-01-28

    申请号：US13553573

    申请日：2012-07-19

    申请人： Ralf Siemieniec ,  Dethard Peters ,  Peter Friedrichs

    发明人： Ralf Siemieniec ,  Dethard Peters ,  Peter Friedrichs

    IPC分类号： H01L29/66 ,  H01L21/336

    CPC分类号： H01L29/7813 ,  H01L21/049 ,  H01L27/0727 ,  H01L29/045 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/1608 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42376 ,  H01L29/66068 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7805 ,  H01L29/7806

    摘要： A manufacturing method provides a semiconductor device having a semiconductor body defining a source region, a body region, a drift region and a diode region. The drift region has a first drift region section and a second drift region section. The diode region is buried within the drift region, and has a semiconductor type opposite to the drift region to form a diode. The diode region is separated from the gate electrode by the first drift region section extending from the diode region in a vertical direction. The gate electrode is adjacent the body region and insulated from the body region by a gate dielectric. A source electrode is electrically connected to the source region, the body region and the diode region. A semiconductor region of a doping type opposite to the doping type of the drift region is arranged between the first drift region section and the source electrode.

    摘要翻译： 制造方法提供了具有限定源极区域，体区域，漂移区域和二极管区域的半导体本体的半导体器件。 漂移区具有第一漂移区和第二漂移区。 二极管区域被埋在漂移区域内，并且具有与漂移区域相反的半导体类型以形成二极管。 二极管区域通过从二极管区域沿垂直方向延伸的第一漂移区域与栅电极分离。 栅电极与本体区域相邻并且通过栅极电介质与体区绝缘。 源电极电连接到源极区域，主体区域和二极管区域。 与漂移区域的掺杂类型相反的掺杂类型的半导体区域被布置在第一漂移区域和源极之间。

    Semiconductor Device
    52.
    发明申请
    Semiconductor Device 有权
    半导体器件

    公开(公告)号：US20140021484A1

    公开(公告)日：2014-01-23

    申请号：US13553573

    申请日：2012-07-19

    申请人： Ralf Siemieniec ,  Dethard Peters ,  Peter Friedrichs

    发明人： Ralf Siemieniec ,  Dethard Peters ,  Peter Friedrichs

    IPC分类号： H01L27/06 ,  H01L21/336

    CPC分类号： H01L29/7813 ,  H01L21/049 ,  H01L27/0727 ,  H01L29/045 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/1608 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42376 ,  H01L29/66068 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7805 ,  H01L29/7806

    摘要： A manufacturing method provides a semiconductor device having a semiconductor body defining a source region, a body region, a drift region and a diode region. The drift region has a first drift region section and a second drift region section. The diode region is buried within the drift region, and has a semiconductor type opposite to the drift region to form a diode. The diode region is separated from the gate electrode by the first drift region section extending from the diode region in a vertical direction. The gate electrode is adjacent the body region and insulated from the body region by a gate dielectric. A source electrode is electrically connected to the source region, the body region and the diode region. A semiconductor region of a doping type opposite to the doping type of the drift region is arranged between the first drift region section and the source electrode.

    摘要翻译： 制造方法提供了具有限定源极区域，体区域，漂移区域和二极管区域的半导体本体的半导体器件。 漂移区具有第一漂移区和第二漂移区。 二极管区域被埋在漂移区内，并且具有与漂移区域相反的半导体类型以形成二极管。 二极管区域通过从二极管区域沿垂直方向延伸的第一漂移区域与栅电极分离。 栅电极与本体区域相邻并且通过栅极电介质与体区绝缘。 源电极电连接到源极区域，主体区域和二极管区域。 与漂移区域的掺杂类型相反的掺杂类型的半导体区域被布置在第一漂移区域和源极之间。

    Stress-Controlled HEMT
    53.
    发明申请
    Stress-Controlled HEMT 有权
    应力控制HEMT

    公开(公告)号：US20140008658A1

    公开(公告)日：2014-01-09

    申请号：US13540711

    申请日：2012-07-03

    申请人： Ralf Siemieniec ,  Gilberto Curatola

    发明人： Ralf Siemieniec ,  Gilberto Curatola

    IPC分类号： H01L29/778 ,  H01L21/20 ,  H01L29/20

    CPC分类号： H01L29/42372 ,  H01L21/28247 ,  H01L21/28581 ,  H01L29/1054 ,  H01L29/1075 ,  H01L29/66462 ,  H01L29/7787 ,  H01L29/84

    摘要： A transistor device includes a heterostructure body having a source, a drain spaced apart from the source and a two-dimensional charge carrier gas channel between the source and the drain. The transistor device further includes a piezoelectric gate on the heterostructure body. The piezoelectric gate is operable to control the channel below the piezoelectric gate by increasing or decreasing a force applied to the heterostructure body responsive to a voltage applied to the piezoelectric gate.

    摘要翻译： 晶体管器件包括具有源极，与源极间隔开的漏极和源极与漏极之间的二维电荷载流子通道的异质结构体。 晶体管器件还包括异质结构体上的压电栅极。 压电栅极可操作以通过响应于施加到压电栅极的电压增加或减小施加到异质结构体的力来控制压电栅极下方的沟道。

    TRANSISTOR ARRANGEMENT WITH A MOSFET
    55.
    发明申请
    TRANSISTOR ARRANGEMENT WITH A MOSFET 有权
    MOSFET的晶体管布置

    公开(公告)号：US20120267704A1

    公开(公告)日：2012-10-25

    申请号：US13092546

    申请日：2011-04-22

    申请人： Ralf Siemieniec ,  Hans-Joachim Schulze

    发明人： Ralf Siemieniec ,  Hans-Joachim Schulze

    IPC分类号： H01L29/78

    CPC分类号： H01L29/7813 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/7803 ,  H01L29/8083

    摘要： A semiconductor arrangement includes a MOSFET having a source region, a drift region and a drain region of a first conductivity type, a body region of a second conductivity type arranged between the source region and the drift region, a gate electrode arranged adjacent the body region and dielectrically insulated from the body region by a gate dielectric, and a source electrode contacting the source region and the body region. The semiconductor arrangement further includes a normally-off JFET having a channel region of the first conductivity type that is coupled between the source electrode and the drift region and extends adjacent the body region so that a p-n junction is formed between the body region and the channel region.

    摘要翻译： 半导体装置包括具有第一导电类型的源极区域，漂移区域和漏极区域的MOSFET，设置在源极区域和漂移区域之间的第二导电类型的体区域，邻近体区域布置的栅极电极 并通过栅极电介质与体区电介质绝缘，以及与源区和身体区接触的源电极。 该半导体装置还包括常闭JFET，其具有第一导电类型的沟道区，该沟道区耦合在源电极和漂移区之间并且在身体区附近延伸，使得在体区和通道之间形成pn结 地区。