公开(公告)号：US11916071B2

公开(公告)日：2024-02-27

申请号：US17678856

申请日：2022-02-23

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Yi-Jing Lee ,  Kun-Mu Li ,  Ming-Hua Yu ,  Tsz-Mei Kwok

IPC: H01L27/088 ,  H01L21/8234 ,  H01L21/8238 ,  H01L21/84 ,  H01L27/092 ,  H01L27/12 ,  H01L29/06 ,  H01L29/78

CPC classification number: H01L27/0886 ,  H01L21/823418 ,  H01L21/823431 ,  H01L21/823468 ,  H01L21/823821 ,  H01L21/845 ,  H01L27/0924 ,  H01L27/1211 ,  H01L29/0649 ,  H01L29/7848

Abstract: A device includes first and second semiconductor fins, first, second, third and fourth fin sidewall spacers, and first and second epitaxy structures. The first and second fin sidewall spacers are respectively on opposite sides of the first semiconductor fin. The third and fourth fin sidewall spacers are respectively on opposite sides of the second semiconductor fin. The first and third fin sidewall spacers are between the first and second semiconductor fins and have smaller heights than the second and fourth fin sidewall spacers. The first and second epitaxy structures are respectively on the first and second semiconductor fins and merged together.

公开(公告)号：US11855188B2

公开(公告)日：2023-12-26

申请号：US17809963

申请日：2022-06-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Chiang Chang ,  Ming-Hua Yu ,  Li-Li Su

IPC: H01L29/66 ,  H01L21/20 ,  H01L21/8234 ,  H01L27/092 ,  H01L29/417 ,  H01L29/78

CPC classification number: H01L29/66795 ,  H01L21/20 ,  H01L21/823431 ,  H01L27/0924 ,  H01L29/41791 ,  H01L29/785

Abstract: A method includes forming a first semiconductor fin and a second semiconductor fin in an n-type Fin Field-Effect (FinFET) region and a p-type FinFET region, respectively, forming a first dielectric fin and a second dielectric fin in the n-type FinFET region and the p-type FinFET region, respectively, forming a first epitaxy mask to cover the second semiconductor fin and the second dielectric fin, performing a first epitaxy process to form an n-type epitaxy region based on the first semiconductor fin, removing the first epitaxy mask, forming a second epitaxy mask to cover the n-type epitaxy region and the first dielectric fin, performing a second epitaxy process to form a p-type epitaxy region based on the second semiconductor fin, and removing the second epitaxy mask. After the second epitaxy mask is removed, a portion of the second epitaxy mask is left on the first dielectric fin.

公开(公告)号：US20230383435A1

公开(公告)日：2023-11-30

申请号：US18447493

申请日：2023-08-10

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Li-Ting Wang ,  Jung-Jen Chen ,  Ming-Hua Yu ,  Yee-Chia Yeo

IPC: C30B25/16 ,  C30B25/10

CPC classification number: C30B25/165 ,  C30B25/10

Abstract: In an embodiment, an apparatus includes a first pyrometer and a second pyrometer configured to monitor thermal radiation from a first point and a second point on a backside of a wafer, respectively, a first heating source in a first region and a second heating source in a second region of an epitaxial growth chamber, respectively, where a first controller adjusts an output of the first heating source and the second heating source based upon the monitored thermal radiation from the first point and the second point, respectively, a third pyrometer and a fourth pyrometer configured to monitor thermal radiation from a third point and a fourth point on a frontside of the wafer, respectively, where a second controller adjusts a flow rate of one or more precursors injected into the epitaxial growth chamber based upon the monitored thermal radiation from the first, second, third, and fourth points.

公开(公告)号：US11830934B2

公开(公告)日：2023-11-28

申请号：US17092838

申请日：2020-11-09

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yi-Jing Lee ,  Ming-Hua Yu

IPC: H01L29/66 ,  H01L29/06 ,  H01L21/02 ,  H01L29/08 ,  H01L29/78 ,  H01L29/167 ,  H01L29/36 ,  H01L29/49 ,  H01L21/3065 ,  H01L21/306 ,  H01L21/28

CPC classification number: H01L29/66795 ,  H01L21/0262 ,  H01L21/02532 ,  H01L21/02579 ,  H01L29/0649 ,  H01L29/0847 ,  H01L29/167 ,  H01L29/36 ,  H01L29/6656 ,  H01L29/66545 ,  H01L29/66636 ,  H01L29/7851 ,  H01L21/28088 ,  H01L21/3065 ,  H01L21/30604 ,  H01L29/4966

Abstract: A method includes recessing a semiconductor fin to form a recess, wherein the semiconductor fin protrudes higher than isolation regions on opposite sides of the semiconductor fin, and performing a first epitaxy to grow a first epitaxy layer extending into the recess. The first epitaxy is performed using a first process gas comprising a silicon-containing gas, silane, and a phosphorous-containing gas. The first epitaxy layer has a first phosphorous atomic percentage. The method further includes performing a second epitaxy to grow a second epitaxy layer extending into the recess and over the first epitaxy layer. The second epitaxy is performed using a second process gas comprising the silicon-containing gas, silane, and the phosphorous-containing gas. The second epitaxy layer has a second phosphorous atomic percentage higher than the first phosphorous atomic percentage.

公开(公告)号：US20230378328A1

公开(公告)日：2023-11-23

申请号：US18361391

申请日：2023-07-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yi-Jing Lee ,  Ming-Hua Yu

IPC: H01L29/66 ,  H01L29/06 ,  H01L21/02 ,  H01L29/08 ,  H01L29/78 ,  H01L29/167 ,  H01L29/36

CPC classification number: H01L29/66795 ,  H01L29/0649 ,  H01L21/02532 ,  H01L21/0262 ,  H01L29/0847 ,  H01L29/7851 ,  H01L29/167 ,  H01L29/66545 ,  H01L29/6656 ,  H01L21/02579 ,  H01L29/36 ,  H01L29/66636 ,  H01L29/4966

Abstract: A method includes recessing a semiconductor fin to form a recess, wherein the semiconductor fin protrudes higher than isolation regions on opposite sides of the semiconductor fin, and performing a first epitaxy to grow a first epitaxy layer extending into the recess. The first epitaxy is performed using a first process gas comprising a silicon-containing gas, silane, and a phosphorous-containing gas. The first epitaxy layer has a first phosphorous atomic percentage. The method further includes performing a second epitaxy to grow a second epitaxy layer extending into the recess and over the first epitaxy layer. The second epitaxy is performed using a second process gas comprising the silicon-containing gas, silane, and the phosphorous-containing gas. The second epitaxy layer has a second phosphorous atomic percentage higher than the first phosphorous atomic percentage.

公开(公告)号：US11574916B2

公开(公告)日：2023-02-07

申请号：US17089580

申请日：2020-11-04

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Yi-Jing Lee ,  Tsz-Mei Kwok ,  Ming-Hua Yu ,  Kun-Mu Li

IPC: H01L27/11 ,  H01L27/02 ,  H01L29/78 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/06 ,  H01L29/08 ,  H01L29/165

Abstract: A method for manufacturing a semiconductor device includes etching a substrate to form a semiconductor fin. An isolation structure is formed above the substrate and laterally surrounds the semiconductor fin. A fin sidewall structure is formed above the isolation structure and on a sidewall of the semiconductor fin. The semiconductor fin is recessed to expose an inner sidewall of the fin sidewall structure. A source/drain epitaxial structure is grown on the recessed semiconductor fin.

公开(公告)号：US20220384437A1

公开(公告)日：2022-12-01

申请号：US17818627

申请日：2022-08-09

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jung-Chi Tai ,  Yi-Fang Pai ,  Tsz-Mei Kwok ,  Tsung-Hsi Yang ,  Jeng-Wei Yu ,  Cheng-Hsiung Yen ,  Jui-Hsuan Chen ,  Chii-Horng Li ,  Yee-Chia Yeo ,  Heng-Wen Ting ,  Ming-Hua Yu

IPC: H01L27/092 ,  H01L21/8234 ,  H01L29/06 ,  H01L29/66 ,  H01L29/78

Abstract: A method includes forming a gate stack on a first portion of a semiconductor fin, removing a second portion of the semiconductor fin to form a recess, and forming a source/drain region starting from the recess. The formation of the source/drain region includes performing a first epitaxy process to grow a first semiconductor layer, wherein the first semiconductor layer has straight-and-vertical edges, and performing a second epitaxy process to grow a second semiconductor layer on the first semiconductor layer. The first semiconductor layer and the second semiconductor layer are of a same conductivity type.

公开(公告)号：US11355500B2

公开(公告)日：2022-06-07

申请号：US16927751

申请日：2020-07-13

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Yi-Jing Lee ,  Tsz-Mei Kwok ,  Ming-Hua Yu ,  Kun-Mu Li

IPC: H01L27/11 ,  H01L27/02 ,  H01L29/78 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/06 ,  H01L29/08 ,  H01L29/165

Abstract: A static random access memory (SRAM) cell includes a semiconductor fin, a first gate structure, a second gate structure, an epitaxy structure, and a first fin sidewall structure. The first gate structure crosses the semiconductor fin to form a pull-down (PD) transistor. The second gate structure crosses the semiconductor fin to form a pull-gate (PG) transistor. The epitaxy structure is on the semiconductor fin and between the first and second gate structures. The first fin sidewall structure is on a first side of the epitaxy structure and between the first and second gate structures. A method for manufacturing the semiconductor device is also disclosed.

公开(公告)号：US20220028856A1

公开(公告)日：2022-01-27

申请号：US17143681

申请日：2021-01-07

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jung-Chi Tai ,  Yi-Fang Pai ,  Tsz-Mei Kwok ,  Tsung-Hsi Yang ,  Jeng-Wei Yu ,  Cheng-Hsiung Yen ,  Jui-Hsuan Chen ,  Chii-Horng Li ,  Yee-Chia Yeo ,  Heng-Wen Ting ,  Ming-Hua Yu

IPC: H01L27/092 ,  H01L29/78 ,  H01L21/8234 ,  H01L29/06 ,  H01L29/66

Abstract: A method includes forming a gate stack on a first portion of a semiconductor fin, removing a second portion of the semiconductor fin to form a recess, and forming a source/drain region starting from the recess. The formation of the source/drain region includes performing a first epitaxy process to grow a first semiconductor layer, wherein the first semiconductor layer has straight-and-vertical edges, and performing a second epitaxy process to grow a second semiconductor layer on the first semiconductor layer. The first semiconductor layer and the second semiconductor layer are of a same conductivity type.

公开(公告)号：US20200161185A1

公开(公告)日：2020-05-21

申请号：US16773268

申请日：2020-01-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yi-Jing Lee ,  Jeng-Wei Yu ,  Li-Wei Chou ,  Tsz-Mei Kwok ,  Ming-Hua Yu

IPC: H01L21/822 ,  H01L27/06 ,  H01L21/84 ,  H01L27/092 ,  H01L27/088 ,  H01L21/8238 ,  H01L21/8234 ,  H01L29/78 ,  H01L29/417 ,  H01L29/66

Abstract: A semiconductor device and method of forming the same is disclosed. The semiconductor device includes a semiconductor substrate, a first fin and a second fin extending from the semiconductor substrate, a first lower semiconductor feature directly over the first fin, and a second lower semiconductor feature directly over the second fin. Each of the first and second lower semiconductor features includes a top surface bending downward towards the semiconductor substrate. The semiconductor also further includes an upper semiconductor feature directly over and in physical contact with the first and second lower semiconductor features. The semiconductor device further includes a dielectric layer on sidewalls of the first and second lower semiconductor features.