公开(公告)号：US20130074878A1

公开(公告)日：2013-03-28

申请号：US13243315

申请日：2011-09-23

申请人： Jeng-Hsing Jang ,  Yi-Nan Chen ,  Hsien-Wen Liu

发明人： Jeng-Hsing Jang ,  Yi-Nan Chen ,  Hsien-Wen Liu

IPC分类号： B08B7/00

CPC分类号： B08B17/025 ,  H01L21/67051 ,  H01L21/6715 ,  Y10S134/902

摘要： A wafer scrubber is disclosed, including a chamber, and a holder connecting to a spindle disposed in the chamber, wherein the holder supports a wafer, and the wafer spins to remove water on the wafer, and a mashed inner cup comprising a plurality of through holes disposed between the holder and a wall of the chamber, wherein the mashed inner cup receives water from a surface of the wafer and rotates around the spindle to release the water through the through holes.

摘要翻译： 公开了一种晶片洗涤器，其包括腔室和连接到设置在腔室中的心轴的保持器，其中保持器支撑晶片，并且晶片旋转以去除晶片上的水，以及捣碎的内杯，其包括多个通孔 设置在保持器和室的壁之间的孔，其中，捣碎的内杯从晶片的表面接收水并围绕心轴旋转以通过通孔释放水。

公开(公告)号：US08399321B2

公开(公告)日：2013-03-19

申请号：US13111745

申请日：2011-05-19

申请人： Ping Hsu ,  Yi-Nan Chen ,  Hsien-Wen Liu

发明人： Ping Hsu ,  Yi-Nan Chen ,  Hsien-Wen Liu

IPC分类号： H01L21/8242 ,  H01L21/336 ,  H01L21/425

CPC分类号： H01L27/10867 ,  H01L21/26586 ,  H01L27/10873 ,  H01L29/1083 ,  H01L29/66659

摘要： The method for manufacturing a memory device is provided. The method includes: implanting a first impurity into the substrate adjacent to the gate conductor structure to form a source region on a first side of the gate conductor structure and a drain region on a second side of the gate conductor structure; implanting a second impurity into the substrate to form a halo implantation region disposed adjacent to the source region, wherein the halo implantation region has a doping concentration which does not degrade a data retention time of the memory device; and performing an annealing process to the drain region, forming a diffusion region under the drain region, wherein the process temperature of the annealing process is controlled to ensure that the diffusion region has a doping concentration substantially equal to a threshold concentration which maintains an electrical connection between the drain and the deep trench capacitor.

摘要翻译： 提供了一种用于制造存储器件的方法。 该方法包括：将第一杂质注入到与栅极导体结构相邻的衬底中，以在栅极导体结构的第一侧上形成源极区，在栅极导体结构的第二侧上形成漏极区; 将第二杂质注入到所述衬底中以形成邻近所述源极区设置的卤素注入区，其中所述晕圈注入区具有不降解所述存储器件的数据保留时间的掺杂浓度; 对所述漏极区进行退火处理，在所述漏极区域下方形成扩散区域，其中，控制所述退火处理的工艺温度，以确保所述扩散区域的掺杂浓度基本上等于保持电连接的阈值浓度 在漏极和深沟槽电容器之间。

公开(公告)号：US20120289134A1

公开(公告)日：2012-11-15

申请号：US13106861

申请日：2011-05-13

申请人： Li-Chung Liu ,  Yi-Nan Chen ,  Hsien-Wen Liu

发明人： Li-Chung Liu ,  Yi-Nan Chen ,  Hsien-Wen Liu

IPC分类号： B24B57/00

CPC分类号： B24B57/02 ,  B24B37/04

摘要： A CMP slurry mix and delivery system includes at least one container for holding a polishing agent; a pump connected to the container for pumping the polishing agent to a point of use; and a slurry dispersion unit installed between the pump and the point of use, wherein slurry dispersion unit provides megasonic energy that is capable of dispersing the polishing agent flowing through the slurry dispersion unit.

摘要翻译： CMP浆料混合和输送系统包括至少一个用于保持抛光剂的容器; 连接到容器以将抛光剂泵送到使用点的泵; 以及安装在泵和使用点之间的浆料分散单元，其中浆料分散单元提供能够分散流过浆料分散单元的抛光剂的兆声波能量。

公开(公告)号：US20120288968A1

公开(公告)日：2012-11-15

申请号：US13106837

申请日：2011-05-12

申请人： Ming-Teng Hsieh ,  Yi-Nan Chen ,  Hsien-Wen Liu

发明人： Ming-Teng Hsieh ,  Yi-Nan Chen ,  Hsien-Wen Liu

IPC分类号： H01L21/66

CPC分类号： H01L22/20 ,  H01L22/14 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method for repairing a semiconductor structure having a current-leakage issue includes finding a semiconductor structure having a current-leakage issue through application of a test voltage from an electric test device and applying an electric power stress to the semiconductor structure to melt a stringer or a bridge between two conductive elements or to allow the stringer or the bridge to be oxidized.

摘要翻译： 一种用于修复具有电流泄漏问题的半导体结构的方法包括通过施加来自电测试装置的测试电压来发现具有电流泄漏问题的半导体结构，并向半导体结构施加电力应力以熔化桁条或 两个导电元件之间的桥梁或允许桁条或桥被氧化。

公开(公告)号：US20120288967A1

公开(公告)日：2012-11-15

申请号：US13105909

申请日：2011-05-12

申请人： Ming-Teng Hsieh ,  Yi-Nan Chen ,  Hsien-Wen Liu

发明人： Ming-Teng Hsieh ,  Yi-Nan Chen ,  Hsien-Wen Liu

IPC分类号： H01L21/30 ,  H01L21/306

CPC分类号： H01L21/56 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2924/00014 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/1434 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A method for decapsulating an integrated circuit package without the need of using a mask during the decapsulation process is disclosed. First, a package is provided. The package includes at least a circuit element and a molding compound enclosing the circuit. Second, a caustic solution is simultaneously provided. The caustic solution is capable of etching the molding compound and intermittently contacts a pre-selected area of the molding compound to etch the molding compound. As a consequence, the caustic solution removes the molding compound in the pre-selected area so the circuit element in the package is substantially exposed.

摘要翻译： 公开了一种在解封装过程中不需要使用掩模的集成电路封装的封装方法。 首先，提供一个包装。 封装件至少包括电路元件和封装电路的模塑料。 其次，同时提供苛性碱溶液。 苛性溶液能够蚀刻模塑料并间歇地接触模塑料的预先选择的区域以蚀刻模塑料。 因此，苛性溶液去除了预选区域中的模塑料，使得包装中的电路元件基本上暴露出来。

公开(公告)号：US20120288684A1

公开(公告)日：2012-11-15

申请号：US13106841

申请日：2011-05-12

申请人： Ming-Teng Hsieh ,  Yi-Nan Chen ,  Hsien-Wen Liu

发明人： Ming-Teng Hsieh ,  Yi-Nan Chen ,  Hsien-Wen Liu

IPC分类号： B32B3/00 ,  B23K1/20 ,  B23K31/02

CPC分类号： H01L24/85 ,  H01L23/3121 ,  H01L23/4952 ,  H01L23/49575 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/78 ,  H01L25/0657 ,  H01L2224/1134 ,  H01L2224/13019 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/16238 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48245 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/4847 ,  H01L2224/48479 ,  H01L2224/48499 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/81191 ,  H01L2224/85 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/181 ,  Y10T428/24612 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2224/4554

摘要： A bump structure including a base portion, an inlaid wire segment, and a protruding tail segment is provided. The base portion is bonded on a bonding site. The inlaid wire segment is pressed into a top surface of the base portion. The protruding tail segment extends from the inlaid wire segment. The methods for forming the bump structure are also provided.

摘要翻译： 提供了包括基部，镶嵌线段和突出尾段的凸块结构。 基部结合在接合部位上。 嵌入的线段被压入基部的顶表面。 突出的尾部段从嵌入的线段延伸。 还提供了用于形成凸块结构的方法。

公开(公告)号：US20120285484A1

公开(公告)日：2012-11-15

申请号：US13106869

申请日：2011-05-13

申请人： Li-Chung Liu ,  Yi-Nan Chen ,  Hsien-Wen Liu

发明人： Li-Chung Liu ,  Yi-Nan Chen ,  Hsien-Wen Liu

IPC分类号： B08B1/00

CPC分类号： H01L21/02052 ,  B08B1/00 ,  H01L21/67046

摘要： A wafer cleaning method includes: (1) providing a wafer cleaning apparatus comprising a sponge for scrubbing a surface of a semiconductor wafer to be cleaned; (2) implementing a pre-conditioning flow to pre-condition the sponge using a dummy wafer; and (3) performing a regular cleaning flow to scrub the surface of the semiconductor wafer to be cleaned using the pre-conditioned sponge. The dummy wafer has a plurality of upward protruding features on a surface of the dummy wafer for removing residual fibers or unwanted substances from the sponge.

摘要翻译： 晶片清洗方法包括：（1）提供一种晶片清洗装置，其包括用于擦洗要清洗的半导体晶片的表面的海绵; （2）实施预调节流程，以使用虚拟晶片对海绵进行预处理; 和（3）执行常规清洁流程以使用预先调节的海绵擦洗待清洁的半导体晶片的表面。 虚拟晶片在虚拟晶片的表面上具有多个向上突出的特征，用于从海绵中除去残留的纤维或不需要的物质。

公开(公告)号：US20120284936A1

公开(公告)日：2012-11-15

申请号：US13104964

申请日：2011-05-10

申请人： Li-Chung Liu ,  Yi-Nan Chen ,  Hsien-Wen Liu

发明人： Li-Chung Liu ,  Yi-Nan Chen ,  Hsien-Wen Liu

IPC分类号： B08B1/04

CPC分类号： H01L21/67051 ,  H01L21/02052 ,  H01L21/67046

摘要： A post-CMP wafer cleaning apparatus includes a chamber; a plurality of rollers adapted to hold and rotate a wafer within the chamber; at least one brush adapted to scrub a surface of the wafer to be cleaned; and a liquid spraying device adapted to spray a liquid on the wafer, the liquid spraying device comprising two spray bars jointed together via a joint member.

摘要翻译： CMP后晶片清洗装置包括：腔室; 多个辊子，适于在所述腔室内保持和旋转晶片; 至少一个刷子，适于擦拭要清洁的晶片的表面; 以及适于将液体喷射在晶片上的液体喷射装置，所述液体喷射装置包括通过接头构件连接在一起的两个喷射杆。

公开(公告)号：US20120273874A1

公开(公告)日：2012-11-01

申请号：US13094796

申请日：2011-04-26

申请人： Tieh-Chiang Wu ,  Yi-Nan Chen ,  Hsien-Wen Liu

发明人： Tieh-Chiang Wu ,  Yi-Nan Chen ,  Hsien-Wen Liu

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/66666 ,  H01L21/2257 ,  H01L27/10876 ,  H01L27/10885 ,  H01L29/7827

摘要： A method of forming a buried bit line is provided. A substrate is provided and a line-shaped trench region is defined in the substrate. A line-shaped trench is formed in the line-shaped trench region of the substrate. The line-shaped trench includes a sidewall surface and a bottom surface. Then, the bottom surface of the line-shaped trench is widened to form a curved bottom surface. Next, a doping area is formed in the substrate adjacent to the curved bottom surface. Lastly, a buried conductive layer is formed on the doping area such that the doping area and the buried conductive layer together constitute the buried bit line.

摘要翻译： 提供一种形成掩埋位线的方法。 提供衬底并且在衬底中限定线状沟槽区域。 在基板的线状沟槽区域中形成线状沟槽。 线状沟槽包括侧壁表面和底部表面。 然后，将线状沟槽的底面加宽，形成弯曲的底面。 接下来，在与该弯曲底面相邻的基板上形成掺杂区域。 最后，在掺杂区域上形成掩埋导电层，使得掺杂区域和掩埋导电层一起构成掩埋位线。

公开(公告)号：US20120267727A1

公开(公告)日：2012-10-25

申请号：US13093742

申请日：2011-04-25

申请人： Jar-Ming Ho ,  Yi-Nan Chen ,  Hsien-Wen Liu

发明人： Jar-Ming Ho ,  Yi-Nan Chen ,  Hsien-Wen Liu

IPC分类号： H01L29/78 ,  H01L21/283

CPC分类号： H01L23/485 ,  H01L21/76897 ,  H01L21/823425 ,  H01L21/823468 ,  H01L21/823475 ,  H01L2924/0002 ,  H01L2924/00

摘要： An integrated circuit with a self-aligned contact includes a substrate with a transistor formed thereover, a dielectric spacer, a protection barrier, and a conductive layer. The transistor includes a mask layer and a pair of insulating spacers formed on opposite sides of the mask layer. The dielectric spacer partially covers at least one of the insulating spacers of the transistor. The protection barrier is formed over the dielectric spacer. The conductive layer is formed over the mask layer, the protection barrier, the dielectric spacer, the insulating spacer and the dielectric spacer as a self-aligned contact for contacting a source/drain region of the transistor.

摘要翻译： 具有自对准接触的集成电路包括其上形成有晶体管的衬底，介电间隔物，保护屏障和导电层。 晶体管包括掩模层和形成在掩模层的相对侧上的一对绝缘间隔物。 电介质间隔物部分地覆盖晶体管的至少一个绝缘间隔物。 保护屏障形成在电介质间隔物上。 导电层形成在掩模层，保护屏障，电介质间隔物，绝缘间隔物和介电间隔物上，作为用于接触晶体管的源/漏区的自对准接触。