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公开(公告)号:US20240206134A1
公开(公告)日:2024-06-20
申请号:US18539104
申请日:2023-12-13
申请人: AUDI AG
发明人: Daniel RUPPERT
IPC分类号: H05K7/20 , H01L23/373 , H01L23/473 , H02M7/00 , H05K7/14
CPC分类号: H05K7/209 , H01L23/3735 , H01L23/473 , H02M7/003 , H05K7/1432 , H05K7/20927
摘要: A power electronic arrangement for an electric machine, includes an inverter, power electronic components accommodated in at least one power module, an intermediate circuit connected to the inverter across connection contacts of the at least one power module and having at least one intermediate circuit energy accumulator, and a heat sink to which the at least one power module is thermally connected for cooling, the connection contacts are arranged at a margin and flat against a substrate carrying one or more power semiconductors, and are thermally coupled to the heat sink via the substrate, wherein the at least one intermediate circuit energy accumulator is connected electrically and thermally to the connection contacts to cool the at least one intermediate circuit energy accumulator.
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52.
公开(公告)号:US20240203931A1
公开(公告)日:2024-06-20
申请号:US18420253
申请日:2024-01-23
申请人: ROHM CO., LTD.
发明人: Hirokatsu UMEGAMI
IPC分类号: H01L23/00 , H01L23/34 , H01L23/373
CPC分类号: H01L24/48 , H01L23/34 , H01L23/3735 , H01L24/45 , H01L24/85 , H01L2224/45147 , H01L2224/45155 , H01L2224/48227 , H01L2224/4903 , H01L2224/85447
摘要: A semiconductor device includes a semiconductor element, a first wire, a second wire, and a metal portion. The semiconductor element includes an element obverse surface and an element reverse surface facing away from each other in a thickness direction, and an electrode disposed on the element obverse surface. The first wire contains a first metal. The second wire contains a second metal having a thermoelectric power different from that of the first metal. The metal portion contains a third metal and is disposed such that heat from the semiconductor element is conducted thereto. The first wire and the second wire are bonded to the metal portion. At least one of the first wire and the second wire is directly bonded to the metal portion.
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公开(公告)号:US20240203862A1
公开(公告)日:2024-06-20
申请号:US18533653
申请日:2023-12-08
申请人: Robert Bosch GmbH
IPC分类号: H01L23/498 , H01L23/00 , H01L23/31 , H01L23/373 , H01L25/07
CPC分类号: H01L23/49844 , H01L23/3121 , H01L23/3735 , H01L23/49822 , H01L24/48 , H01L25/072 , H01L2224/48245 , H01L2924/181
摘要: A power module. The power module includes a first circuit carrier having power conductor structures, and a second circuit carrier in parallel therewith and having at least one further power conductor structure electrically connected at an internal contact region via a spacer element, which forms a first electrically symmetrical current star point, to an internal contact region of one of the power conductor structures. A control signal conductor structure is on a second side of the second circuit carrier. Semiconductor switches are arranged and electrically contacted between the first circuit carrier and the second circuit carrier. Control connections of the semiconductor switches are electrically connected to the control signal conductor structure. A common conductor structure is arranged on the second side of the second circuit carrier. Control connections of the semiconductor switches are electrically connected to the common conductor structure.
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54.
公开(公告)号:US20240203754A1
公开(公告)日:2024-06-20
申请号:US18527731
申请日:2023-12-04
申请人: Arieca Inc.
发明人: Navid Kazem , Dylan S. Shah , Jeffrey Gelorme , Hing Jii Mea , Keyton D. Feller
IPC分类号: H01L21/48 , H01L23/00 , H01L23/373
CPC分类号: H01L21/4882 , H01L23/3733 , H01L24/29 , H01L24/32 , H01L24/83 , H01L2224/29005 , H01L2224/2929 , H01L2224/29291 , H01L2224/29301 , H01L2224/29305 , H01L2224/29309 , H01L2224/29311 , H01L2224/29347 , H01L2224/2936 , H01L2224/29366 , H01L2224/29372 , H01L2224/29379 , H01L2224/29387 , H01L2224/29388 , H01L2224/2939 , H01L2224/3201 , H01L2224/32221 , H01L2224/83201 , H01L2224/83862 , H01L2224/8388 , H01L2924/0108 , H01L2924/0133 , H01L2924/0615 , H01L2924/0635 , H01L2924/0665 , H01L2924/0675 , H01L2924/0695 , H01L2924/07001 , H01L2924/0715 , H01L2924/095
摘要: A method of deposition of a thermal interface material onto a circuit assembly and an integrated circuit formed therefrom is provided. The method includes depositing a thermal interface material at a first layer thickness between a first layer of a circuit assembly and a second layer of the circuit assembly. The thermal interface material includes an emulsion of liquid metal droplets and polymer. The first layer thickness is at least 1.1 times a D90 of the liquid metal droplets prior to compressing the circuit assembly. The method includes compressing the circuit assembly to decrease the first layer thickness to a second layer thickness, thereby deforming the liquid metal droplets. The second layer thickness is no greater than a D90 of the liquid metal droplets in thermal interface material prior to compressing the circuit assembly.
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公开(公告)号:US12014971B2
公开(公告)日:2024-06-18
申请号:US17335077
申请日:2021-06-01
申请人: NXP USA, Inc.
IPC分类号: H01L23/433 , H01L23/373 , H01L23/40
CPC分类号: H01L23/433 , H01L23/3736 , H01L23/4006 , H01L2023/405
摘要: A thermal interface structure for transferring heat from an electronic component to a system heat sink includes a stack of one or more layers of a stiff thermal interface material and one or more layers of a compliant thermal interface material stacked on and connected to the one or more layers of the compliant thermal interface material. In some embodiments, the thermal interface structure also may include one or more layers of a shape memory alloy and/or a collapsible encasement.
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公开(公告)号:US20240194581A1
公开(公告)日:2024-06-13
申请号:US18287012
申请日:2022-04-07
申请人: AMOSENSE CO., LTD.
发明人: Jihyung LEE
IPC分类号: H01L23/498 , H01L23/00 , H01L23/15 , H01L23/31 , H01L23/373 , H01L23/492
CPC分类号: H01L23/49844 , H01L23/15 , H01L23/3142 , H01L23/3735 , H01L23/4924 , H01L24/32 , H01L24/83 , H01L2224/32225 , H01L2224/83801 , H01L2924/351
摘要: The present invention relates to a power module and a manufacturing method therefor, the power module using a conductive spacer to electrically connect an electrode of a semiconductor chip and an electrode pattern of a ceramic substrate without a wire, thereby converting rated voltage and current while removing electrical risk elements, which can be generated during wire bonding, and increasing reliability and efficiency when used with high power.
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公开(公告)号:US12009276B2
公开(公告)日:2024-06-11
申请号:US17407224
申请日:2021-08-20
发明人: Yu-Sheng Lin , Shu-Shen Yeh , Chin-Hua Wang , Po-Yao Lin , Shin-Puu Jeng
IPC分类号: H01L23/053 , H01L21/52 , H01L23/367 , H01L23/373 , H01L23/427 , H01L23/498 , H01L25/065 , H01L25/18
CPC分类号: H01L23/3672 , H01L21/52 , H01L23/053 , H01L23/3736 , H01L23/427 , H01L23/49833 , H01L25/18
摘要: A semiconductor package including a lid having one or more heat pipes located on and/or within the lid to provide improved thermal management. A lid for a semiconductor package having one or more heat pipes thermally integrated with the lid may provide more uniform heat loss from the semiconductor package, reduce the risk of damage to the package due to excessive heat accumulation, and may enable the lid to be fabricated using less expensive materials, thereby reducing the costs of a semiconductor package.
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58.
公开(公告)号:US20240186216A1
公开(公告)日:2024-06-06
申请号:US18553151
申请日:2022-03-30
发明人: Yongjie HU
IPC分类号: H01L23/373 , H01L21/48 , H01L29/20 , H01L29/778
CPC分类号: H01L23/3736 , H01L21/4871 , H01L29/2003 , H01L29/7781
摘要: The present embodiments relate generally to the integration of boron arsenide (BAs) and boron phosphide (BP) into semiconductor devices and electronics, including with all semiconductors (Si, Ge, InP, InAs, GaAs), metals, wide-bandgap gallium nitride (GaN, AIGaN, SiC), ultrawide-bandgap (AIN, c-BN, diamond, Ga2O3), HEMT devices, electronics, optoelectronics, photonics, or any power devices for high-performance thermal management. Embodiments successfully develop the first experimental integration and atomic structural characterization of GaN-on-BAs structure for passive cooling of GaN devices, GaN/AIGaN HEMT transistors, and RF technologies, and measured a high thermal boundary conductance of 250 MW/m2K. Importantly, experimental measurement of operating AIGaN/GaN HEMT devices confirms the substantially reduced hot spot temperature and clear advantage for using BAs versus diamond or silicon carbide as cooling substrate.
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59.
公开(公告)号:US20240186215A1
公开(公告)日:2024-06-06
申请号:US18437385
申请日:2024-02-09
发明人: Seunggeol Ryu , Seokkan Ki , Youngsuk Nam , Jaechoon Kim , Bangweon Lee , Seungtae Hwang
IPC分类号: H01L23/373 , H01L23/473
CPC分类号: H01L23/3736 , H01L23/473
摘要: A method of manufacturing a thermal interface material may include mixing fine particles with an acidic solution to remove a first oxide layer from a surface of each of the fine particles, injecting a liquid metal into the acidic solution to remove a second oxide layer from a surface of the liquid metal and for the fine particles from which the first oxide layer is removed in the acidic solution to penetrate into the liquid metal from which the second oxide layer is remove, and extracting the liquid metal including the fine particles therein from the acidic solution.
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公开(公告)号:US20240186213A1
公开(公告)日:2024-06-06
申请号:US18076245
申请日:2022-12-06
发明人: Jae Jin REE , Sang Hyeon LEE , Yi Seul HAN , Geon Du GIM , Hun Jung LIM
IPC分类号: H01L23/367 , H01L21/48 , H01L21/56 , H01L23/00 , H01L23/31 , H01L23/373 , H01L25/16
CPC分类号: H01L23/3675 , H01L21/4882 , H01L21/563 , H01L23/3135 , H01L23/3735 , H01L24/16 , H01L24/32 , H01L24/73 , H01L25/165 , H01L2224/16227 , H01L2224/32225 , H01L2224/73204 , H01L2924/1611 , H01L2924/1616 , H01L2924/1619 , H01L2924/16235 , H01L2924/16251 , H01L2924/16315
摘要: In one example, an electronic device includes a substrate and a cover structure. The cover structure includes an upper cover wall comprising an upper wall outer surface and an upper wall inner surface opposite to the upper wall outer surface, cover sidewalls extending from the upper wall inner surface and coupled to the substrate. The upper cover wall and the cover sidewalls define a cavity. A channel structure is in the upper cover wall extending inward from the upper wall inner surface. A first electronic component is coupled to the substrate within the cavity and a thermal interface material (TIM) is coupled to the upper wall inner surface and the first electronic component. A portion of the TIM is within the channel structure. Other examples and related methods are also disclosed herein.
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