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    Fast analog memory cell readout using modified bit-line charging configurations
    61.
    发明授权
    Fast analog memory cell readout using modified bit-line charging configurations 有权
    使用修改的位线充电配置快速模拟存储单元读数

    公开(公告)号：US08787057B2

    公开(公告)日：2014-07-22

    申请号：US13709656

    申请日：2012-12-10

    Applicant: Apple Inc.

    Inventor： Eyal Gurgi ,  Yael Shur ,  Yoav Kasorla

    IPC: G11C27/00

    CPC classification number: G06F12/00 ,  G06F12/02

    Abstract: A method for data storage includes providing at least first and second readout schemes for reading storage values from a group of analog memory cells that are connected to respective bit lines. The first readout scheme reads the storage values using a first bit line charging configuration having a first sense time, and the second readout scheme reads the storage values using a second bit line charging configuration having a second sense time, shorter than the first sense time. A condition is evaluated with respect to a read operation that is to be performed over a group of the memory cells. One of the first and second readout schemes is selected responsively to the evaluated condition. The storage values are read from the group of the memory cells using the selected readout scheme.

    Abstract translation: 一种用于数据存储的方法包括提供至少第一和第二读出方案，用于从连接到各个位线的一组模拟存储器单元读取存储值。 第一读出方案使用具有第一感测时间的第一位线充电配置读取存储值，并且第二读出方案使用比第一感测时间短的具有第二感测时间的第二位线充电配置来读取存储值。 针对要在一组存储器单元上执行的读取操作来评估条件。 响应于评估条件选择第一和第二读出方案中的一个。 使用所选择的读出方案从存储器单元的组中读取存储值。

    Programming Schemes for Multi-Level Analog Memory Cells
    62.
    发明申请
    Programming Schemes for Multi-Level Analog Memory Cells 审中-公开
    多级模拟存储单元的编程方案

    公开(公告)号：US20140157090A1

    公开(公告)日：2014-06-05

    申请号：US14173965

    申请日：2014-02-06

    Applicant: Apple Inc.

    Inventor： Ofir Shalvi ,  Naftali Sommer ,  Dotan Sokolov ,  Yoav Kasorla

    IPC: G11C16/34 ,  G06F11/10

    CPC classification number: G11C11/5628 ,  G06F11/1008 ,  G06F11/1068 ,  G11C11/56 ,  G11C16/34 ,  G11C16/3459 ,  G11C29/00 ,  G11C29/52 ,  H03M13/2906

    Abstract: A method for data storage includes storing first data bits in a set of multi-bit analog memory cells at a first time by programming the memory cells to assume respective first programming levels. Second data bits are stored in the set of memory cells at a second time that is later than the first time by programming the memory cells to assume respective second programming levels that depend on the first programming levels and on the second data bits. A storage strategy is selected responsively to a difference between the first and second times. The storage strategy is applied to at least one group of the data bits, selected from among the first data bits and the second data bits.

    Abstract translation: 一种用于数据存储的方法包括：通过对存储器单元进行编程来采用各自的第一编程级别，来将第一数据位在第一时间存储在一组多位模拟存储单元中。 第二数据位通过对存储器单元进行编程以采取依赖于第一编程电平和第二数据位的相应的第二编程电平而在比第一时间晚的第二时间存储在存储单元组中。 响应于第一次和第二次之间的差异选择存储策略。 将存储策略应用于从第一数据位和第二数据位中选择的至少一组数据位。

    Fast Secure Erasure Schemes for Non-Volatile Memory
    63.
    发明申请
    Fast Secure Erasure Schemes for Non-Volatile Memory 有权
    非易失性存储器的快速安全擦除方案

    公开(公告)号：US20140143475A1

    公开(公告)日：2014-05-22

    申请号：US13683569

    申请日：2012-11-21

    Applicant: APPLE INC.

    Inventor： Yoav Kasorla ,  Eyal Gurgi

    IPC: G06F12/02

    CPC classification number: G06F12/0246 ,  G06F21/60 ,  G06F21/79 ,  G06F2221/2143 ,  G11C16/10 ,  G11C16/14 ,  G11C16/22

    Abstract: A method includes, in a memory with multiple analog memory cells, storing one or more data pages in respective groups of the memory cells using a first programming configuration having a first storage speed. Upon receiving a request to securely erase a data page from the memory, one or more of the memory cells in a group that stores the data page are re-programmed using a second programming configuration having a second storage speed that is faster than the first storage speed.

    Abstract translation: 一种方法包括在具有多个模拟存储器单元的存储器中，使用具有第一存储速度的第一编程配置在存储器单元的相应组中存储一个或多个数据页。 在接收到从存储器安全地擦除数据页面的请求时，使用具有比第一存储器快的第二存储速度的第二编程配置来重新编程存储数据页面的组中的一个或多个存储器单元 速度。

    Mitigation of retention drift in charge-trap non-volatile memory
    68.
    发明授权
    Mitigation of retention drift in charge-trap non-volatile memory 有权
    减少电荷陷阱非易失性存储器中的滞留漂移

    公开(公告)号：US09490023B2

    公开(公告)日：2016-11-08

    申请号：US14219315

    申请日：2014-03-19

    Applicant: Apple Inc.

    Inventor： Naftali Sommer ,  Avraham Poza Meir ,  Yoav Kasorla ,  Eyal Gurgi

    IPC: G11C16/34 ,  G11C7/02 ,  G11C7/04

    CPC classification number: G11C16/3404 ,  G11C7/02 ,  G11C7/04

    Abstract: A method includes storing data values in a group of memory cells that share a common isolating layer, by producing quantities of electrical charge representative of the data values at respective regions of the common isolating layer that are associated with the memory cells. A function, which relates a drift of the electrical charge in a given memory cell in the group to the data values stored in one or more other memory cells in the group, is estimated. The drift is compensated for using the estimated function.

    Abstract translation: 一种方法包括通过产生表示与存储器单元相关联的公共隔离层的各个区域处的数据值的电荷量来将数据值存储在共享公共隔离层的一组存储器单元中。 估计将组中的给定存储单元中的电荷的漂移与存储在组中的一个或多个其他存储单元中的数据值相关联的功能。 使用估计功能补偿漂移。

    Mitigation of data retention drift by programming neighboring memory cells
    70.
    发明授权
    Mitigation of data retention drift by programming neighboring memory cells 有权
    通过编程相邻的存储单元减少数据保留漂移

    公开(公告)号：US09401212B2

    公开(公告)日：2016-07-26

    申请号：US14822992

    申请日：2015-08-11

    Applicant: Apple Inc.

    Inventor： Avraham Poza Meir ,  Eyal Gurgi ,  Naftali Sommer ,  Yoav Kasorla

    IPC: G11C16/10 ,  G11C16/04 ,  G11C11/56 ,  G11C16/34

    CPC classification number: G11C16/10 ,  G11C11/5671 ,  G11C16/0466 ,  G11C16/3418 ,  G11C16/3427

    Abstract: A method includes, in a plurality of memory cells that share a common isolation layer and store in the common isolation layer quantities of electrical charge representative of data values, assigning a first group of the memory cells for data storage, and assigning a second group of the memory cells for protecting the electrical charge stored in the first group from retention drift. Data is stored in the memory cells of the first group. Protective quantities of the electrical charge that protect from the retention drift in the memory cells of the first group are stored in the memory cells of the second group.

    Abstract translation: 一种方法包括在共享公共隔离层并存储在公共隔离层中的代表数据值的电荷量的多个存储器单元中，分配用于数据存储的第一组存储器单元，以及分配第二组 用于保护存储在第一组中的电荷的存储单元不保持漂移。 数据存储在第一组的存储单元中。 防止第一组的存储单元中保持漂移的电荷的保护量被存储在第二组的存储单元中。

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